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For fast buffering of large stepwise input to an nF-range capacitive load, this article presents a 5-V rail-to-rail (RTR) input–output paralleled-amplifier (PA) in which a dynamic class-C amplifier (DCCA) and a linear single-stage operational transconductance amplifier (OTA) are combined in parallel. During slew time, the DCCA, which is designed to consume a near-zero static current, dominantly supplies the dynamic current up to 8.5 mA to the output. When the output gets closer to the fine-settling region, the DCCA is rapidly faded out in virtue of a dedicated near-zero dead-zone control (NDZC), and it hands over to the linear OTA. A current-redistributive RTR $G_{\text {m}}$ -boosting technique is also proposed so that the OTA can have a wide gain-bandwidth product (GBW) even over the RTR input range while minimizing the quiescent current dissipation. The prototype chip was fabricated only with 0.5- $\mu \text{m}$ 5-V CMOS devices, and it occupies a die area of 0.03 $\mu \text{m}^{2}$ . The proposed amplifier consumed a static current of 3.1 $\mu \text{A}$ with a supply voltage of 5 V. The slew rates (SRs) with load capacitances ( $C_{\mathrm {L}}$ ) of 0.8 and 10 nF were measured to be 10.3 and 0.86 V/ $\mu \text{s}$ , respectively, for a step input of $\Delta $ 4.2 V, which is a state-of-the-art result compared to prior chips. The measured GBW of 10–127 kHz was achieved over 0.8–10 nF $C_{\mathrm {L}}$ with ≥ 59° phase margin (PM). The measured GBW deviation in a common-mode voltage ( $V_{\mathrm {CM}}$ ) range of 0.3–4.7 V was within the maximum of 20%.

This paper presents an OLED/μLED display driver IC with cascaded loading-free capacitive interpolation (LFCI) DAC and a high-slew buffer amplifier. The 12-bit color-depth is realized by a combination of 7-bit R-DAC and proposed 5-bit LFCI DAC while occupying only 295×17μm2, which is ×2 reduction compared to the state-of-the-art. In-pixel MSB-conversion is also presented to reduce chip size further. 5V amplifier offers a slew-rate of 6.24V/μs at 80pF with a static current of 2μA. The chip fabricated in 180-nm achieved the measured 0.43LSB (DNL), 0.95LSB (INL), and 7.9mV (DVO).

This paper presents an always-dual-path (ADP) DC-DC converter that achieves 4.5V-input 0.3-to-1.7V-output buck conversion for battery-powered low-voltage SoCs. Regardless of voltage conversion ratio (VCR), the proposed ADP converter maintains the inductor current constantly to be ×0.5 of the load current, bringing high efficiency with a large DCR of the compact-volume inductor. Seamless dual-power-path formed by two flying-capacitors merits a low ripple. The chip fabricated in 180-nm 5V CMOS obtains an efficiency of 91.5% (84.6%) at a VCR of 0.38 (0.2) even with an inductor DCR of 250mΩ.

This paper presents a hybrid dual-path Buck-Boost DC-DC converter (DPBB) achieving high power efficiency for the entire input voltage (V IN ) range (2.8 to 4.2V) from a Li-ion battery for mobile applications. Unlike conventional noninverting buck-boost converters (CBB), the proposed DPBB supplies a load current (I LOAD ) at all phases by using the inductor path (L-path) and capacitor path (C-path) alternately. As a result, our design achieves high efficiency by reducing conduction losses and suppresses the output voltage (V OUT ) ripple. It has only a single control mode over the whole V IN range, unlike the previous designs that require complex mode transitions. Note that high efficiency is achieved not only across a wide I LOAD range but also over a wide V IN range. The proposed DPBB achieves 96.6% peak efficiency with the smallest difference between the maximum and minimum efficiencies over a given range of I LOAD and V IN .

One of the most key analog blocks in VLSI is probably the buffer amplifier dedicated to driving large off-chip loads. However, achieving fast settling-time and high output current drivability over a wide input voltage range has been challenging with low quiescent current $(I_{Q})$ consumption. In energy-efficient amplifier designs, many technical breakthroughs have been made to enhance slew-rate (SR) [1] –[5] and wide unity-gain bandwidth (GBW) [4] –[6], thus far. However, prior efforts of [1], [2], [4] –[6] might be impractical to use in high-voltage $(\ge 5\mathrm{V})$ actuators and flat-panel displays due to their limited (no rail-to-rail) input range with low supply voltage. Despite obtaining good SR and GBW, the works of [1] –[3] allowed a considerable overshoot in transient response, which can impose sudden voltage stress on the load. Besides, complex stability compensation in a three-stage amplifier [6] inherently restrains achieving high SR. To overcome such technical limits with optimal transient response, this paper presents a low $- \mathrm{I}_{Q}$ ultra-high-SR amplifier with rail-to-rail transconductance $(G_{m}) -$ boosting technique.

In this paper, a Class-D audio amplifier (CDA) with bridge-tied load half-side switching (BTLHS) mode is presented. The BTLHS mode through a digital pulse width subtracter (DPWS) enables a low quiescent current (I Q ) by suspending the output switching in idle condition while maintaining high linearity with seamless zero-crossings and mode change. The CDA achieves 0.0024% THD+N, I Q of 0.66mA, and 95% peak efficiency on an 8Ω-speaker. The chip was fabricated in a 0.18-μm CMOS process, and it occupies 0.83mm2.

As internet-of-things (IoT) devices continue to be installed everywhere, the concept of disposable IoT is emerging owing to better cost-efficiency and ease of maintenance without battery recharging. Lasting several years, IoTs powered with standard alkaline batteries can be a promising solution due to the long shelf life, low cost, and high reliability of these batteries as compared to the Li-ion type. As shown in the top portion of Fig. 11.8.1, a single alkaline cell has a maximum voltage of 1.5V, but it can decay down to 0.9V [1]. To power an IoT device operating with $\mathrm{V}_{\mathrm{DD}}=2\mathrm{V}$ , a variety of design options can be considered, such as the battery configuration and the power conversion topology, as shown in Fig. 11.8.1 (bottom). The first approach is step-down conversion [2], [3] from multi-cell batteries (3×BATs) connected in series. In this configuration, cell-balancing must be carefully considered; otherwise, the energy of the BATs cannot be fully utilized if any weak cells exist among them. Considering the power conversion stage, the input RMS current $\mathrm{I}_{\mathrm{IN},\mathrm{RMS}}$ becomes much higher than the average current $\mathrm{I}_{\mathrm{IN},\mathrm{AVG}}$ due to the inherently discontinuous $\mathrm{I}_{\mathrm{IN}}$ supplied from batteries, resulting in a significant power loss in the series combination of the direct current resistance $(\mathrm{R}_{\mathrm{DCR}, \mathrm{BAT}})$ of batteries which in the case of 3 batteries in series is $3\times \mathrm{R}_{\mathrm{DCR}, \mathrm{BAT}}$ (-300m $\Omega$ ). Regarding step-up conversion [4], [5] with parallel-connected batteries, most of the energy imbalances are compelled to be uselessly wasted via reverse currents $\mathrm{I}_{\mathrm{B}}$ ‘ The $\mathrm{I}_{\mathrm{B}}$ also can cause explosion or leakage of corrosive substances. Furthermore, the inductor current $\mathrm{I}_{\mathrm{L}}$ is likely to be high, caused by the discontinuous $\mathrm{I}_{\mathrm{D}}$ delivered to the output; this significantly contributes to the power loss with a large $\mathrm{R}_{\mathrm{DCR},\mathrm{IND}}$ of the inductor. In summary, the battery cell imbalance and the discontinuous input/output (I/O) current of converter are perhaps the major issues that prevent the full utilization of alkaline batteries in IoT applications.

Lithium-ion batteries are generally used in mobile devices, but the voltage range of the battery varies from 2.7 to 4.2V. To provide a mid-3V-range output from the battery, a converter capable of step-up/down-conversion is necessary. For this purpose, non-inverting buck-boost topologies with multimode control [1-3] have been widely used. However, they have limited efficiency slightly higher than 90%, which comes from the fact that a main current path always encompasses two switches. To increase the efficiency in the buck mode where the converter operates for most of the usage time, a flying capacitor buck-boost (FCBB) was proposed in [4]. Despite its high power efficiency, it requires large-size LDMOS to endure a large voltage range up to 8V at switching node, resulting in cost inefficiency. Since all these topologies have a common controller that covers both buck and boost modes of operation, compensator design is challenging. Moreover, a non-minimum-phase system of boost operation makes it hard to achieve a fast loop response. In this paper, we propose a step-up/down DC-DC converter based on buck operation only over the whole input voltage range, which greatly simplifies the controller design and consequently gives fast response. Furthermore, it achieves high efficiency because of the reduced effective resistance on the main current path.

A micro-bolometer focal plane array (MBFPA) detector is one of the best candidates for thermal imaging cameras due to its excellent uncooled imaging performance with low manufacturing cost [1-4]. In Fig. 10.8.1, remote infra-red signals from thermal objects are maximized and absorbed at the MEMS micro-bolometer pixels having a λ/4 cavity structure, and they are then converted into resistance of a thermistor layer in each cell. Then, a CMOS analog front-end (AFE) reads out the cell resistance value in current-mode by applying a voltage bias to the micro-bolometer pixel. In the readout process, the skimming cell that does not respond to the infra-red signal is used to remove the offset components by generating an opposite-phase current, which in turn alleviates the system required resolution. Nevertheless, there is still very significant fixed-pattern noise (FPN) resulting from process, voltage, and temperature (PVT) variations, and this severely limits the responsivity/dynamic range trade-off. Addressing the problem, both bias voltages (V FID & V GSK ) applied to sensing and skimming cells, respectively, should be precisely adjusted so as to avoid any saturation while maintaining sufficient responsivity, and their noise levels must be low enough considering the noise amplification in the signal chain.