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Summary: The state‐of‐charge (SOC) of the battery is the most critical parameter for an electric vehicle (EV) dashboard. Generally, the Coulomb counting (CC) method is used for SOC estimation, but the conventional CC method has some errors due to initial SOC determination. This work uses battery modeling and parameter estimation of a lithium‐iron‐phosphate (LFP) battery to determine the initial SOC. The equivalent circuit models (ECMs) have been used for battery parameters estimation by the least‐squares estimation (LSE) algorithm. This algorithm uses only experimental terminal voltage and current data from Arbin battery testing system. The ECM parameters vary with battery SOC, and the differential capacity plot has explained the variation. SOC can be estimated using estimated parameters and the relationship between SOC and open‐circuit voltage (OCV). Additionally, a modified CC method is proposed to solve the problem of estimating initial SOC by determining an OCV‐SOC relation using experimental data. The modeling of the battery is validated by comparing ECMs with physical battery terminal voltage profiles. [ABSTRACT FROM AUTHOR]

The seminal work of Viola and Jones for automatic face detection is widely used in many human–computer interaction and computer vision applications. On analyzing the existing face detection architectures, we observed that integral image calculation, feature computation in cascaded classifier, and recursive scanning of image with sliding window at multiple scales are the major reasons which increase the memory and time complexity of the algorithm. Therefore, in this paper, we have proposed a hardware–software co-design of Viola–Jones face detector for System-on-Chip (SoC). In the proposed architecture, integral image computation and cascaded classifier sub-modules are implemented on the hardware — Programmable Logic FPGA (PL-FPGA), while the image scaling and nonmaximum suppression sub-modules are implemented on the software — Processing System ARM (PS-ARM). Concepts of pipelining, folding, and parallel processing are effectively utilized to produce an optimum design architecture. The proposed architecture has been tested on PYNQ-Z1 board. The implementation results in a processing speed of 9 5 fps with PL and PS clocks of 1 0 0 MHz and 6 5 0 MHz, respectively, for an image of QVGA resolution. Results analysis demonstrates that the proposed architecture has minimum resource requirement as compared to state-of-the-art implementations, which facilitates and promotes the usage of resource-constrained low-cost ZYNQ SoC for face detection. [ABSTRACT FROM AUTHOR]

This article proposes a principal component analysis-based automatic approach to generate reference image for evaluating different thresholding techniques. Twenty one thresholding methods have been considered for reference image creation and evaluated using five standard performance indices. Literature suggests a few performance measures, among which F-measure, modified Hausdorff distance, edge mismatch error, relative area error and object level consistency error are popular. However, correlation analysis of these metrics reveal that only F-measure, modified Hausdorff distance and edge mismatch error retain non-redundant information. Thus the best thresholding method can be determined from these three indices for different types of images, automatically. Experimental results demonstrate the potential of different thresholding methods and select the best binary segmentation technique for particular type of image set. [ABSTRACT FROM AUTHOR]