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Much effort is being made to ensure the safety of people. One of the main requirements of travellers and city administrators is to have knowledge of places that are more prone to criminal activities. To rate a place as a potential crime location, it needs the past crime history at that location. Such data is not easily available in the public domain, however, it floats around on the Internet in the form of newspaper and social media posts, in an unstructured manner though. Consequently, a large number of works are reported on extracting crime information from news articles, providing piecemeal solutions to the problem. This chapter complements these works by building an end-to-end framework for crime profiling of any given location/area. It customizes individual components of the framework and provides a Spatio-temporal integration of crime information. It develops an automated framework that crawls online news articles, analyzes them, and extracts relevant information to create a crime knowledge base that gets dynamically updated in real-time. The crime density can be easily visualized in the form of a heat map which is generated by the knowledge base. As a case study, it investigates 345448 news articles published by 6 daily English newspapers collected for approximately two years. Experimental results show that the crime profiling matches with the ratings calculated manually by various organizations., Comment: 22 pages, 5 figures, 9 tables, Smart Cities: Concept, Practices, and Applications (CRC Press, Taylor and Francis Group)

Advancement in Processor technology has made it easy to handle data-intensive workloads, but limiting main memory advances has created performance bottlenecks. In DRAM, there have been improvements in DRAM access latency as well as reduction in cost-per-bit with the increase in cell density. But still DRAM data transfer rate lags behind the processing speed of the current generation processors. As Memory advancements based on hardware have been progressing at a slower pace, to cope up with High-end Processors, Architectural level advancements such as Prediction techniques, Replacement policies, etc are the major subject. In the recent field of research, Data prediction is a sought out topic as correct prediction can boost performance by decreasing the amount of excess memory access by predicting data beforehand using data access trends and behaviors. Though prediction techniques have been implemented at most of the Computer Architecture, We propose implementing data prediction in DRAM level architectures like TL-DRAM and CROW. Both of these method distributes the DRAM into different parts which contain a smaller section which is faster and larger section which contains the bulk of data but is comparatively slower. We wish to use data prediction in between these sections of memory to have predicted data transferred to the faster sections to improve the overall performance by reducing the memory access time.