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Advanced surface affinity control for grapho-epitaxy directed self-assembly (DSA) patterning is essential for providing reliable DSA-based solutions for the development of semiconductor patterning. Independent control of surface affinity between the bottom and the sidewalls of a topographical guiding structure was achieved by embedding an ultrathin layer in the guiding template stack. The implementation of an embedded layer with tunable surface properties for DSA grapho-epitaxy was evaluated and optimized on 300 mm wafers by critical dimension SEM characterization. It was demonstrated that a thin protective layer, placed between the hard mask guiding template and the embedded layer, allows the preservation of the surface properties of the embedded layer during guiding template etching. The DSA performances of this novel grapho-epitaxy integration, using a topographical template patterned with 193 nm immersion lithography, were evaluated by monitoring the success rate and the critical dimension uniformity of the shrunk contacts. FIB-STEM analyses were further carried out to analyze the residual polymer thickness on the resulting contacts. This new integration leads to the control of the polymer residual thickness (a few nanometers) and uniformity (inferior to 1 nm) at the bottom of the guiding template which will facilitate the subsequent DSA pattern transfer.

International audience; Directed Self Assembly (DSA) of block-copolymers (BCPs) is considered as a cost-effective solution to extend the performances of conventional lithography. In this work, we propose a smart surface modification technique to precisely control the surface affinity of guiding template used in the DSA graphoepitaxy process flows. The presented method consists in the UV irradiation of copolymers brushes in order to locally tune their surface affinity. By this way, we are able to differentiate the surface affinities of guide sidewalls (PMMA-attractive) and guide bottom (non-preferential affinity). A complete DSA-module is demonstrated and implemented on a 300mm integration flow dedicated to the creation of silicon nanowires-like transistor.

In the lithography landscape, EUV technology recovered some credibility recently. However, its large adoption remains uncertain. Meanwhile, 193nm immersion lithography, with multiple-patterning strategies, supports the industry preference for advanced-node developments. In this landscape, lithography alternatives maintain promise for continued R&D. Massively parallel electron-beam and nano-imprint lithography techniques remain highly attractive, as they can provide noteworthy cost-of-ownership benefits. Directed self-assembly lithography shows promising resolution capabilities and appears to be an option to reduce multi-patterning strategies. Even if large amount of efforts are dedicated to overcome the lithography side issues, these solutions introduce also new challenges and opportunities for the integration schemes.

High chi organic lamellar-forming block copolymers were prepared with 18 nm intrinsic period Lo value. The BCPs were coated on a neutral layer on silicon substrates and were either thermally annealed or exposed to solvent vapors both in a 300mm track. The effect of lowering the glass transition temperature (Tg) on the high chi BCP was investigated. Process temperatures and times were varied. It was found that the BCP having lower Tg exhibits faster kinetics and is able to reach alignment in a shorter time than a similar BCP having higher Tg. Fingerprint defect analysis also shows that the BCP with lower Tg has lower defects. The results show that fingerprint formation can be achieved with either ether or ester type solvents depending on the BCP used. The results show that a track process for solvent annealing of high-χ BCPs is feasible and could provide the path forward for incorporation of BCP in future nodes. Finally, directed self-assembly was demonstrated by implemented high chi polymers on a graphoepitaxy test vehicles. CD and line width roughness was evaluated on patterns with a multiplication factor up to 7.

PS-b-PMMA block copolymer is a well-known DSA material, and there are many DSA patterning methods that make effective the use of such 1st generation materials. Consequently, this variety of patterning methods opens a wide array of possibilities for DSA application[1-4]. Last year, during the inaugural International DSA Symposium, researchers and lithographers concurred on common key issues for DSA patterning methods such as: defect density, LWR, placement error, etc. Defect density was specifically expressed as the biggest obstacle for new processes. Coat-Develop track systems contribute to the DSA pattern fabrication and also influence the DSA pattern performances[4]. In this study, defectivity was investigated using an atmosphere-controlled chamber on the SOKUDO DUO track. As an initial step for expanding the DSA process window, fingerprint patterns were used for various atmospheric conditions during DSA self-assembly annealing. In this study, we will demonstrate an improved DSA process window, and then we will discuss the mechanism for this atmospheric effect.

Directed Self Assembly (DSA) of block-copolymers (BCPs) used as a complementary technique to the 193nm immersion lithography has demonstrated sub-10nm node applications in both via and line/space patterning. We propose however to study the performance of graphoepitaxy which allows DSA with thicker initial BCP layer, higher multiplication factors and stronger orientation control of lamellae. The aim of this work is to use the 300mm pilot line available at LETI and Arkema’s advanced materials to evaluate the performances of a novel graphoepitaxy process based on the work on a 38nm period lamellar PS-b-PMMA (L38) reported before.

A simple and common practice to evaluate Block copolymers (BCP) self-assembly performances, is on a free surface wafer. With no guiding pattern the BCP designed to form line space pattern for example, spontaneously rearranges to form a random fingerprint type of a pattern. The nature of the rearrangement is dictated by the physical properties of the BCP moieties, wafer surface treatment and the self-assembly process parameters. Traditional CDSEM metrology algorithms are designed to measure pattern with predefined structure, like linespace or oval via holes. Measurement of pattern with expected geometry can reduce measurement uncertainty. Fingerprint type of structure explored in this dissertation, poses a challenge for CD-SEM measurement uncertainty and offers an opportunity to explore 2D metrology capabilities. To measure this fingerprints we developed a new metrology approach that combines image segmentation and edge detection to measure 2D pattern with arbitrary rearrangement. The segmentation approach enabled to quantify the quality of the BCP material and process, detecting 2D attributes such as: CD and CDU at one axis, and number of intersections, length and number of PS fragments, etched PMMA spaces and donut shapes numbers on the second axis. In this paper we propose a 2D metrology to measure arbitrary BCP pattern on a free surface wafer. We demonstrate experimental results demonstrating precision data, and characterization of PS-b-PMMA BCP, intrinsic period L 0 = 38nm (Arkema), processed at different bake time and temperatures.

For sub-10nm technologies, the semiconductor industry is facing the limits of conventional lithography to achieve narrow dimensions. DSA (Directed Self-Assembly) of Block Copolymers (BCP) is one of the most promising solutions to reach sub-10nm patterns with a high density. One challenge for DSA integration is the removal of PMMA selectively to PS. In this paper, we propose to study PMMA removal selectively to PS by screening different plasma etch chemistries. These chemistries developed on blanket wafers have been tested on cylindrical and lamellar patterned wafers.

Directed Self-Assembly (DSA) of Block Copolymers (BCP) is one of the most promising solutions for sub-10 nm nodes. However, some challenges need to be addressed for a complete adoption of DSA in manufacturing such as achieving DSA-friendly design, low defectivity and accurate pattern placement. In this paper, we propose to discuss the DSA integration flows using graphoepitaxy for contact-hole patterning application. DSA process dependence on guiding pattern density has been studied and solved thanks to a new approach called “DSA planarization”. The capabilities of this new approach have been evaluated in terms of defectivity, Critical Dimension (CD) control and uniformity before and after DSA etching transfer.

Overcoming the optical limitations of 193nm immersion lithography can be achieved using Directed Self Assembly (DSA) of block-copolymers (BCPs) as a low-cost and versatile complementary technique. The goal of this paper is to investigate the potential of DSA to address line and space (L/S) high resolution patterning by performing the density multiplication of lines with the graphoepitaxy approach. As surface affinity is a key parameter in self-assembly, three variations, or "flavors", of DSA template affinity are investigated regarding several success criteria such as morphology control or defectivity. More precisely, both the methodology to register DSA defects and the impact of process parameters on defectivity are detailed. Using the 300mm pilot line available in LETI and Arkema’s advanced materials, we investigate process optimization of DSA line/space patterning of a 38nm period lamellar PS-b-PMMA BCP (L38). For this study, our integration scheme, depicted in figure 2-1, is based on BCP self-assembly inside organic hard mask guiding patterns obtained using 193i nm lithography. Defect analysis coupled with the fine tuning of process parameters (annealing, brush material) provided the optimum conditions for the L38 self-assembly. Using such conditions, DSA using the three affinity flavors is investigated by means of SEM top-view and cross-section review. Lithographic performances of one selected flavor are then evaluated with the comparison of Process Windows (PWs) function of either commensurability, morphology or LWR. This work is a first step in finding the best process for an industrial graphoepitaxy approach.