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The objective of this final year project has been to improve the linearity of power amplifiers (PA) using the digital predistortion (DPD) technique, which is a technique that uses mathematical models that model the behaviour of the PA to linearize it. Different behavioral models will be worked on and compared, as a correct selection of the PA behavioral model can be important when improving the linearization of the DPD. Among the different models that will be seen during the project, we will delve into artificial neural networks (ANN), which is a technique that is inspired by the behavior of neurons in the human brain. The ANN are characterized by having many hyperparameters or configurations, during this work we will see how each hyperparameters and configurations affect the linearization of the amplifier. The power amplifier is a critical subsystem in both wireless and wired transmission systems. It is not only one of the components that consumes the most energy in the transmitter, but it is also responsible for the main non-linear effects in the transmitter chain. Nowadays, DPD (Digital Pre-Distortion) is one of the most used techniques due to its simplicity, its ability to work with large bandwidths, and its high energy efficiency. The main idea of DPD is to apply a pre-distortion to the input signal before it passes through the power amplifier, in such a way that it can counteract the non-linear distortions that the amplifier will subsequently introduce, so that the output signal is as similar as possible to the original signal. To check the effectiveness of digital predistortion with the use of neural networks and to compare them with other behavioral models, they will be simulated in Matlab and later validated by real hardware in the laboratory. These simulations will allow us to obtain results of values such as the ACPR or EVM, with which we will check if they meet the specifications of the ETSI standard., Objectius de Desenvolupament Sostenible::7 - Energia Assequible i No Contaminant, Objectius de Desenvolupament Sostenible::11 - Ciutats i Comunitats Sostenibles

Over the last years, 5G technology has been playing an increasingly important role in the aeronautical and aerospace sectors. 5G Non-Terrestrial Networks (NTN) consist of a set of elements whose objective is to complement conventional terrestrial 5G connectivity by means of components such as GEO, MEO, LEO satellite constellations, High Altitude Platform Systems (HAPS), Low Altitude Platform Systems (LAPS) and air-to-ground (A2G) networks. Some of these links can range from tens to hundreds of kilometres. To fulfil these longrange communications, it is clearly seen that the transmitted signal power should be large enough to overcome link losses. For that reason, the amplification stage plays a significant role. Highly efficient amplification architectures such as the load-modulated balance amplifier (LMBA), make use of the dynamic load modulation principle to keep the power efficiency figures high when the power amplifier is operating high peak-to-average power (PAPR) signals, such as the case of 5G new radio ones. With the objective of achieving high amplification as well as keeping fairly good efficiency, some signal linearization should be performed using digital predistortion (DPD) techniques. This project delves into a comparison among some of the most trending DPD linearization behavioral models in terms of performance and implementation complexity. These models are the single stage polynomial-based models, the N-stage cascaded polynomial-based models, and those based in artificial neural networks (ANN)., Objectius de Desenvolupament Sostenible::9 - Indústria, Innovació i Infraestructura, Objectius de Desenvolupament Sostenible::7 - Energia Assequible i No Contaminant

This paper presents and compares the implementation of a digital predistortion (DPD) linearizer for radiofrequency power amplifiers (PAs) considering two different hardware acceleration platforms. Both graphics processing unit (GPU)-based and field programmable gate arrays (FPGA)-based implementations of the DPD are capable to meet the high throughput requirements for linearizing the PA with current 5G new radio (NR) wideband signals. A comparison in terms of hardware resources usage, precision, throughput and linearization performance is provided for both GPU and FPGA implementations of a DPD based on the generalized memory polynomial (GMP) behavioral model., The authors would like to thank K. Chuang and W. Thomson from Analog Devices for providing the SLMBA used in this paper. This work was supported in part by the Ministerio de Ciencia e Innovación (MCIN)/Agencia Estatal de Investigación (AEI)/10.13039/5011000 1103 under Project PID2020-113832RB-C21, in part by the Government of Catalonia, and in part by the European Social Fund under Grant 2021-FI-B-137., Peer Reviewed, Postprint (published version)

Today, wireless communications play a crucial role in the telecommunications sector due to the emergence of new technologies such as 5G and smart cities. The amount of data to be transmitted is high, leading to an increased need for bandwidth. One of the key components in these wireless communications is Power Amplifiers (PA), as they amplify the signal to ensure it reaches the receiver correctly. However, a significant challenge with these elements is the high energy consumption they entail. To maximize the efficiency of amplifiers, efforts are made to operate them as efficiently as possible. This involves operating the amplifier in a non-linear region, causing signal distortion. Various solutions exist for balancing efficiency and linearity, with the most prevalent solution being the Digital Predistortion (DPD) technique, which is the focus of this study. The Digital Predistortion technique models the amplifier's behavior to linearize it. Different mathematical models, such as Memory Polynomial (MP), Generalized Memory Polynomial (GMP), and Decomposed Vector Rotation (DVR), have been studied for this purpose. Attempts have been made to combine these models to achieve better results. The DOMP reduction technique, simplifying the number of coefficients in each model, has also been explored. An analysis of the results obtained using these models has been conducted, considering various parameters and the number of coefficients. MATLAB has been used as the programming environment. Subsequently, the best models have been tested using a real digital predistortion environment, meeting expectations by complying with 3GPP standards., Objectius de Desenvolupament Sostenible::7 - Energia Assequible i No Contaminant, Objectius de Desenvolupament Sostenible::11 - Ciutats i Comunitats Sostenibles

(English) The power amplifier (PA) is a core element in the radio transmitters to support the required mobile and fixed broadband communication link ranges. However, the PA is a power-hungry and nonlinear by nature device. Under spectrally efficient wideband modulated waveforms with high peak-to-average power ratio, the PA energy efficiency is significantly decreased since back-off operation is needed to meet the transmission quality requirements. Moreover, when employing highly efficient amplification architectures, like Doherty, load modulated balanced amplifier (LMBA) or envelope tracking (ET) PAs, the added distortion is left as an issue to be addressed at system level by a linearizer. In this context, the closed-loop adaptive digital predistorter (DPD) is a key component of the digital front-end (DFE) to counteract the PA nonlinear response under varying conditions and to cope with the inherent trade-off between linearity and efficiency. According to the fifth generation (5G) and beyond communication technologies and the proposed radio transmitter and PA architectures, the DPD may have to deal with strong nonlinearities and memory effects, in-phase and quadrature (IQ) modulator imbalances and DC offsets, additional PA supply or load modulation distortion, and multi-antenna PA input and output cross talk and beam-dependent effects. Such impairments degrade the radio access network (RAN) energy efficiency, capacity, and the number of potential RAN users due to the increased in-band and out-of-band distortion. The adaptive DPD can overcome such undesired effects but faces relevant obstacles. At every new generation of mobile communication systems, the signal bandwidth is increased and the DPD needs to be operated at higher speed. The DPD challenges are twofold. On the one hand, combining massive bandwidth operation together with handling complex multi-dimensional effects may increase exponentially the complexity of the DPD and make it both commercially unaffordabl, (Català) L'amplificador de potència (PA) és un element central als radiotransmissors necessari per abastar les distàncies d'enllaç a les comunicacions sense fils de banda ampla mòbil i fixa. No obstant, el PA és un dispositiu d’elevat consum energètic i de comportament no lineal per naturalesa. Quan s’utilitzen formes d’ona de banda ampla i gran eficiència espectral que presenten elevada relació de potència de pic a potència mitjana, l’eficiència energètica del PA decreix significativament atès que és necessari operar el dispositiu amb un marge de guarda per complir amb els requisits de qualitat de transmissió. Addicionalment, quan s’utilitzen arquitectures d’amplificació altament eficients basades en PAs de tipus Doherty, modulació de càrrega d’amplificador balancejat (LMBA) o modulació d’envoltant (ET), la distorsió afegida es deixa com un problema a resoldre a nivell de sistema per un linealitzador. En aquest context, el predistorsionador digital (DPD) adaptatiu de llaç tancat és un element clau del capçal digital de processament ràdio (DFE) per contrarestar la resposta no lineal del PA en condicions variables i superar el compromís inherent entre linealitat i eficiència. D’acord amb les tecnologies de comunicació de cinquena generació (5G) i les arquitectures de transmissor i PA proposades, el DPD pot haver de tractar amb fortes no linealitats i efectes de memòria, desajustaments de modulador en fase i quadratura (IQ) i desviacions de nivell de contínua, distorsió addicional per modulació d’alimentació o càrrega del PA, efectes d’acoblament creuat a l’entrada i sortida dels PAs en sistemes multiantena, així com efectes que poden dependre de l’apuntament dels feixos de l’antena. Aquestes imperfeccions degraden l’eficiència de la xarxa d’accés ràdio (RAN), la seva capacitat i el nombre d’usuaris a causa de l’augment de distorsió generada dins de banda i fora de banda. El DPD adaptatiu pot combatre aquests efectes no desitjats però s’enfronta a obstacles rellevants, Postprint (published version)

This paper presents shaping and linearization techniques to trade-off linearity and power efficiency in a dual-input pseudo-Doherty load-modulated balanced amplifier (PD-LMBA). The proposed shaping function is defined to operate in the frequency domain and it is oriented at exploiting the dual-input architecture of the PD-LMBA to either enhance linearity or power efficiency. In addition, since the linearity requirements are not met by simply shaping the input signals, digital predistortion (DPD) linearization is applied on top of it. Experimental validation of the proposed shaping function and DPD linearization is provided for a PD-LMBA excited with 200 MHz bandwidth 5G-like modulated signals with 8 dB of PAPR. For an output power around 40 dBm, the PD-LMBA presents a power efficiency around 50%, while meeting the linearity specs of -45 dB of adjacent channel power ratio (ACPR) and error vector magnitude (EVM) below 3%., The work in this paper was supported in part by the project PID2020- 113832RB-C21 funded by MCIN/AEI/10.13039/50110001103 and in part by the Government of Catalonia and the European Social Fund under Grant 2021- FI-B-137., Peer Reviewed, Postprint (published version)

This paper presents an automated process for generating computationally efficient radiofrequency (RF) power amplifier (PA) behavioural models that can be used for digital-predistortion (DPD) linearization. The implementation of the DPD behavioral model is based on the personal computer (PC) architecture including recent graphical process units (GPUs) with compute unified device architecture (CUDA) cores. By utilizing the parallel computing capability, the proposed implementation can achieve high baseband throughput required by nowadays 5G new radio (NR) communications and the inherent DPD bandwidth expansion. The details of the DPD implementation will be given and the advantages and disadvantages of the GPU DPD will be discussed. Experimental results will validate the DPD implementation in a hardware-in-the-loop (HITL) environment with a system-on-chip (SoC) PA operated with a 100 MHz 5G-NR signal., The work in this paper was funded by Huawei Technologies from January 2022 to December 2022; and supported in part by the project PID2020- 113832RB-C21 funded by MCIN/AEI/10.13039/50110001103 and in part by the Government of Catalonia and the European Social Fund under Grant 2021- FI-B-137, Peer Reviewed, Postprint (published version)

This paper presents two linearization strategies for a custom-designed wideband push-pull (PP) power amplifier (PA) for wired communication applications such as, for example, cable TV. Two digital predistortion (DPD) behavioral models are proposed to meet the in-band and out-of-band linearity requirements when efficiently amplifying wideband DOCSIS signals with high fractional bandwidth (FBW). A radiofrequency (RF) DPD linearizer based on a band-pass generalized memory polynomial (BP-GMP) behavioral model and a baseband (BB) I-Q DPD linearizer based on a harmonic distortion GMP (HD-GMP) behavioral model are proposed. Both DPD models take into account the harmonic distortion typical of high FBW amplification. Experimental results will show high efficient and linear amplification of a 4 × 192 MHz composite DOCSIS signal by properly combining a crest factor reduction (CFR) technique and the proposed DPD strategies., The work in this paper was funded by Huawei Technologies from March 2017 to April 2019; and supported in part by the project PID2020-113832RB- C21 funded by MCIN/AEI/10.13039/50110001103., Peer Reviewed, Postprint (author's final draft)

This paper presents a low-complexity open-loop digital linearization system for handset applications with non-flat frequency response when considering a 5G new radio dynamic bandwidth re-allocation scenario. The proposed digital predistorter (DPD) is scalable with the signal bandwidth by simply activating or deactivating basis kernels, without re-training nor re-assigning the model coefficients. To support this feature, an incremental bandwidth (IBW) generalized memory polynomial behavioral model is proposed, and the coefficients adaptation procedure is described. In order to find the most relevant basis supporting the IBW feature, a constrained version of the doubly orthogonal matching pursuit (DOMP) algorithm is proposed. Experimental results considering a handset power amplifier (PA) SoC under a mismatched load condition (i.e., non-flat frequency response) will validate the proposed approach., The work in this paper was funded by Huawei Technologies from January 2022 to December 2022; and supported in part by the project PID2020-113832RB-C21 funded by MCIN/AEI/10.13039/50110001103 and in part by the Government of Catalonia and the European Social Fund under Grant 2021-FI-B-137., Peer Reviewed, Postprint (author's final draft)

This article presents a scalable digital predistortion (DPD) linearizer for handset power amplifiers (PAs) with nonflat frequency response and assuming a 5G scenario with dynamic resource blocks (RBs) reallocation. The scalable DPD model is designed to be both bandwidth and frequency-dependent, including some design constraints targeting a resource-efficient hardware implementation. In order to extract the most relevant basis functions that better trade-off the linearization performance and the required resources of a hardware implementation of the DPD, a feature selection technique based on a constrained version of the doubly orthogonal matching pursuit (DOMP) is proposed. The linearization performance of the proposed DPD method is evaluated on a PA system-on-chip (SoC), considering 5G new radio (NR) signals at different frequency locations and with different bandwidths within a 100 MHz channel., This work was supported in part by Huawei Technologies from July 2022 to August 2023, in part by the Ministerio de Ciencia e Innovación (MCIN)/Agencia Estatal de Investigación (AEI)/10.13039/50110001103 under Project PID2020-113832RB-C21, in part by the Government of Catalonia, and in part by the European Social Fund under Grant 2021-FI-B-137., Peer Reviewed, Postprint (author's final draft)

Lists future events that should be of interest to practitioners and researchers., Peer Reviewed, Postprint (published version)

In a satellite communication system, due to the limited amount of energy that can be obtained through photovoltaic cells, there are some constraints on the downlink capabilities, especially for small satellites. A typical small satellite can only distribute roughly less than one fifth of the total power it generates (i.e., around a few hundreds of watts). This is a power constraint for achieving high-data-rate communications systems for small satellites. A several hundred Mbps downlink system on a conventional large satellite consumes several hundreds of watts. Therefore, an improvement of the power efficiency of the satellite communications components is crucial to reduce the energy consumption, and thus improve the transmission rate. One of the key elements in the satellite transmitter signal chain is the power amplifier (PA)., Peer Reviewed, Postprint (published version)

This article presents a low-complexity linearization method to compensate for multisource nonlinear distortion in wideband envelope tracking (ET) power amplifiers (PAs) for 5G new radio (NR) mobile terminals. The proposed linearization approach consists in an envelope leakage cancellation (ELC) system operating in the dynamic supply path and a 2-D digital predistortion (2-D-DPD) linearizer acting on the baseband complex modulated signal. In a first step, an envelope generalized memory polynomial (EGMP) behavioral model is proposed to compensate for the unwanted radio frequency (RF) leakage that appears at the output of ET modulator (ETM). Then, a baseband 2-D-DPD linearizer based on a slow envelope-dependent generalized memory polynomial (SED-GMP) behavioral model is used to further enhance the linearization performance. The proposed method is validated on a system-on-chip (SoC) ET PA board for mobile applications. The reported experimental results show how the proposed digital linearization approach can mitigate the linearity and efficiency trade-off in ET PAs. Consequently, the out-of-band linearity requirement of - 36 dBc of adjacent channel power ratio (ACPR) is met for 5G-NR test signals with bandwidths ranging from 60 to 200 MHz at 2.55 GHz (band B41), with an overall ET PA power efficiency ranging from 10.1 % and up to 16.5 % , depending on the signal bandwidth., The work in this paper was funded by Huawei Technologies from July 2020 to August 2021; and supported in part by the project PID2020-113832RB-C21 funded by MCIN/AEI/10.13039/50110001103 and in part by the Government of Catalonia and the European Social Fund under Grant 2021-FI-B-137. This paper is an expanded version from the IEEE Topical Conference on RF/Microwave Power Amplifiers for Radio and Wireless Applications (PAWR), Las Vegas, NV, USA, January 2022., Peer Reviewed, Postprint (author's final draft)

This paper presents a novel linearization method to compensate for load-mismatched power amplifiers in 5G new radio mobile terminals. The proposed digital predistortion (DPD) approach is based on a frequency-dependent memoryless polynomial behavioral model that allows meeting the linearity specifications under dynamic resource block (RB) allocation when considering narrowband signals. The advantage of the proposed frequency-dependent method is experimentally validated by comparing it with a classical DPD approach where the coefficients are trained only for a specific RB location., This project was funded by Huawei Technologies from July 2021 to August 2022; and supported in part by the Ministerio de Ciencia e Innovación and FEDER under Grant PID2020-113832RB-C21 and in part by the Government of Catalonia and the European Social Fund under Grant 2021-FI-B-137., Peer Reviewed, Postprint (author's final draft)

© 2022 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works., In 5G and beyond radios, the increased bandwidth, the fast-changing waveform scenarios, and the operation of large array multiple-input multiple-output (MIMO) transmitter architectures have challenged both the polynomial and the artificial neural network (ANN) MIMO adaptive digital predistortion (DPD) schemes. This article proposes training data selection methods and dimensionality reduction techniques that can be combined to enable relevant reductions of the DPD training time and the implementation complexity for MIMO transmitter architectures. In this work, the combination of an efficient uncorrelated equation selection (UES) mechanism together with orthogonal least squares (OLS) is proposed to reduce the training data length and the number of basis functions at every behavioral modeling matrix in the polynomial MIMO DPD scheme. For ANN MIMO DPD architectures, applying UES and principal component analysis (PCA) is proposed to reduce the input dataset length and features, respectively. The UES-OLS and the UES-PCA techniques are experimentally validated for a 2×2 MIMO test setup with strong power amplifier (PA) input and output crosstalk., This work was supported in part by the MCIN/AEI/10.13039/501100011033 under Project PID2020-113832RB-C22 and Project PID2020-113832RB-C21; and in part by the European Union-NextGenerationEU through the Spanish Recovery, Transformation and Resilience Plan, under Project TSI-063000-2021-121 (MINECO UNICO Programme)., Peer Reviewed, Postprint (author's final draft)

This final degree project is part of the development and integration of a video assistance application to cover the need for a tool that connects remotely and directly between civil servants and citizens and thus provide both better support and greater accessibility to the different citizen assistance services offered by the Generalitat de Catalunya. The application will be developed from the base of the open source application jitsi, but different functionalities will be integrated to respond to the requirements of the final video assistance application, sending files, securing the room, recording assistance or moderator controls for the servant, among others. The application to be developed will be integrated into the web page that provides service to the Generalitat de Catalunya, where a well-defined panel is contemplated for the servant, so that he can view and start the appointments in chronological order and finish them once they have finished, to the citizen, a component will be developed to request an appointment according to the availability of schedules and the service to demand. Thus, two blocks will be contemplated, the development of video assistance on the one hand and its integration in the environment with the required functionalities on the other. The application will be developed mostly in React, a framework of javascript for the frontend, while the backend will be developed in c#.

This paper presents a new linearization method to compensate for the unwanted RF leakage that appears at the ouput of envelope tracking modulators (ETMs) when operating envelope tracking (ET) power amplifiers (PAs) with wideband signals. This RF leakage is combined in the ETM with the dy-namic supply signal and generates unwanted nonlinear distortion at the RF output of the ET PA. A leakage cancellation method based on an envelope generalized memory polynomial (EGMP) behavioral model is proposed to compensate for this unwanted distortion. The linearization method is validated on a system-on-chip ET PA board designed by Hisilicon for mobile applications. Thanks to the proposed cancellation technique, it is possible to meet the out-of-band linearity requirements when considering a 60 MHz bandwidth new radio OFDM-like signal at band 7. © 2022 IEEE., Peer Reviewed, Postprint (published version)

This paper presents an envelope linearization technique to compensate for the nonlinear distortion of envelope tracking (ET) power amplifiers (PAs) for 5G new radio (NR) mobile terminals. The proposed envelope optimization (EOPT) method is agnostic of the nonlinear distortion generated in the envelope supply path and can compensate for the nonlinear distortion at the ET PA output without the need to monitor the output at the envelope tracking modulator (ETM). The linearization system in the envelope path is based on the envelope generalized memory polynomial (EGMP) behavioral model. Since the ETM output is not available, an iterative nonlinear least squares solution inspired in the deep deterministic policy gradient (DDPG) algorithm is proposed to extract the coefficients of the EGMP model. The EOPT method is validated on a system-on-chip (SoC) ET PA board designed for mobile terminal applications. Experimental results show the suitability of the proposed method to guarantee the linearity requirements (i.e., adjacent channel power ratio below -36 dBc) with 16.8% of power efficiency when operating the ET PA with 5G new radio test signals of 60 MHz bandwidth operating at 2.55 GHz (band 7). The linearization performance of the proposed EOPT method is comparable to the envelope leakage cancellation (ELC) approach (but saving the need for an analog to digital converter to monitor the ETM output), and can outperform a conventional I-Q digital predistorter based on the generalized memory polynomial (GMP) behavioral model., This research was funded by Huawei Technologies from July 2020 to August 2021; and supported in part by the project PID2020-113832RB-C21 funded by MCIN/AEI/10.13039/50110001103 and in part by the Government of Catalonia and the European Social Fund under Grant 2021-FI-B-137., Peer Reviewed, Postprint (published version)

This paper focuses on the FPGA implementation of a slew-rate reduction (SR) shaping function for envelope tracking (ET) power amplifiers (PAs). The SR envelope has been proved effective to trade-off power efficiency and linearity in ET PA systems where the envelope tracking modulator (ETM) is bandwidth limited. However, the implementation issues need to be addressed when targeting high clock rates to cope with current 5G new radio wide-band signals. This paper shows the FPGA implementation of the SR envelope generation. We explore the use of high-level synthesis (HLS) for the SR envelope generation to evaluate the performance and resource usage of the hardware architecture. The HLS design is also compared with a hand-written hardware description language (HDL) version. An in-depth analysis shows strengths and limitations of the HLS design to meet the timing constraints when considering a throughput of 614.4 MSa/s. © 2022 IEEE., Peer Reviewed, Postprint (published version)

This article proposes a methodology to ensure linear amplification of a load modulated balanced amplifier (LMBA) while keeping the power efficiency as high as possible over a frequency band ranging from 1.8 to 2.4 GHz and where the transmitted signals can present different bandwidth (BW) configurations. The proposed reconfigurable linearization methodology consists of, in a first step, tuning some free parameters (with dependence on the signal BW and frequency of operation) of the LMBA to trade-off linearity and power efficiency. In a second step, two multipurpose adaptive digital predistortion (DPD) linearizers are considered, properly combined with crest factor reduction (CFR) techniques, to meet the required linearity specifications. Either a DPD based on artificial neural networks or a DPD based on polynomials can be selected taking into account the compromise between computational complexity and linearization performance. Experimental results will validate the proposed methodology to guarantee the linearity levels (ACPR < -45 dBc and EVM < 1%) with high power efficiency in an LMBA under dynamic transmission, where both the signal BW (from 20 and up to 200-MHz instantaneous BW) and frequency of operation (in the range of 1.8-2.4 GHz) change., This work was supported in part by the Spanish Government (Ministerio de Ciencia, Innovación y Universidades) and FEDER (Fondo Europeo de Desarrollo Regional) under Grant TEC2017-83343-C4-2-R and in part by the Generalitat de Catalunya under Grant 2017 SGR 813. This paper is an expanded version from the International Workshop on Integrated Nonlinear Microwave and Millimetre-Wave Circuits (INMMiC), Cardiff, United Kingdom, July 2020., Peer Reviewed, Postprint (author's final draft)

This paper presents an auto-tuning approach for dual-input power amplifiers using a combination of global optimisation search algorithms and adaptive linearisation in the optimisation of a multiple-input power amplifier. The objective is to exploit the extra degrees of freedom provided by dual-input topologies to enhance the power efficiency figures along wide signal bandwidths and high peak-to-average power ratio values, while being compliant with the linearity requirements. By using heuristic search global optimisation algorithms, such as the simulated annealing or the adaptive Lipschitz Optimisation, it is possible to find the best parameter configuration for PA biasing, signal calibration, and digital predistortion linearisation to help mitigating the inherent trade-off between linearity and power efficiency. Experimental results using a load-modulated balanced amplifier as device-under-test showed that after properly tuning the selected free-parameters it was possible to maximise the power efficiency when considering long-term evolution signals with different bandwidths. For example, a carrier aggregated a long-term evolution signal with up to 200 MHz instantaneous bandwidth and a peak-to-average power ratio greater than 10 dB, and was amplified with a mean output power around 33 dBm and 22.2% of mean power efficiency while meeting the in-band (error vector magnitude lower than 1%) and out-of-band (adjacent channel leakage ratio lower than -45 dBc) linearity requirements., This work was supported in part by the Spanish Government (Ministerio de Ciencia, Innovación y Universidades) and Fondo Europeo de Desarrollo Regional (FEDER) under Grant TEC2017-83343-C4-2-R and in part by the Generalitat de Catalunya under Grant 2017 SGR 813., Peer Reviewed, Postprint (published version)

This paper presents a scalable look-up table (LUT) architecture for implementing digital predistortion (DPD) linearizers in a field programmable gate array (FPGA) by using the high-level synthesis (HLS) software. This architecture can be used in most memory-based DPD behavioral models whose basis functions can be expressed as a combination of basic predistortion cells (BPCs). The advantages of the proposed LUT-based architecture are evidenced in terms of resources usage, throughput, and power consumption of the corresponding programmable logic (PL). The DPD linearization performance was tested considering different LUT sizes on a load-modulated balanced amplifier (LMBA), using two LTE 20 MHz signals over a total 60 MHz instantaneous bandwidth., The authors would like to thank Prof. Roberto Quaglia from Cardiff Univ. for the donation of the LMBA used in this paper.This work was supported in part by the Spanish Government MICINN and FEDER under Grant TEC2017-83343-C4-2-R and in part by the Generalitat de Catalunya under Grant 2017 SGR 813., Peer Reviewed, Postprint (published version)

The power amplifier (PA) is the most critical subsystem in terms of linearity and power efficiency. Digital predistortion (DPD) is commonly used to mitigate nonlinearities while the PA operates at levels close to saturation, where the device presents its highest power efficiency. Since the DPD is generally based on Volterra series models, its number of coefficients is high, producing ill-conditioned and over-fitted estimations. Recently, a plethora of techniques have been independently proposed for reducing their dimensionality. This paper is devoted to presenting a fair benchmark of the most relevant order reduction techniques present in the literature categorized by the following: (i) greedy pursuits, including Orthogonal Matching Pursuit (OMP), Doubly Orthogonal Matching Pursuit (DOMP), Subspace Pursuit (SP) and Random Forest (RF); (ii) regularization techniques, including ridge regression and least absolute shrinkage and selection operator (LASSO); (iii) heuristic local search methods, including hill climbing (HC) and dynamic model sizing (DMS); and (iv) global probabilistic optimization algorithms, including simulated annealing (SA), genetic algorithms (GA) and adaptive Lipschitz optimization (adaLIPO). The comparison is carried out with modeling and linearization performance and in terms of runtime. The results show that greedy pursuits, particularly the DOMP, provide the best trade-off between execution time and linearization robustness against dimensionality reduction., This work was supported in part by the Spanish Government (Ministerio de Ciencia, Inno- vación y Universidades) and Fondo Europeo de Desarrollo Regional (FEDER) under Grants TEC2017- 83343-C4-2-R and PID2020-113832RB-C21 and in part by the Government of Catalonia and the European Social Fund under Grants 2017-SGR-813 and 2021-FI-B-137., Peer Reviewed, Postprint (published version)

The artificial neural networks (ANN) are gaining momentum in the digital predistorters (DPD) thanks to their inherently good approximation capabilities. Under strong or complex power amplifier nonlinearities, the size of the ANN can increase and lead to long training periods which are unaffordable in fast-changing waveform scenarios like those proposed for 5G or 6G. In this work we combine the orthogonal matching pursuit technique together with dataset length reduction methods, to significantly shorten the ANN DPD coefficients update time., This work was supported in part by the Spanish Government (Ministerio de Ciencia, Innovación y Universidades) and the Fondo Europeo de Desarrollo Regional (FEDER) under grants RTI2018-099841-B-I00 and TEC2017-83343-C4-2-R, and in part by the Generalitat de Catalunya under grants 2017 SGR 891 and 2017 SGR 813., Peer Reviewed, Postprint (author's final draft)

Over the past half century, the improvements in spacecraft technology have been primarily in the areas of microelectronics for on-board processing, high frequency electronic devices, and integrated circuits for communications and navigation, solar cells and batteries for on-board power generation and storage among many others. Despite the fact that energy-storage technologies have advanced dramatically over the past years, the power consumption of on-board communications, sensors and digital signal processing systems is of paramount importance in battery or solar powered systems such as small satellites, HAPs or UAVs (drones). There is multiple applications that involves the use of these systems, e.g., Earth observation applications, surveillance, broadcast communications, scientific research, etc. In wireless communications, the power amplifier is a critical subsystem in the transmitter chain. Not only because it is one of the most power hungry devices that accounts for most of the direct current power consumption, but also because it is the main source of nonlinear distortion in the transmitter. Amplitude and phase modulated communications signals presenting high peak-to-average power ratio have a negative impact in the transmitter's power efficiency, because the PA has to be operated at high power back-off levels to avoid introducing nonlinear distortion. Digital predistortion (DPD) linearization is the most common and spread solution to cope with power amplifiers (PA) inherent linearity versus efficiency trade-off. When considering wide bandwidth signals, such as Doherty PAs, envelope tracking PAs or outphasing transmitters, the number of parameters required in the DPD model to compensate for both nonlinearities and memory effects can be very high. This has a negative impact in the DPD ceofficients extraction, because increases the computational complexity and drives to over-fitting and uncertainty. However, by applying dimensionality reduction techniques we can

This letter proposes a mesh-selecting (MeS) method for complex-valued signals oriented at significantly reducing the training data required to extract the parameters of mathematical models for characterizing the nonlinear behavior of power amplifiers or digital predistortion linearizers. Experimental results will show the advantages of the proposed MeS method when properly combined with dimensionality reduction techniques. A reduction of the parameters' identification computational complexity by a factor of 65 can be achieved with respect to training with consecutive samples and employing the commonly used QR least-squares solution., Peer Reviewed, Postprint (published version)

Nowadays, unmanned aerial vehicles (UAV) have become one of the most popular tools that can be used in commercial, scientific, agricultural and military applications. As drones become faster, smaller and cheaper, with the ability to add payloads, the usage of the drone can be versatile. In most of the cases, unmanned aerials systems (UAS) are equipped with a wireless communication system to establish a link with the ground control station to transfer the control commands, video stream, and payload data. However, with the limited onboard calculation resources in the UAS, and the growing size and volume of the payload data, computational complex signal processing such as deep learning cannot be easily done on the drone. Hence, in many drone applications, the UAS is just a tool for capturing and storing data, and then the data is post-processed off-line in a more powerful computing device. The other solution is to stream payload data to the ground control station (GCS) and let the powerful computer on the ground station to handle these data in real-time. With the development of communication techniques such as orthogonal frequency-division multiplexing (OFDM) and multiple-input multiple-output (MIMO) transmissions, it is possible to increase the spectral efficiency over large bandwidths and consequently achieve high transmission rates. However, the drone and the communication system are usually being designed separately, which means that regardless of the situation of the drone, the communication system is working independently to provide the data link. Consequently, by taking into account the position of the drone, the communication system has some room to optimize the link budget efficiency. In this master thesis, a power-efficient wireless communication downlink for UAS has been designed. It is achieved by developing an automatic transmit power control system and a custom OFDM communication system. The work has been divided into three parts: research of the drone co

This paper evaluates the effect of the phase shift between the two control signals in a dual-input load modulated balanced amplifier (LMBA). While the drain efficiency of the LMBA is not significantly affected by the phase shift between the control signals, the LMBA linearity instead can be significantly degraded if the phase shift parameter is not properly chosen. Therefore, we can predict the optimal phase shift between both LMBA control signals to enhance linearity levels when considering a 20 MHz bandwidth LTE transmission over a center frequency of operation ranging from 1.8 GHZ to 2.5 GHz. Experimental results showing the LBMA linearity and power efficiency after digital predistortion (DPD) linearization are presented. Finally, additional key parameters contributing to improve the LBMA power efficiency are discussed., This work was supported in part by the Spanish Government and FEDER under Grant TEC2017-83343-C4-2-R and in part by the Generalitatde Catalunya under Grant 2017 SGR 813, Peer Reviewed, Postprint (published version)

This PhD thesis provides a fast engineering approach to the design of digital predistortion (DPD) linearizers from several perspectives: i) enhancing the off-line training performance of open-loop DPD, ii) providing robustness and reducing the computational complexity of the parameters identification subsystem and, iii) importing machine learning techniques to favor the automatic tuning of power amplifiers (PAs) and DPD linearizers with several free-parameters to maximize power efficiency while meeting the linearity specifications. One of the essential parts of unmanned aerial vehicles (UAV) is the avionics, being the radio control one of the earliest avionics present in the UAV. Unlike the control signal, for transferring user data (such as images, video, etc.) real-time from the drone to the ground station, large transmission rates are required. The PA is a key element in the transmitter chain to guarantee the data transmission (video, photo, etc.) over a long range from the ground station. The more linear output power, the better the coverage or alternatively, with the same coverage, better SNR allows the use of high-order modulation schemes and thus higher transmission rates are achieved. In the context of UAV wireless communications, the power consumption, size and weight of the payload is of significant importance. Therefore, the PA design has to take into account the compromise among bandwidth, output power, linearity and power efficiency (very critical in battery-supplied devices). The PA can be designed to maximize its power efficiency or its linearity, but not both. Therefore, a way to deal with this inherent trade-off is to design high efficient amplification topologies and let the PA linearizers take care of the linearity requirements. Among the linearizers, DPD linearization is the preferred solution to both academia and industry, for its high flexibility and linearization performance. In order to save as many computational and power resources as possib, Aquesta tesi doctoral proporciona unes pautes per al disseny de linealitzadors basats en predistorsió digital (DPD) des de diverses perspectives: i) millorar el rendiment del DPD en llaç obert, ii) proporcionar robustesa i reduir la complexitat computacional del subsistema d'identificació de paràmetres i, iii) incorporació de tècniques d'aprenentatge automàtic per afavorir l'auto-ajustament d'amplificadors de potència (PAs) i linealitzadors DPD amb diversos graus de llibertat per poder maximitzar l’eficiència energètica i al mateix temps acomplir amb les especificacions de linealitat. Una de les parts essencials dels vehicles aeris no tripulats (UAV) _es l’aviònica, sent el radiocontrol un dels primers sistemes presents als UAV. Per transferir dades d'usuari (com ara imatges, vídeo, etc.) en temps real des del dron a l’estació terrestre, es requereixen taxes de transmissió grans. El PA _es un element clau de la cadena del transmissor per poder garantir la transmissió de dades a grans distàncies de l’estació terrestre. A major potència de sortida, més cobertura o, alternativament, amb la mateixa cobertura, millor relació senyal-soroll (SNR) la qual cosa permet l’ús d'esquemes de modulació d'ordres superiors i, per tant, aconseguir velocitats de transmissió més altes. En el context de les comunicacions sense fils en UAVs, el consum de potència, la mida i el pes de la càrrega útil són de vital importància. Per tant, el disseny del PA ha de tenir en compte el compromís entre ample de banda, potència de sortida, linealitat i eficiència energètica (molt crític en dispositius alimentats amb bateries). El PA es pot dissenyar per maximitzar la seva eficiència energètica o la seva linealitat, però no totes dues. Per tant, per afrontar aquest compromís s'utilitzen topologies amplificadores d'alta eficiència i es deixa que el linealitzador s'encarregui de garantir els nivells necessaris de linealitat. Entre els linealitzadors, la linealització DPD és la solució preferida tant p, Postprint (published version)

© 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works, Digital predistortion (DPD) is the linearization technique most often used to cope with the inherent tradeoff between linearity and efficiency in power amplifiers (PAs). Adaptation is needed to optimize DPD performance. This article reviews strategies for estimating the parameters controlling the DPD linearizer., This work was supported in part by the Spanish Government and Fonds Européen de Développement Économique et Régional under Ministerio de Ciencia, Innovación y Universidades projects TEC2017-83343- C4-1-R and TEC2017-83343-C4-2-R and by the Generalitat de Catalunya under Grant 2017 SGR 813., Peer Reviewed, Postprint (published version)

© 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works, This paper presents a holistic approach to design and linearize a wideband outphasing power amplifier (PA) to efficiently amplify a 200 MHz bandwidth (BW) signal compliant with the Data Over Cable Service Interface Specification (DOCSIS) standard. The proposed outphasing PA, based on a load insensitive GaN HEMT class-E topology, was designed to face the trade-off between the output power control range to be covered with high efficiency and the desired BW. Operated following an isogain approach, the linearity performance is ensured by applying digital predistortion linearization, which combined with crest factor reduction (CFR) techniques can enhance the overall power efficiency. An 18.7 % average efficiency has been measured when fitting the standard in-band and out-of-band linearity requirements for a 26.3 dBm 64 QAM DOCSIS signal with 12.2 dB of PAPR., This project was funded by Huawei Technologies from March 2017 to April 2019. In addition, the work was supported in part by the Spanish Government (Ministerio de Ciencia Innovación y Universidades) and the Fondo Europeo de Desarrollo Regional (FEDER) under Grant TEC2017-83343-C4-1-R and TEC2017-83343-C4-2-R; and in part by the Generalitat de Catalunya under Grant 2017 SGR 813., Peer Reviewed, Postprint (author's final draft)

This final degree project focuses on the analysis and linearization of a load modulated balanced amplifier (LMBA), designed to operate with wide bandwidth signals without degrading the amplifier's efficiency. This type of amplifier can be used in unmanned aerial vehicles that require a high data transmission rate, where it is critical to maintain high levels of efficiency to minimize consumption and maximize flight autonomy, as well as in base stations to be used with the new 5G standard. In this project the parameters involved in the LMBA (the phase shift between the two signals that control the amplifier and the relationship between these two amplitudes) and its effects on the linearity and efficiency are analyzed. In addition, a number of steps are proposed to follow for proper settings and get the most out of this amplifier. Finally, the linearization of the amplifier is performed with a digital predistorter based on an artificial neural network made up of several hidden layers, and these results are compared to the results obtained with the GMP (Generalized Memory Polynomial) method for different LTE signals.

This is the pre-peer reviewed version of the following article: González‐Rodríguez, M., Collado, C., González‐Arbesú, J. M., Mateu, J., Montoro, G., & Gilabert, P. L. (2021). Tone injection‐based cancellation technique for nonlinear distortion reduction of modulated signals in BAW resonators. Microwave and Optical Technology Letters, 63(3), 781-786, which has been published in final form at https://onlinelibrary.wiley.com/doi/10.1002/mop.32670. This article may be used for non-commercial purposes in accordance with Wiley Terms and Conditions for Use of Self-Archived Versions., A technique for the reduction of third-order intermodulation distortion (IMD3) occurring in bulk acoustic wave (BAW) filters and multiplexers is presented. The method consists of using the intrinsic second-order intermodulation distortion generated by BAW filters and multiplexers themselves by injecting an externally controlled amplitude and phase modulated signal at low frequency to compensate for the IMD3. The proposed technique has been experimentally verified by performing IMD3 measurements in a single BAW resonator subject to several modulated signals under a nonlinear scenario., Secretary of Universities and Research of the Generalitat de Catalunya and the European Social Fund, Grant/Award Number: FI_B-00136; Spanish Government, Grant/Award Numbers: 2017 SGR-813,TEC2017-84817-C2-2-R, TEC2017-88343-C4-2-R, Peer Reviewed, Postprint (author's final draft)

Nowadays, unmanned aerial vehicles (UAV) have become one of the most popular tools that can be used in commercial, scientific, agricultural and military applications. As drones become faster, smaller and cheaper, with the ability to add payloads, the usage of the drone can be versatile. In most of the cases, unmanned aerials systems (UAS) are equipped with a wireless communication system to establish a link with the ground control station to transfer the control commands, video stream, and payload data. However, with the limited onboard calculation resources in the UAS, and the growing size and volume of the payload data, computational complex signal processing such as deep learning cannot be easily done on the drone. Hence, in many drone applications, the UAS is just a tool for capturing and storing data, and then the data is post-processed off-line in a more powerful computing device. The other solution is to stream payload data to the ground control station (GCS) and let the powerful computer on the ground station to handle these data in real-time. With the development of communication techniques such as orthogonal frequency-division multiplexing (OFDM) and multiple-input multiple-output (MIMO) transmissions, it is possible to increase the spectral efficiency over large bandwidths and consequently achieve high transmission rates. However, the drone and the communication system are usually being designed separately, which means that regardless of the situation of the drone, the communication system is working independently to provide the data link. Consequently, by taking into account the position of the drone, the communication system has some room to optimize the link budget efficiency. In this master thesis, a power-efficient wireless communication downlink for UAS has been designed. It is achieved by developing an automatic transmit power control system and a custom OFDM communication system. The work has been divided into three parts: research of the drone co

The ongoing migration flows of refugees and immigrants who escape from war and conflict zones to seek asylum and stable living conditions in European countries, have created a multitude of humanitarian crisis sites. The latter are typically encountered in uninhabited islands, remote coastal areas and other isolated locations, where public protection and disaster relief (PPDR) communications need to be deployed over professional mobile radio (PMR) networks, in order to provide broadband communication services to rescuers, first aiders and other on-site agents. The PMR coverage in such humanitarian crisis sites could not always be guaranteed, whereas radio interferences and jammers from neighbouring countries could further impair the operability of the critical PPDR communications. In such cases, an emergency roll out of broadband PMR services might be required. In order to tackle the interference and poor coverage conditions, this PMR deployment must be reconfigurable by nature and able to co-exist with another primary radio transmission. In the potential scenario we are envisioning, the primary transmission is a 4G LTE one. The key prerequisite of this radio co-existence is the efficient and interference-free use of the licensed spectrum from the secondary broadband PMR transmission. In this chapter we show that using a filter bank multi-carrier (FBMC) waveform for the PMR transmission satisfies these requirements due to its spectral containment and spectral shape. Moreover, given the potentially constrained energy supply and the complex spectral coexistence scenario, the broadband PMR base station transmitter needs to employ power amplifier (PA) digital linearization techniques such as crest factor reduction (CFR) and digital predistortion (DPD), to maximize the energy efficiency when operating with high peak-to-average power (PAPR) multi-carrier modulations and minimize the spectral emission in primary transmission bands due to the PA non-linear distortion. In fac, This work was supported in part by the Spanish Government (Ministerio de Ciencia, Innovación y Universidades) and the Fondo Europeo de Desarrollo Regional (FEDER) under grants RTI2018-099841-B-I00, TEC2017-88373 and TEC2017-83343-C4-2-R, and in part by the Generalitat de Catalunya under grants 2017 SGR 891, 2017 SGR 1479 and 2017 SGR 813, Peer Reviewed, Postprint (author's final draft)

Examen E1

This paper presents a technique for selecting onlinethe coefficients to be updated in a digital predistorter (DPD)based on direct learning. The proposed method, which is basedon a combination of matching pursuit (MP) and least squares(LS) techniques (and is therefore named MP-LS method) allowsto improve the power amplifier (PA) linearization performanceof a fixed number of DPD coefficients, due to the fact that ateach DPD iteration the coefficients to be updated are properlychosen. The proposed technique is compared to a conventional LSestimation, and experimental results demonstrate that the MP-LSmethod can provide a performance improvement in relation toa DPD with fixed-preselected coefficients. The method could beespecially useful in DPD systems that have hardware restrictionsin the resources to be used by the update subsystem in thefeedback path. That is the case of DPDs based on FPGA devicesimplementing a QR algorithm in the programmable logic (PL)side, This work was partially supported by the Spanish Govern-ment (MICINN) and FEDER under project TEC2017-83343-C4-2-R, and by the Generalitat de Catalunya under grants 2017SGR 891 and 813., Peer Reviewed, Postprint (published version)

The power efficiency and linearity of radio frequency (RF) power amplifiers (PAs) are critical in wireless communication systems. The main scope of PA designers is to build the RF PAs capable to maintain high efficiency and linearity figures simultaneously. However, these figures are inherently conflicted to each other and system-level solutions based on linearization techniques are required. Digital predistortion (DPD) linearization has become the most widely used solution to mitigate the efficiency versus linearity trade-off. The dimensionality of the DPD model depends on the complexity of the system. It increases significantly in high efficient amplification architectures when considering current wideband and spectrally efficient technologies. Overparametrization may lead to an ill-conditioned least squares (LS) estimation of the DPD coefficients, which is usually solved by employing regularization techniques. However, in order to both reduce the computational complexity and avoid ill-conditioning problems derived from overparametrization, several efforts have been dedicated to investigate dimensionality reduction techniques to reduce the order of the DPD model. This dissertation contributes to the dimensionality reduction of DPD linearizers for RF PAs with emphasis on the identification and adaptation subsystem. In particular, several dynamic model order reduction approaches based on feature extraction techniques are proposed. Thus, the minimum number of relevant DPD coefficients are dynamically selected and estimated in the DPD adaptation subsystem. The number of DPD coefficients is reduced, ensuring a well-conditioned LS estimation while demanding minimum hardware resources. The presented dynamic linearization approaches are evaluated and compared through experimental validation with an envelope tracking PA and a class-J PA The experimental results show similar linearization performance than the conventional LS solution but at lower computational cost., La eficiencia energetica y la linealidad de los amplificadores de potencia (PA) de radiofrecuencia (RF) son fundamentales en los sistemas de comunicacion inalambrica. El principal objetivo a alcanzar en el diserio de amplificadores de radiofrecuencia es lograr simultaneamente elevadas cifras de eficiencia y de linealidad. Sin embargo, estas cifras estan inherentemente en conflicto entre si, y se requieren soluciones a nivel de sistema basadas en tecnicas de linealizacion. La linealizacion mediante predistorsion digital (DPD) se ha convertido en la solucion mas utilizada para mitigar el compromise entre eficiencia y linealidad. La dimension del modelo del predistorsionador DPD depende de la complejidad del sistema, y aumenta significativamente en las arquitecturas de amplificacion de alta eficiencia cuando se consideran los actuales anchos de banda y las tecnologfas espectralmente eficientes. El exceso de parametrizacion puede conducir a una estimacion de los coeficientes DPD, mediante minimos cuadrados (LS), mal condicionada, lo cual generalmente se resuelve empleando tecnicas de regularizacion. Sin embargo, con el fin de reducir la complejidad computacional y evitar dichos problemas de mal acondicionamiento derivados de la sobreparametrizacion, se han dedicado varies esfuerzos para investigar tecnicas de reduccion de dimensionalidad que permitan reducir el orden del modelo del DPD. Esta tesis doctoral contribuye a aportar soluciones para la reduccion de la dimension de los linealizadores DPD para RF PA, centrandose en el subsistema de identificacion y adaptacion. En concrete, se proponen varies enfoques de reduccion de orden del modelo dinamico, basados en tecnicas de extraccion de caracteristicas. El numero minimo de coeficientes DPD relevantes se seleccionan y estiman dinamicamente en el subsistema de adaptacion del DPD, y de este modo la cantidad de coeficientes DPD se reduce, lo cual ademas garantiza una estimacion de LS bien condicionada al tiempo que exige me, Postprint (published version)

In this paper, a new method for dynamically estimating and updating the coefficients of a digital predistortion (DPD) linearizer is presented. By means of the partial least squares (PLS) algorithm, the basis matrix used in the DPD estimation/adaptation is dynamically updated at every iteration to minimize the linearization error. Moreover, only the minimum necessary DPD coefficients being required to meet a target estimation error are computed. The proposed estimation technique is compared with the standard least squares (LS) estimation solved by using QR decomposition. Experimental results show the similar linearization performance obtained with both estimation methods, but in the case of the dynamic PLS, less coefficients are used at every iteration. Finally, the proposed algorithm allows a high level of parallelization, which makes it suitable for FPGA implementation. © 2019 IEEE., Peer Reviewed, Postprint (published version)

This paper presents an overview on how the artificial neural networks (ANN) are applied to digitally linearize modern transmitters. The use of nonlinear ANNs is intended to either assist or replace the traditional crest factor reduction (CFR) and digital predistortion (DPD) building blocks, and benefit from their inherently good approximation capabilities and reduced hardware complexity when targeting complex transceiver scenarios such as those present in 5G. There is not a universal procedure to set up the best ANN given a specific application. However, in this paper some design considerations which have been experimentally validated in the literature will be summarized both considering single-antenna and multi-antenna transmitters. Finally, some principles in the selection of ANN parameters for nonlinear modeling will be showcased by using asimulation test bench that employs measured data from a strongly non-linear GaN PA operated with wideband signals., Agradecemos el soporte y financiación recibidos por el Gobierno de España (MICINN) y FEDER en el marco de los proyectos TEC2017-83343-C4-2-R y RTI2018-099841-B-I00, y por la Generalitat de Catalunya bajo las ayudas 2017 SGR 813 y 2017 SGR 891., Peer Reviewed, Postprint (published version)

© © 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works., This paper presents a new technique that dynamically estimates and updates the coefficients of a digital predistorter (DPD) for power amplifier (PA) linearization. The proposed technique is dynamic in the sense of estimating, at every iteration of the coefficient's update, only the minimum necessary parameters according to a criterion based on the residual estimation error. At the first step, the original basis functions defining the DPD in the forward path are orthonormalized for DPD adaptation in the feedback path by means of a precalculated principal component analysis (PCA) transformation. The robustness and reliability of the precalculated PCA transformation (i.e., PCA transformation matrix obtained off line and only once) is tested and verified. Then, at the second step, a properly modified partial least squares (PLS) method, named dynamic partial least squares (DPLS), is applied to obtain the minimum and most relevant transformed components required for updating the coefficients of the DPD linearizer. The combination of the PCA transformation with the DPLS extraction of components is equivalent to a canonical correlation analysis (CCA) updating solution, which is optimum in the sense of generating components with maximum correlation (instead of maximum covariance as in the case of the DPLS extraction alone). The proposed dynamic extraction technique is evaluated and compared in terms of computational cost and performance with the commonly used QR decomposition approach for solving the least squares (LS) problem. Experimental results show that the proposed method (i.e., combining PCA with DPLS) drastically reduces the amount of DPD coefficients to be estimated while maintaining the same linearization performance., Peer Reviewed, Postprint (author's final draft)

© 2019 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works., Over at least the last two decades, digital predistortion (DPD) has become the most common and widespread solution to cope with the power amplifier's (PA's) inherent linearity-versus-efficiency tradeoff. When compared with other linearization techniques, such as Cartesian feedback or feedforward, DPD has proven able to adapt to the always-growing demands of technology: wider bandwidths, stringent spectrum masks, and reconfigurability. The principles of predistortion linearization (in its analog or digital forms) are straightforward, and the linearization subsystem precedes the PA (a nonlinear function in a digital signal processor in the case of DPD or nonlinear device in the case of analog predistortion and counteracts the nonlinear characteristic of the PA. Some excellent overviews on DPD can be found in [1]-[4]. Let us now look at the challenges that DPD linearization has faced and will continue to face in the near future with 5G new radio (5G-NR)., Peer Reviewed, Postprint (author's final draft)