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Several concepts of capacitor-less single-transistor (1T) DRAM have recently been proposed to overcome the scaling limitations of bulk DRAMs. In this study, we focus on the comparison of two programming mechanisms of 1T-DRAMs: the impact ionization (II), the most common mechanism to store charges in the body of the cell, and the meta-stable dip (MSD) effect. The impact of the gate length and channel thickness reduction on both the II and the MSD programming mechanisms has been investigated using dynamic measurements on conventional Fully Depleted SOI (FDSOI) transistors. In the absence of any customization of technology and device architecture, it is found that MSD programming is superior and demonstrates higher resilience to the MOSFET scaling. These promising performances arise from the dynamic coupling between the front and back gates and from the use of low drain bias.

We present a 65nm RF SOI CMOS technology, targeted as Low Power (LP) to serve mobile applications. The integration has been made on High Resistive (HR) back substrate 300mm SOI wafers from SOITEC to improve performances in high frequency range, compared to bulk [1, 2]. For the first time, low leakage SRAM (Isb< 10pA at 0.9V, 25{degree sign}C, for 0.62µm2 and 0.52µm2 cells) are integrated on these HR wafers, and the paper reports a 30% power reduction in operation for a given maximum speed, compared to similar SRAM design on bulk. Furthermore, we have demonstrated a 21% measured power-delay product reduction compared to bulk, at 125{degree sign}C, on loaded ring oscillators.

In this paper, we investigate and analyze the impact of the body potential on the performance enhancement of BC pMOSFET when the body contact is floating. Many geometries and layouts of PD SOI pMOSFET with 1.6 nm physical gate oxide have been compared. The body potential is mainly controlled by direct tunneling mechanism due to ECB current from the partial n+ poly- gate into the conduction band of the n type silicon substrate. Narrow device and H gate layout provide the highest Ion gain.

The bulk DRAM scaling requirements have lead to many different concepts of capacitor-less single-transistor (1T) DRAM. Amongst the various effects used to program the cell, this study is focused on the Impact Ionization (II), the most common mechanism to store charges in the body of the cell, and the Meta-Stable Dip (MSD) effect. Dynamic measurements are presented showing the impact of the gate length reduction on both the II and the MSD programming mechanisms. It is found that MSD is less impacted by the scaling of standard SOI MOSFETs without specific optimization. Those attractive performances result from the dynamic coupling between the front and back gates in Fully Depleted SOI (FDSOI) transistors.

SOI technology offers advantages over bulk silicon and become a good candidate for analog/RF applications. However, the presence of a buried oxide causes self-heating which can degrade the device performance. The effects of self-heating have been examined on two successive generations with a wide range of device dimensions. This work shows that self-heating effects become less and less severe with both MOSFET and power supply voltage scaling. Moreover, we have observed a weak increase of 100 nm pMOSFET output characteristics due to the self-heating.

Off-axis electron holography is a unique technique in that it can be used to provide maps of the electrostatic potentials and strain in semiconductor specimens with nm-scale resolution. In this paper, we show that if sufficient care is taken, focused ion beam milling can be used to prepare electrically tested devices from a precise location on a wafer for studies of their electrostatic and strain fields as well as their structure and composition. We have compared the physical properties of several devices with process simulations and electrical test results which were measured over a time period of several months. We believe that electron holography can now be used to measure the positions of the electrical junctions and also quantitative values of the strain in an industrial environment.

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