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Copyright of Emirates Journal for Engineering Research is the property of United Arab Emirates University and its content may not be copied or emailed to multiple sites or posted to a listserv without the copyright holder's express written permission. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)

This work aims to determine the effect of stresses caused by dislocation networks placed at the interface of a semiconductor heterostructure of the thin GaAs/Si system. In this case, we use a mathematical modeling by Fourier series expansion to numerically simulate the stresses for the two cases of isotropic and anisotropic elasticity in order to predict the mechanical behavior of the heterostructure in the presence of interfacial dislocations while respecting well-defined stress boundary conditions. The elastic stress relaxation is reached for a layer thickness threshold of the GaAs deposit on the Si substrate not exceeding 5 nm. [ABSTRACT FROM AUTHOR]

Highlights • A transition layer was formed at the interface by irradiation of Ar FAB. • The thickness of buried oxide at the interface was quantitatively estimated. • The interfaces were found to be in the meta-stable states. Abstract Hard X-ray photoelectron spectroscopy measurements are performed on ≈10-nm-thick GaAs film/Si substrate junctions fabricated by the surface activated bonding and selective wet etching. The chemical shifts of Ga O and As O signals in Ga 2p 3/2 and As 2p 3/2 core spectra indicate that oxides are formed in a part of GaAs films neighboring GaAs/Si interfaces due to the surface activation process. Analyses of Ga O and As O signals show that the thickness of such buried oxides is decreased due to a post-bonding annealing at temperatures up to 400 °C. This means that the electrical properties of bonding interfaces, which are in the meta-stable states, are improved by the annealing. The thickness of oxides is different from that of amorphous-like transition layers at the GaAs/Si interfaces observed by transmission electron microscopy. [ABSTRACT FROM AUTHOR]

In this work, we developed wafer bonding techniques to bond GaAs and Si wafers. Wafer bonding was carried out at room temperature without high temperature annealing processes. The bonded interface showed a low interface resistance of 8.8×10 −3 Ω cm 2 . We also exploited the new bonding techniques to fabricate a GaAs solar cell on a Si substrate. The solar cell showed a high energy conversion efficiency (13.25%) even without an anti reflection coating. The performance of the fabricated GaAs/Si solar cell was comparable to that of a homogeneous GaAs solar cell grown on a GaAs substrate. *Corresponding author. [ABSTRACT FROM AUTHOR]

Abstract: The shape changes in GaAs nanocrystals deposited on Si substrate have been studied as a function of the coverage by transmission electron microscopic observations in order to see the growth mechanism from the viewpoint of the surface energy and the lattice strain energy between the nanocrystal and the substrate. When GaAs was deposited on the Si(100) surface, the shape of the GaAs nanocrystals changes from stepped mound, hut cluster to dome structure with increasing the coverage. The shape changes are responsible for decreasing the total free energy caused by the lattice strain energy with the substrate and surface energy depending on the crystal size. [Copyright &y& Elsevier]

Abstract: Effect of substrate temperature on growth process were studied for GaAs on Si(110) vicinal surface by reflection high-energy electron diffraction. At the substrate temperature of 473K, three-dimensional islands of misoriented GaAs are formed on the vicinal surface. At 573K, three-dimensional GaAs islands with low density epitaxially grow at the step edges of the vicinal surface. At 673K, two-dimensional GaAs layer flattens the vicinal surface. The kinetics of Ga adatoms diffusing on the vicinal surface can explain the change in the growth process, which depends on the substrate temperature. [Copyright &y& Elsevier]

In this work we report a novel method for obtaining GaAs quantum dots (QDs) by molecular beam epitaxy (MBE) on an AlGaAs underlying film. We propose to use a Si monolayer (ML) grown on AlGaAs in order to induce a three-dimensional nucleation during the GaAs overgrowth. We observe that when 2.1 MLs of GaAs are grown on 1 ML of Si, the GaAs is self-assembled in islands. Islands of 15-A˚ height and a lateral size of 200 A˚ were clearly observed. 77 K photoluminescence and photoreflectance spectra of capped GaAs dots showed an additional signal at ∼1.88 eV, presumably related to the islands emission, thereby verifying an efficient quantum confinement. [Copyright &y& Elsevier]

Atmospheric pressure-metal organic chemical vapour deposition (AP-MOCVD) was used to grow InAs and InGaAs quantum dots (QDs) on GaAs/Si substrate. The influence of growth temperature on the QD density and distribution was investigated. Scanning probe microscopy (AFM and DFM) was used to investigate the growth behaviour of the QD structure. The growth properties of InAs/InGaAs QDs on the highly stressed GaAs/Si substrate under S–K growth mode at different deposition temperatures have been analysed. It was identified that the growth temperature plays major role in determining the growth and distribution of both InAs and InGaAs QDs due to the temperature-dependent dislocation propagation from the GaAs/Si substrate. The growth of InGaAs QDs was found “In” composition dependent. A high QD density of ∼5×1010–6×1010 cm−2 was obtained on GaAs/Si at a growth temperature of 500 °C. [Copyright &y& Elsevier]

We present the characterization of crystal defects in GaAs layers grown on silicon substrates by the conformal growth method. This technique consists of GaAs lateral growth from GaAs seeds confined in between the Si substrate and an overhanging dielectric cap layer. These conformal layers grow with a reduced density of crystal defects, e.g. dislocations, which are effectively filtered by the particular geometrical configuration. The samples were analyzed by micro-Raman spectroscopy, cathodoluminescence, phase stepping microscopy and were etched by diluted stirl solution applied with light (DSL). Several structures were revealed and analyzed, e.g. a quasi-periodic array of hillocks and valleys that are spatially correlated with fluctuations of the luminescence intensity. Other revealed crystal defects were grooves, hillocks and cracks. The main properties of these defects and their possible origin are studied. [Copyright &y& Elsevier]

Results of large-area (up to 1000 cm/run) CdZnTe heteroepitaxy on both GaAs and GaAs/Si substrates by metalorganic chemical vapor deposition (MOCVD) are presented. CdZnTe (x = 0-0.1) films exhibited specular surface morphology, 1% thickness uniformity (standard deviation), and compositional uniformity (Δx) of ±0.002 over 100 mm diam substrates. For selected substrate orientations and deposition conditions, the only planar defects exhibited by (lll)B CdZnTe/GaAs/Si films were lamella twins parallel to the CdTe/GaAs interface; these do not propagate through either the CdZnTe layer or subsequently deposited liquid phase epitaxy (LPE) HgCdTe layer(s). Background Ga and As-impurity levels for CdZnTe on GaAs/Si substrates were below the secondary ion mass spectroscopy detection limit. Preliminary results of HgCdTe liquid phase epitaxy using a Te-rich melt on Si-based substrates resulted in x-ray rocking curve linewidths as narrow as 72 arc-sec and etch-pit densities in the range 1 to 3 x 10 cm. [ABSTRACT FROM AUTHOR]

The potential for interactions of misfit strain relieving dislocations with inversion-type antiphase domain boundaries is considered for III-V on group IV growth. The specific cases of GaAs grown on Si (001) and vicinal (001) substrates are examined. It is shown that threading dislocation densities for these growths should be unacceptably high due to obstruction of threading dislocation motion by the antiphase domain boundaries, even when the boundaries are eliminated shortly after the inception of GaAs layer growth. Cutting of the antiphase domain boundaries by mobile dislocations would require creation of new highenergy surface area. It is suggested that more successful routes would be growth of a strain-relieving buffer or growth on a {hhk} surface. [ABSTRACT FROM AUTHOR]

The electrical properties of pn junctions, with various semiconductor materials with different doping concentrations fabricated by using surface‐activated‐bonding (SAB), were investigated by measuring their current‐voltage (I‐V) characteristics. The I‐V characteristics of p+‐GaAs/n++‐Si, p+‐GaAs/n+‐Si, p+‐Si/n+‐Si, p++‐Si/n+‐InGaP, and p+‐Si/n+‐InGaP junctions showed ohmic‐like properties. The interface resistance and the resultant electrical loss decreased with increasing impurity concentration at the interface. These results demonstrate the significance of SAB for fabricating tandem solar cells. [ABSTRACT FROM AUTHOR]