73 results on '"Fremont, Helene"'
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2. Moisture absorption and desorption in epoxy mould compounds: Characterization of Fickian and non-Fickian behaviours in complex packages
3. Investigating the degradation mechanisms of moisture on the reliability of integrated low-k stack
4. Investigation into Cu diffusion at the Cu/SiO2 hybrid bonding interface of 3D stacked integrated circuits
5. In-situ characterization of thermomechanical behavior of copper nano-interconnect for 3D integration
6. Search for copper diffusion at hybrid bonding interface through chemical and electrical characterizations
7. Evaluation of thermomechanical fatigue lifetime of BGA lead-free solder joints and impact of isothermal aging
8. Moisture diffusion in plasma-enhanced chemical vapor deposition dielectrics characterized with three techniques under clean room conditions
9. High temperature ageing of microelectronics assemblies with SAC solder joints
10. Virtual prototyping in a Design-for-Reliability approach
11. Sub $1\ \mu \mathrm{m}$ Pitch Achievement for Cu/SiO2 Hybrid Bonding
12. Moisture Diffusion Inside the BEOL of an FC-PBGA Package
13. To avoid dropout: let student teach! Second act
14. 2D Model for moisture diffusion in integrated Low-k dielectrics
15. (Invited) Hybrid Bonding-Based Interconnects: A Status on the Last Robustness and Reliability Achievements
16. To avoid dropout: let student teach!
17. From electrical to physical-chemical characterization of the Cu/SiO2 Hybrid-Bonding Interface – A Cu2O-Layer as a Cu Diffusion Barrier?
18. Reliability of Fan-Out Wafer Level Packaging For III-V RF Power MMICs
19. Readout Circuit Implemented on PCB-Level for Embedded CNT Sensors
20. Moisture diffusion in Printed Circuit Boards: Measurements and Finite- Element- Simulations
21. Moisture Diffusion in Dense SiO2 and Ultra Low k Integrated Stacks
22. Evaluation of Hybrid Bonding Interface Quality by Contact Resistivity Measurement
23. Electromigration Effects in Corroded BGA
24. Smart Packaging - Microscopic Temperature and Moisture Sensors Embedded in a Flip-Chip Package
25. “New automotive” — Considerations for reliability, robustness and resilience for CMOS interconnects
26. The SALEIE Project : A successful International Collaborative Project and springboard for future projects
27. Smart Packaging: A Micro-Sensor Array Integrated to a Flip-Chip Package to Investigate the Effect of Humidity in Microelectronics Package
28. Assessment of Constitutive Properties of Solder Materials Used in Surface-Mount Devices for Harsh Environment Applications
29. How SI/EMC and reliability issues could interact together in embedded electronic systems?
30. Measurement and simulation of electromagnetic drift for obsolescence management in electronics
31. Proceedings of the 28th European Symposium on the reliability of electron devices, failure physics and analysis
32. Influence of Technological Parameters on the Behavior during Aging at High Temperature of Various Packages, in the Automotive Environment
33. Criteria of the EIE courses accessible to disabled students. Legibility of cursus and experiences sharing for generalizing good practices
34. A one week-lecture in the Euro-dots course program: Microelectronic assemblies: From packaging to reliability
35. PhD in Electrical and Information Engineering in Europe: Towards a harmonization including LifeLong Learning
36. International dimension to increase Lifelong Learning possibilities in Europe
37. Field return on a Chinese-French double graduation of an international master in electronics and telecommunications on the base of the Bologna process
38. Design for reliability: Thermo-mechanical analyses of stress in Through Silicon Via
39. How to combine experiments and simulations to study thermo-mechanical issues in complex microelectronics assemblies
40. Fast qualification using thermal shock combined with moisture absorption
41. Package delamination as indicator of ball bond lift: New diagnostic methodology
42. Virtual prototyping of a Wafer Level Chip Scale Package: Underfill role in die cracking
43. Bond Reliability Improvement at High Temperature by Pd Addition on Au Bonding Wires
44. Influence of underfill methods on the solder joint fatigue of wafer level packaging
45. Development of an HMI based on the OPC standard
46. Solder fatigue of Wafer Level package assemblies. Comparison with flip chip BGA’S
47. Dynamic void formation in a DD-copper-structure with different metallization geometry
48. Set-in LifeLong Learning for PhD students in Electrical and Information Engineering.
49. ELLEIEC implementation issues in EIE: State of advancement.
50. BJT avalanche breakdown voltage improvement by introduction of a floating p-layer in the epitaxial collector region
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