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In mechanically ventilated (MV) cardiac arrest (CA) survivors admitted to the intensive care unit (ICU) avoidance of hypoxia is considered crucial. However, avoidance of hyperoxia may also be important. A conservative approach to oxygen therapy may reduce exposure to both.We evaluated the introduction of conservative oxygen therapy (target SpO2 88-92% using the lowest FiO2) during MV for resuscitated CA patients admitted to the ICU.We studied 912 arterial blood gas (ABG) datasets: 448 ABGs from 50 'conventional' and 464 ABGs from 50 'conservative' oxygen therapy patients. Compared to the conventional group, conservative group patients had significantly lower PaO2 values and FiO2 exposure (p0.001, respectively); more received MV in a spontaneous ventilation mode (18% vs 2%; p=0.001) and more were exposed to a FiO2 of 0.21 (19 vs 0 patients, p=0.001). Additionally, according to mean PaO2, more conservative group patients were classified as normoxaemic (36 vs 16 patients, p0.01) and fewer as hyperoxaemic (14 vs 33 patients, p0.01). Finally, ICU length of stay was significantly shorter for conservative group patients (p=0.04). There was no difference in the proportion of survivors discharged from hospital with good neurological outcome (14/23 vs 12/22 patients, p=0.67).Our findings provide preliminary support for the feasibility and physiological safety of conservative oxygen therapy in patients admitted to ICU for MV support after cardiac arrest (Trial registration, NCT01684124).

Summary Background Rapid Response Team (RRT) calls can often occur within 24h of hospital admission to a general ward. We seek to determine whether it is possible to identify these patients before there is a significant clinical deterioration. Methods Retrospective case–controlled study comparing patient characteristics, vital signs, and hospital outcomes in patients triggering RRT activation within 24h of ED admission (cases) with matched ED admissions not receiving a RRT call (controls). Results Over 12 months, there were 154 early RRT calls. Compared with controls, cases had a higher heart rate (HR) at triage (92 vs. 84beats/min; p =0.008); after 3h in the ED (91 vs. 80beats/min; p =0.0007); and at ED discharge (91 vs. 81beats/min; p =0.0005). Respiratory rate (RR) was also higher at triage (21.2 vs. 19.2breaths/min; p =0.001). On multiple variable analysis, RR at triage and HR before ward transfer predicted early RRT activation: OR 1.07 [95% CI 1.02–1.12] for each 1breath/min increase in RR; and 1.02 [95% CI 1.002–1.030] for each beat/minute increase in HR, respectively. Study patients required transfer to the intensive care in approximately 20% of cases and also had a greater mortality: (21% vs. 6%; OR 4.65 [95% CI 1.86–11.65]; p =0.0003) compared with controls. Conclusions Patients that trigger RRT calls within 24h of admission have a fourfold increase in risk of in-hospital mortality. Such patients may be identified by greater tachycardia and tachypnoea in the ED.

A 10-bit 2-GS/s mixed-signal baseband (BB) circuit, which enables a self-healing 60-GHz 4-Gb/s radio-on-chip implemented in a 65-nm complementary metal-oxide semiconductor, is described. The BB circuit autonomously senses and optimizes transmitter (TX) P1dB, OIM3, and image suppression, reducing the yield loss because of process variations. On-chip test tones are generated using a 10-bit 2-GS/s current-steering digital-to-analog converter (DAC) and direct digital frequency synthesizer (DDFS). Using the generated test tones, the aforementioned impairments are measured by an envelope detector at the power amplifier output. Based on this information, the programmable digital IQ phase amplitude and offset controller (IQ_CTRL) in the BB circuit improves the TX image suppression from -32.4 to -42.6 dBc, and digital control signals generated by the on-chip self-healing controller heal the TX P1dB and OIM3 from 9.5 to 13.2 dBm and from -32.5 to - 40 dBc, respectively. In terms of achieving the target specifications, namely, TX image suppression , , and , healing increases yield on ten dies from 0% to 100%. The BB circuit consumes only 49 mW, of which 37 mW comes from the DACs and 12 mW from the DDFS and the IQ_CTRL.

This article discusses a self-healing 60-GHz transceiver architecture which employs information collected from on-chip sensors to intelligently adjust various tuning knobs and significantly improve the post-healing performance yield.

A D-band CMOS transmitter is presented with an integrated injection-locked frequency-tripling synthesizer, digital control, and an on-chip antenna. It employs an IF feed-forward pre-distortion scheme, which improves gain compression of the transmitter to provide an overall higher linearity gain profile, allowing reduced power back-off for higher peak-to-average modulation schemes. The integrated D-band transmitter consumes 347 mW and occupies 1800× 1500 μm of silicon area. The proposed transmitter delivers 0.4 dBm of effective isotropic radiated power with a saturated power on-chip of at least 12.2 dBm. The transmitter has a peak power-added efficiency (PAE) of 4.8% with power delivered to the antenna and a peak PAE of 0.31% when considering radiated power.

This paper presents an all-digital standard cell SR-Latch based time amplifier (TA) with a variable gain of 6X and 12X. In this TA, a two-stage gain selection unit is applied to enable the TA to select either the high gain for short input pulse intervals or the low gain for long input pulse intervals. The time amplification gain is 6 in the input range of −700ps ∼700ps, and reaches 12 if the input range is −300∼300ps. We present a design that automatically detects the input pulse and switches to the proper TA gain. By applying the proposed TA, a standard cyclic TDC implemented in a UMC CMOS 65-nm process shows the resolution improved from 1.6ps to 0.8 ps.

The paper presents a 2.2 GS/s (1.1 GHz Nyquist bandwidth), 188 mW 512-channel spectrometer processor developed to support of future science observations on NASA planetary missions, where payload size, weight, and power consumption are extremely limited. The presented spectrometer processor chip contains a pair of 7 bit ADC IQ converters coupled with a 512 point PSD processor, and averaging accumulator, allowing it to be sensitive enough to detect trace gases like NH3, HCN, and CO2 when coupled to the appropriate band RF front-end receiver. The bandwidth and resolution of the presented processor make it suitable for exploring the composition of planets, moons and their atmospheres throughout our solar system.

This paper presents a 95 GHz centimeter scale navigation system which allows a unmanned ground vehicle (UGV) or possibly even aerial vehicle (UAV) to navigate through a highly cluttered environment and follow a safe obstacle-free pathway to a desired goal. The navigation system defines multiple pathways using mm-wave base-stations called path generators and then uses a single CMOS SoC containing a receiver, ADC and an FFT processor to detect and navigate these pathways. The demonstrated confined pathway SoC (CP-SoC) occupies 5.4mm2 of silicon area in 65nm technology, and consumes only 199 mW, making it suitable for lightweight payloads associated with UAVs and UGVs.

Contactless (3D) touch sensors, when integrated with displays, offer many advantages over that of conventional touch-panel screens by offering a more hygienic and a more immersive & interactive human/machine interface for 3D user experiences [1]. While significant progress has been made in developing 3D contactless touch sensors for larger television and monitor type displays [2-3], the technology has yet to be infused into space- and battery-constrained mobile devices (i.e., tablets and smartphones). For successful insertions into these systems, a paradigm shift in touch-sensor system design is essential to enable seamless sensing operations with smaller-size, more tightly spaced, strongly coupled, and highly resistive display electrodes. In addition, any successful 3D sensing solution for mobile devices must consume low power and small silicon area to be compatible with limited battery and space resources.

This paper presents a scalable transmit phase array operating at 140 GHz which employs a local PLL reference generation system. Unlike traditional CMOS phase arrays, this enables the array to be formed over multiple chips while avoiding the challenges of distributing mm-wave signals between them. The prototype chip consumes 131 mW of power and occupies 1.95 mm 2 of chip area when implemented in 65 nm CMOS technology.

a b s t r a c t Background: In hospital cardiac arrests (CA) treated with cardio-pulmonary resuscitation (CPR) outside of the intensive care unit (ICU) have poor outcomes. Most are preceded by deranged vital signs. There are, however, limited studies assessing antecedents to CAs inside the ICU. Objectives: To study the antecedents to, and characteristics of CAs in ICU. Study population: We prospectively identified CA cases that occurred inside our ICU between January 2010 and July 2012. Controls were obtained by sequentially matching ICU patients based on APACHE III diagnosis, APACHE III score, age, gender and length of stay in ICU. Results: Thirty-six patients had a CA during the study period (6.28/1000 admissions). In the 12 h prior to CA, index patients had higher maximum (22 breaths/min vs. 18 breaths/min, p = 0.001) and minimum respiratory rates (16 breaths/min vs. 12 breaths/min, p = 0.031), a lower median mean arterial pressure (65 mmHg vs. 70 mmHg, p = 0.029) and systolic blood pressure (97 mmHg vs. 106 mmHg, p = 0.033), a higher central venous pressure (14 cm H2O vs. 11 cm H2O, p = 0.008) and a lower bicarbonate level (20.5 mmol vs. 26 mmol, p = 0.018) compared to controls. CA patients also had a higher maximum dose of noradrenaline (norepinephrine) (17.5 mcg/min vs. 8.0 mcg/min, p = 0.052) but there was no difference in any other levels of intensive care support. Two-thirds of CA's occurred within the first 48 h of ICU admis- sion. The initial monitored rhythm was non-shock responsive (pulseless electrical activity, bradycardia or asystole) in 26/36 (72%). Return of spontaneous circulation was achieved in 29/36 (80.6%) patients, with 16/36 (44.4%) surviving to hospital discharge. Conclusions: In the period leading up to the CA inside ICU, there were signs of physiological instability and the need for higher doses of noradrenaline. Return of spontaneous circulation was achieved in 80%. However, in-hospital mortality was greater than 50%. © 2013 Elsevier Ireland Ltd. All rights reserved.

This paper presents a complete 2×2 phased array transmitter system operating at W-band (90-95 GHz) which employs a PLL reference time-shifting approach instead of using traditional mm-wave phase shifters. PLL reference shifting enables a phased array to be distributed over multiple chips without the need for coherent mm-wave signal distribution between chips. The proposed phased array transmitter system consumes 248 mW per array element when implemented in a 65 nm CMOS technology.

A current-mode mm-wave direct-conversion receiver breaking trade-offs among bandwidth, NF and linearity is designed and realized in 65nm CMOS. The 60GHz receiver employs novel Frequency-staggered Series Resonance Common Source (FSRCS) stage to extend RF bandwidth with superior noise performance. The receiver's current-mode operation offers excellent out-of-band blocker tolerance and linearity. With on-chip quadrature LO generations, the fabricated receiver simultaneously achieves minimal noise figure of 3.8dB, RF bandwidth of 7.5GHz, output P1dB of 1dBm, maximum conversion gain of 32dB, and IRR of -35dB. The receiver is capable of tolerating outof-channel blocker up to -9dBm at 3.5GHz away. It occupies silicon area of 1.3mm2 and draws 25.5mA from 1V supply.

This paper presents a digitally controlled frequency synthesizer in 65nm CMOS technology for D-band transceiver applications. The synthesizer uses a low frequency U Band (44–48 GHz) phase-locked loop to track a 50 MHz reference and then employs an injection locked frequency tripler (ILFT) to provide output that can be tuned between 130 and 133 GHz. The proposed D-band synthesizer offers a directly measured phase noise of −82.5 dBc/Hz at 1 MHz offset from the carrier and consumes 92mW of power. The entire syntheszier occupies 0.68mm2 of silicon area.

A CMOS D-band 135–150 GHz transmitter is presented with integrated digital control and on-chip antenna. The proposed transmitter employs an IF feed-forward compensation scheme which improves the soft gain compression of the power amplifier by 5.1dB to provide an overall more linear AM-AM profile allowing reduced power back-off for modulation schemes with a high peak-to-average ratio. The proposed D-band transmitter consumes 255mW and occupies 2000 × 1500 um of silicon area. The proposed transmitter delivers a 0.4 dBm EIRP and a saturated power on chip of 13.2 dBm. The transmitter has a peak PAE of 8.2% with power delivered to the antenna and a peak PAE of 0.4% when considering radiated power.

The available ISM band from 57–65GHz has become attractive for high-speed wireless applications including mass data transfer, streaming high-definition video and even biomedical applications. While silicon based data transceivers at mm-wave frequencies have become increasingly mature in recent years [1,2,3], the primary focus of the circuit community remains on the design of mm-wave front-ends to achieve higher data rates through higher-order modulation and beamforming techniques. However, the sustainability of such mm-wave systems when integrated in a SoC has not been addressed in the context of die performance yield and device aging. This problem is especially challenging for the implementation of mm-wave SoC's in deep sub-micron technology due to its process & operating temperature variations and limited ft / fmax with respect to the operation frequency.

This paper presents a SC-FDE/OFDM MMSE equalizer for 60GHz wireless communications in 65nm CMOS process. By applying a 4-parallel signal processing architecture, the 512pt FFT/IFFT processor, the Golay channel estimator, and the MMSE equalizer are all clocked at 1/4 input symbol sampling rate. Occupying a core area of 1.12mm2, the symbol sampling rate at 1V supply is 1.46GS/s. With 16QAM modulation, its throughput is 5.84Gb/s while consuming 124mW in the SC-FDE mode and 88mW in the OFDM mode. With a 1.2V supply, it achieves a symbol sampling rate of 1.76GS/s with a 7Gb/s throughput while consuming 208mW in the SC-FDE mode and 148mW in the OFDM mode.

This paper introduces a DSSS baseband receiver suitable for a dual mode DSSS/OFDM wireless LAN system. Packet synchroniser with a pair of ADCs with dynamic sampling is used for detecting both DSSS and OFDM packets. For differentially encoded symbols, frequency offset and phase offset can be compensated based on their inherent characteristics. For high data rate DSSS based modulations, channel estimation and equalization with receive diversity combining in frequency domain is applied to resolve the multipath distortions. With channel equalization and diversity combining of the DSSS receiver achieved in frequency domain the overall complexity of the dual mode DSSS/OFDM equalization can be realized.