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Model order reduction (MOR) is essential in integrated circuit design, particularly when dealing with large-scale electromagnetic models extracted from complex designs. The numerous passive elements introduced in these models pose significant challenges in the simulation process. MOR methods based on balanced truncation (BT) help address these challenges by producing compact reduced-order models (ROMs) that preserve the original model's input-output port behavior. In this work, we present an extended Krylov subspace-based BT approach with a frequency-aware convergence criterion and efficient implementation techniques for reducing large-scale models. Experimental results indicate that our method generates accurate and compact ROMs while achieving up to x22 smaller ROMs with similar accuracy compared to ANSYS RaptorX ROMs for large-scale benchmarks., Comment: arXiv admin note: substantial text overlap with arXiv:2311.08478

Model order reduction (MOR) is crucial for the design process of integrated circuits. Specifically, the vast amount of passive RLCk elements in electromagnetic models extracted from physical layouts exacerbates the extraction time, the storage requirements, and, most critically, the post-layout simulation time of the analyzed circuits. The MORCIC project aims to overcome this problem by proposing new MOR techniques that perform better than commercial tools. Experimental evaluation on several analog and mixed-signal circuits with millions of elements indicates that the proposed methods lead to x5.5 smaller ROMs while maintaining similar accuracy compared to golden ROMs provided by ANSYS RaptorX., Comment: arXiv admin note: substantial text overlap with arXiv:2311.08478

Model order reduction (MOR) is an important step in the design process of integrated circuits. Specifically, the electromagnetic models extracted from modern complex designs result in a large number of passive elements that introduce limitations in the simulation process. MOR techniques based on balanced truncation (BT) can overcome these limitations by producing compact reduced-order models (ROMs) that approximate the behavior of the original models at the input/output ports. In this paper, we present a low-rank BT method that exploits the extended Krylov subspace and efficient implementation techniques for the reduction of large-scale models. Experimental evaluation on a diverse set of analog and mixed-signal circuits with millions of elements indicates that up to x5.5 smaller ROMs can be produced with similar accuracy to ANSYS RaptorX ROMs.

As integrated circuit technologies are moving to smaller technology nodes, Electromigration (EM) has become one of the most challenging problems facing the EDA industry. While numerical approaches have been widely deployed since they can handle complicated interconnect structures, they tend to be much slower than analytical approaches. In this paper, we present a fast semi-analytical approach, based on the matrix exponential, for the solution of Korhonen's stress equation at discrete spatial points of interconnect trees, which enables the analytical calculation of EM stress at any time and point independently. The proposed approach is combined with the extended Krylov subspace method to accurately simulate large EM models and accelerate the calculation of the final solution. Experimental evaluation on OpenROAD benchmarks demonstrates that our method achieves 0.5% average relative error over the COMSOL industrial tool while being up to three orders of magnitude faster.

The rapid growth of circuit complexity has rendered Model Order Reduction (MOR) a key enabler for the efficient simulation of large circuit models. MOR techniques based on moment-matching are well established due to their simplicity and computational performance in the reduction process. However, moment-matching methods based on the ordinary Krylov subspace are usually inadequate to accurately approximate the original circuit behavior, and at the same time do not produce reduced-order models as compact as needed. In this paper, we present a moment-matching method which utilizes the extended and the asymmetric extended Krylov subspace (EKS and AEKS), while it allows the parallel computation of the transfer function in order to deal with circuits that have many terminals. The proposed method can handle large-scale regular and singular circuits and generate accurate and efficient reduced-order models for circuit simulation. Experimental results on industrial IBM power grids demonstrate that the EKS method can achieve an error reduction up to 85.28% over a standard Krylov subspace method, while the AEKS method greatly reduces the runtime of EKS, introducing a negligible overhead in the reduction error., Comment: arXiv admin note: substantial text overlap with arXiv:2007.01948

During the past decade, Model Order Reduction (MOR) has become key enabler for the efficient simulation of large circuit models. MOR techniques based on moment-matching are well established due to their simplicity and computational performance in the reduction process. However, moment-matching methods based on the ordinary Krylov subspace are usually inadequate to accurately approximate the original circuit behavior. In this paper, we present a moment-matching method which is based on the extended Krylov subspace and exploits the superposition property in order to deal with many terminals. The proposed method can handle large-scale regular and singular circuits and generate accurate and efficient reduced-order models for circuit simulation. Experimental results on industrial IBM power grids demonstrate that our method achieves an error reduction up to 83.69% over a standard Krylov subspace method.