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In this paper, a new design for an impulse radar Ultra-wideband (UWB) module transmitter using a 180 nm CMOS TSMC process is presented. A 2nd order derivative Gaussian pulse is generated using two phase detectors, which consist of an n-latch and a p-latch to generate a single UWB pulse without any filtering and matches the FCC mask. The Gaussian impulse achieves a very small pulse of 259 ps width, ~104 mVpp amplitude, and consumes about 23.3 µW/pulse. The circuit occupies only 36 × 42 μm2 without PADs.

A new circuit technique, the reconfigurable puise generator circuit is proposed to produce a puise width inversely proportional to the spectrum power bandwidth in the Impulse Radio Ultra-Wide Band (IR-UWB) circuits. The complete circuit was based on two pulse generator blocks using Positive Pulse Generator (PPG), and Negative Pulse Generator (NPG) to compose a rectangular waveform at the output. These pulse generators have been implemented with high impedance circuits and are selected by digital control signals. Thus, each block can be adjusted to generate up to eight sequential pulses per clock edge. The circuit was designed to use Binary Phase Shift Keying (BPSK) scheme for modulation and can change the frequency spectrum of the signal pulses. In addition, we implemented a voltage divider circuit using two transistors in parallel with a charge pump circuit to control the signal amplitude at the output. The proposed pulse generator circuit operates at a maximum operation frequency at 12 GHz. The pos-layout simulations were performed using LTSpice, and the results show a pulse amplitude of 160mV and an average power consumption of 11.3 fJ per pulse at lowest operating frequency and 85.3 fJ per pulse at highest operating frequency, for a Pulse Repetition Frequency (PRF) of 100MHz at 1.3V power supply voltage. The core chip size occupies a very small area of 210 μm × 75 μm (without PADs).

A method for characterizing low-voltage-operating MOSFETs through small-signal S-parameters is introduced. The method allows extracting the drain-to-source channel resistance at zero drain-to-source voltage, which is not feasible with dc conventional methods. Furthermore, this zero drain-to-source voltage RF method identifies the gate voltage where the diffusion and drift conduction mechanisms overlap. This is really helpful in defining the appropriate subthreshold drain current model and its corresponding impact at RF operating conditions. The proposed experimental RF method is validated and compared with a dc-based method for an 80-nm-channel-length nMOSFET.

A procedure to analyze the effect of the MOSFET drain-bulk junction tunneling current at high frequencies is presented. This procedure allows identifying the presence of band-to-band tunneling in short channel-length MOSFETs at different drain-to-source voltages. Since this analysis is based on experimental S-parameters performed to a single MOSFET, the procedure is not affected by the variations occurring in devices with different geometries. Excellent correlation between simulated and experimental output impedance for a 0.1 μm channel-length bulk MOSFET up to 40 GHz demonstrates the validity of the proposed technique.

A new modeling and parameter extraction methodology to represent the parasitic effects associated with shielded test structures is presented in this paper. This methodology allows to accurately account for the undesired effects introduced by the test fixture when measuring on-wafer devices at high frequencies. Since the proposed models are based on the physical effects associated with the structure, the obtained parameters allow the identification of the most important parasitic components, which lead to potential measurement uncertainty when characterizing high-frequency devices. The proposed methodology is applied to structures fabricated on different metal levels in order to point out the advantages and disadvantages in each case. The validity of the modeling and characterization methodology is verified by achieving excellent agreement between simulations and experimental data up to 50 GHz.

An S-parameter measurement-based procedure for the extraction of the bias dependent and bias independent components of the MOSFET series resistance is presented. The proposed procedure allows the direct and analytical determination of these components from measurements performed on a single device. The method is verified by achieving good agreement between simulated and experimental data for a 0.18-/spl mu/m channel-length MOSFET.

A comparison of Y-parameters and S-parameters methodologies for the calculus of the quality factor (Q) in integrated inductors, is analyzed in this paper. For this reason two inductors are compared, one with low (planar inductor) and another with high (cross inductor) electric field coupling effects, in order to determine its influence on the Q calculus. The experimental results shows that assumptions made in Y-parameters Q calculus methodology can overestimate it value. The analysis was done over a 0.35μm CMOS technology using S-parameter measurements up to 10 GHz.

In this paper, a new design for an Impulse Radar UWB transmitter using an 180nm CMOS process is presented. A 2nd order derivative Gaussian pulse is generated using two Phase Detectors (PDs), which consist of an n-latch and a p-latch to generate a single UWB pulse without any filtering and matches the FCC mask. The Gaussian impulse achieves a very small pulse of 288ps width, 160mVpp amplitude, and consumes about 13μW/pulse. The circuit occupies only 36×42μm2 without PADs.

Los avances en la tecnología de fabricación de transistores MOS para aplicaciones en sistemas de comunicación en el rango de las micro-ondas, ha sido posible gracias al escalamiento de la longitud de canal. Actualmente, se producen circuitos con transistores de longitud de canal del orden de 45 nm, como es el caso del procesador Core Duo de Intel. El escalamiento de la longitud de canal del transistor MOS a producido una mayor integración de circuitos en un solo encapsulado además de que el dispositivo alcance frecuencias de corte superiores a los 300 GHz. De esta forma, es posible integrar en un mismo encapsulado el sistema de comunicación de radiofrecuencia y el sistema de procesamiento digital de datos. Actualmente, se esta trabajando a nivel investigación en el desarrollo de sistemas de comunicación punto a punto con frecuencias de transmisión de 60 GHz. Para poder desarrollar los circuitos necesarios en el bloque de comunicación es necesario tener modelos precisos y confiables del transistor MOS que incluyan todos los efectos parásitos asociados al dispositivo cuando trabaja a frecuencias del orden de los 60 GHz. En esta tesis se describen los principales mecanismos de fuga en el transistor MOS. En específico en este trabajo doctoral se analizan los efectos del tuneleo de banda a banda entre drenaje y substrato, así como la modulación de carga en la región de traslape entre drenaje/fuente y compuerta. Los efectos de tuneleo banda a banda y modulación de la carga en la región de traslape entre drenaje/fuente y compuerta se analizó utilizando mediciones de parámetros S a frecuencias de hasta 50 GHz. Para ello se propusieron metodologías de extracción basadas en los principios físicos de operación de los transistores MOS. Dichas metodologías fueron verificadas en transistores MOS con una longitud de canal de 100 y 65 nm. Finalmente se presentan los retos para las nuevas generaciones de transistores MOS con una longitud de canal menor a 45 nm. Para transistores con una longitud de canal menor a los 45 nm, los efectos cuánticos son apreciables y determinan la respuesta del dispositivo. Esto implica enormes retos en el diseño, fabricación y modelado del transistor MOS. Es en este punto donde la caracterización y modelado de los transistores MOS usando medición de parámetros S, ha mostrado ser una de las herramientas de medición ideal para el estudio de efectos cuánticos tales como el tuneleo de banda a banda.

Currently, the technological challenges for reaching the demanding aspects of modern telecommunications are larger every day. As a result, in order to meet the new specifications every single component of each specific circuit must be optimized. The interdigitated transducer is a fundamental part of every communication system and, this work devoted to the development of a design methodology for Lamb Wave Resonators (LWR) based on AlN. Also, it is obtained a semi-empirical model that relates the resonance frequency of a LWR resonator with the electrodes thicknesses. The methodology is an algorithm that looks for the highest electromechanical coupling factor, the highest quality factor in terms of the resonance frequency required. The limitations of the predictive model here presented and useful range frequency are discussed. It is also shown that tat the resonance frequency changes linearly with the electrodes thicknesses but, for high frequencies this dependence is not longer lineal and behaves as the third power of the thickness. The error that this model produces is in the order of the 5.1% for aluminium electrodes and 5.05% for molybdenum electrodes. Error found by simulations. En la actualidad los retos tecnológicos para cumplir las demandas contemporáneas de las telecomunicaciones son cada vez más grandes. Con el fin de cumplir con las nuevas metas, se deben optimizar cada uno de los componentes básicos de los circuitos específicos. Los transductores interdigitados son parte fundamental de cualquier sistema de comunicación, y por ello en este trabajo, se presenta un modelo semiempírico y su respectiva interpretación para la frecuencia de resonancia en resonadores piezoeléctricos de contorno basados en nitruro de aluminio (AIN), este incluye efectos que no se tienen en cuenta en la metodología comúnmente utilizada para su diseño. Se presenta un análisis cuantitativo de la dependencia del factor de calidad y el coeficiente de acople electromecánico respecto a los espesores normalizados de los electrodos y el piezoeléctrico. Se presentan las limitaciones del modelo predictivo y se delimito el espectro de frecuencias en el cual se puede utilizar, además, se demostró que el comportamiento de la frecuencia de resonancia en función de los espesores de los electrodos y el piezoeléctrico varía de forma lineal si se sitúa la frecuencia de resonancia a un porcentaje por debajo de la calculada teóricamente; cuando se está cerca a esta, el comportamiento es altamente no lineal. En la validación del modelo para la frecuencia de resonancia se obtuvieron errores porcentuales promedio del 5.1% para resonadores con electrodos de aluminio y de 5.05% para resonadores con electrodos de molibdeno.