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This paper presents a reversible or lossless watermarking algorithm for images without using a location map in most cases. This algorithm employs prediction errors to embed data into an image. A sorting technique is used to record the prediction errors based on magnitude of its local variance. Using sorted prediction errors and, if needed, though rarely, a reduced size location map allows us to embed more data into the image with less distortion. The performance of the proposed reversible watermarking scheme is evaluated using different images and compared with four methods: those of Kamstra and Heijmans, Thodi and Rodriguez, and Lee et al. The results clearly indicate that the proposed scheme can embed more data with less distortion. Index Terms--Lossless data hiding, prediction error expansion, reversible watermarking.

In this paper, a modified turbo detector is proposed, which, by combining a standard turbo detector with an iterative reconstruction method, cancels multiaccess interference (MAI) and clipping distortion in uplink coded multicarrier code-division multiple-access (MC-CDMA) systems. For clipping noise cancellation, signal reconstruction methods use nondistorted samples to reconstruct distorted samples; however, in MC-CDMA systems, the MAI causes these methods to not work properly. On the other hand, because of clipping, MAI-cancellation methods do not work properly. In this paper, we propose a joint iterative MAI and clipping noise-cancellation method, which is composed of a standard turbo detection structure and a clipping error estimator in each iteration. Furthermore, we investigate the convergence of the proposed method. Simulation results show that the proposed method improves the performance of coded MC-CDMA systems in the uplink in the presence of clipping distortion. Index Terms--Interference suppression, iterative methods, signal reconstruction, turbo detection.

The desire to reduce electrical loading by using energy efficient lighting has resulted in a high level of interest in replacing conventional incandescent lamps with compact fluorescent lamps (CFL). This has resulted in the New Zealand Government, through the Electricity Commission of New Zealand, running campaigns to install five CFLs in every home by, subsidizing the cost of suitable CFLs. CFLs are however, a nonlinear load hence inject harmonics into the electrical network. The CFL use electronic ballasts and the design of these have an enormous impact on the electrical performance of the CFL. In the past, the harmonics injected into the network by CFLs has been ignored as each is very small as the typically CFL is only 20 Watts. However, if widespread adoption of CFLs occurs, the combined effect of all these small sources can be just as detrimental as one large source, and is even harder to mitigate due to their distributed nature. This paper presents the results of a study to quantify the effect widespread adoption of CFLs will have on a typical distribution network. The two aspects investigated were harmonic distortion and system losses. To enable 28 800 homes to be represented a methodology for modelling a large number of distributed loads using Norton equivalents was developed and applied. In order to assess losses, a fundamental frequency power-flow was also incorporated. Index Terms--Compact fluorescent lamps, harmonic distortion, harmonic analysis.

In this paper, a novel three-phase hybrid active power filter (HAPF) with a series resonance circuit tuned at the fundamental frequency is proposed for simultaneously suppressing harmonic currents and compensating high-capacity reactive power in high- or medium-voltage power systems. To reduce its rated capacity, the active power filter is shunted to the series resonance circuit by a matching transformer and, thus, greatly reduces its current requirements as well as voltage ratings of semiconductor switching devices. The passive power filters are used to compensate the reactive power with a constant capacity. The validity and effectiveness of this novel HAPF system have been verified by simulation and industrial application results. Index Terms--Active filters, harmonic distortion, reactive power control.

In this paper, we consider the uplink transmission in multicarrier code-division multiple-access (MC-CDMA) systems. As other multicarrier signals, MC-CDMA signals have high envelope fluctuations and a high peak-to-mean envelope power ratio (PMEPR), which leads to amplification difficulties. This is particularly important for the uplink transmission, since an efficient low-cost power amplification is desirable at the mobile terminals (MTs). Moreover, the transmission over time-dispersive channels destroys the orthogonality between spreading codes, which might lead to significant multiple-access interference levels. To reduce the envelope fluctuations of the transmitted signals, while maintaining the spectral efficiency, the MC-CDMA signal associated to each MT is submitted to a clipping device, followed by a frequency-domain filtering operation. However, the nonlinear distortion effects can be high when an MC-CDMA transmitter with reduced envelope fluctuations is intended (e.g., a small clipping level and/or when successive clipping and filtering operations are employed). In this paper, we define an iterative receiver that jointly performs a turbo multiuser detection and the estimation and cancellation of the nonlinear distortion effects. Our performance results show that the proposed receiver structure allows good performances, very close to the linear receiver ones, even for high system load and/or when a PMEPR as low as 1.7 dB is intended for each MT. Index Terms--Multicarrier code-division multiple access (MC-CDMA), multiuser detection (MUD), nonlinear distortion, turbo equalization.

Quantization plays an important role in many systems where analog-to-digital conversion and/or digital-to-analog conversion take place. If the quantization error is correlated with the input signal, then the spectrum of the quantization error will contain spurious peaks. Although analytical formulas describing this effect exist, numerical evaluation can take much effort. This brief provides approximations for the spurious-free dynamic range (SFDR) of a uniform quantizer with a single sinusoidal input, with and without additive Gaussian noise. It is shown that the SFDR increases by approximately 8 dB/bit, in case there is no noise. Generalizing this result to multitone inputs results in an additional 2 dB/bit per additional tone. Additive Gaussian noise decorrelates the sinusoid(s) and the quantization error, which results in a dramatic increase in SFDR. Index Terms--Analog-to-digital conversion, digital-to-analog conversion, harmonic distortion, intermodulation distortion, polynomial approximation, quantization, quantization noise, spurious-free dynamic range (SFDR).

Different modulation methods have been proposed to control the multilevel inverters. This paper focuses on the staircase modulation that is very popular for multilevel inverters with low switching frequencies. Nonreal-time algorithms for the staircase modulation cannot be applied practically in multilevel inverters with varying voltage steps, since the sizes of lookup tables would be huge. We propose a real-time algorithm for multilevel inverters with unequal or varying voltage steps under the staircase modulation. The algorithm results in the minimal total harmonic distortion (THD) of the output voltage of the inverter, which is proved by rigorous mathematical derivations in this paper. A new expression of THD is presented to simplify the derivation significantly. Computational complexity of the algorithm is analyzed to estimate the time cost of the calculation. We implemented the algorithm on a digital signal processor and provide experimental results that verify the performance of the proposed algorithm. Index Terms--Multilevel inverter, multilevel pulsewidth modulation (PWM), power conversion, staircase modulation.

A proper theoretical quantization-distortion model for hybrid video coding is always desirable, since this allows us to explain the behavior of existing codecs and to design better ones. However, due to the existence of motion-compensated prediction, hybrid video coding introduces interframe dependency into the encoded video, which makes its quantization-distortion characteristics difficult to analyze. In this paper, a joint analysis of quantization and motion-compensated prediction is presented. For a complete analysis, we investigate not only the distortion that quantization introduces into video signal, but also its effect on motion-compensated prediction. Based on the joint analysis, a quantization-distortion model of hybrid video coding is proposed. Our extensive experimental results show that the proposed model can estimate the quantization-distortion curve of hybrid video coding with high accuracy. Furthermore, the estimation accuracy remains high for various video sequences and encoder configurations. Index Terms--Coding distortion, hybrid video coding, motion-compensated prediction, quantization, video modeling.

This paper proposes new direct power control (DPC) strategies for three-phase dc/ac converters with improved dynamic response and steady-state performance. As with an electrical machine, source and converter flux, which equal the integration of the respective source and converter voltage, are used to define active and reactive power flow. Optimization of the lookup table used in conventional DPC is outlined first so as to improve power control and reduce current distortion. Then, constant switching frequency DPC is developed where the required converter voltage vector within a fixed half switching period is calculated directly from the active and reactive power errors. Detailed angle compensation due to the finite sampling frequency and the use of an integral controller to further improve the power control accuracy are described. Both simulation and experimental results are used to compare conventional DPC and vector control, and to demonstrate the effectiveness and robustness of the proposed control strategies during active and reactive power steps, and line inductance variations. Index Terms--DC/AC converter, direct power control (DPC), grid connection.

Severe voltage distortion, due to power system harmonic resonance, has been reported in recent years. This issue becomes more significant in high penetration of a photovoltaic (PV) network. A conventional voltage detection active filter operates as similar conductance for all harmonic frequencies to resolve this problem whether in a fixed conductance command or in an automatic gain adjustment control. However, its filtering capability is impeded by the mismatch between the active filter and the radial line, and the voltage distortion may still be significant. This paper proposes a discrete frequency tuning active filter to suppress power system harmonics. The active filter operates as variable conductance for each individual harmonic frequency. Each harmonic conductance is dynamically adjusted according to the corresponding harmonic voltage distortion of the active filter installation point in response to increase or decrease of nonlinear loads, or variation of resonant frequency in the power system. The mismatching problem between the feeder impedance and the active filter can be avoided effectively. Therefore, harmonic voltage distortion can be maintained at an allowable level throughout the feeder with lower peak current and lower rms current of the active filter, and loads installed at various locations of the power system receive more uniform voltage waveform. Index Terms--Active power filter, harmonic resonance, harmonic voltage damping.

In this paper, an interleaved ac--dc converter based on current tracking without any current sharing required is presented and applied to a two-phase flyback converter. This is realized using two critical-conduction-mode (CRM) pulsewidth-modulated chips, together with a field-programmable gate array technique. By doing so, not only are the total harmonic distortion and the power factor improved but the output power is also upgraded. In this paper, the circuit operation is described in detail, with some experimental results given to verify the proposed control scheme. Index Terms--AC-DC converter, current sharing, field-programmable gate array (FPGA), flyback converter, interleaved control, output power, power factor (PF), total harmonic distortion (THD).

A general multiple description video coding (MDVC) framework based on hierarchical B pictures is proposed in this paper. Two or more descriptions are generated by employing the hierarchical B pictures of H.264/AVC scalable extension, where temporal-level-based key pictures are selected in a staggered way among different descriptions. Based on this hierarchical and staggered structure, inter-description redundancy control is studied to achieve a good central/side-distortion-rate tradeoff. Moreover, to better exploit multiple complementary descriptions, a linear combination of received descriptions is employed to optimize decoding results. This proposed MDVC framework is H.264/AVC-compliant for each temporal scalable description. Some existing temporal-splitting MDVC techniques can be considered as a degraded case in the proposed structure. Experimental results validate the effectiveness of the proposed design for MDVC. Index Terms--Central/side distortion, hierarchical B pictures, multiple description coding (MDC), redundancy control, video coding.

In this brief, we present a 60-W power amplifier that is linearized using an RF predistorter for multicarrier wideband code-division multiple-access (WCDMA) applications. The proposed RF predistorter is fully composed of RF or analog circuits, and it has a moderate memory effect compensation capability using a delayed third-order intermodulation (IM3) component path. It also includes the IM5 generation circuits and a compact IM3 generator that is capable of autocanceling for the fundamental component. The proposed RF predistorter was implemented and applied to a 60-W high-power WCDMA amplifier. For a four-carrier downlink WCDMA signal, the RF predistorter improved the adjacent channel leakage power ratio at a 5-MHz offset by 6.19 dB at an average output power of 48 dBm. The total efficiency of the system is as high as 13.6% at the same output power level. At an output power level of 60 W, the linearized power amplifier complies with the linearity specification of the WCDMA system. Index Terms--Intermodulation distortion (IMD), memory effect, multicarrier power amplifier, power amplifier, predistorter.

The four-switch inverter, having a lower number of insulated gate bipolar transistors (IGBTs), has been studied for the possibility of reducing the inverter cost. But it has a limited performance in the low-frequency region, because the balance among the phase currents collapses due to the fluctuation of the center tap voltage of the dc-link capacitors. This problem could be solved if the dc-link capacitance is infinitely large, but it is a costly solution. In this paper, this problem is looked at from the perspective of source impedance and the voltage variation caused by the current flow through the capacitors. The source impedance of the center tap is large compared with other normal IGBT arms. This causes an asymmetry among the three voltage sources, resulting in phase current distortion and unbalance. Second, the capacitor voltage change caused by current flow is another source of current distortion and unbalance. The voltage errors are derived, and based on them, a compensation method is proposed. Effectiveness of the proposed method is demonstrated by the simulation and experimental results. Index Terms--Current unbalance, four-switch inverter, induction motor.

An important distortion mechanism in hysteretic self-oscillating (SO) class-D (switch mode) power amplifiers--carrier distortion--is analyzed and an optimization method is proposed. This mechanism is an issue in any power amplifier application where a high degree of proportionality between input and output is required, such as in audio power amplifiers or xDSL drivers. From an average-mode point of view, carrier distortion is shown to be caused by nonlinear variation of the hysteretic comparator input average voltage with the output average voltage. This easily causes total harmonic distortion figures in excess of 0.1-0.2%, inadequate for high-quality audio applications. Carrier distortion is shown to be minimized when the feedback system is designed to provide a triangular carrier (sliding) signal at the input of a hysteretic comparator. The proposed optimization method is experimentally proven in an audio power amplifier leading to THD figures that are comparable to the state of the art. Experimental hardware is a hysteretic SO bandpass current-mode-controlled single-ended audio power amplifier capable of 45 W into 8 [OMEGA] or 80 W into 4 [OMEGA] from a [+ or -] 34 V supply with less than 0.03% THD from 100 Hz to 6.7 kHz. Carrier distortion is shown to account for this limitation in THD performance. Index Terms--Audio, class-D, hysteretic, power amplifier, sliding.

This paper discusses the evaluation of different current controllers employed for grid-connected distributed power generation systems having variable input power, such as wind turbines and photovoltaic systems. The focus is mainly set on linear controllers such as proportional-integral, proportional--resonant, and deadbeat (DB) controllers. Additionally, an improved DB controller robust against grid impedance variation is also presented. Since the paper discusses the implementation of these controllers for grid-connected applications, their evaluation is made in three operating conditions. First, in steady-state conditions, the contribution of controllers to the total harmonic distortion of the grid current is pursued. Further on, the behavior of controllers in the case of transient conditions like input power variations and grid voltage faults is also examined. Experimental results in each case are presented in order to evaluate the performance of the controllers. Index Terms--Current controllers, current harmonic distortion, distributed power generation systems (DPGSs), grid faults, input power variations.

A dynamic element-matching (DEM) method, i.e., randomized thermometer coding (RTC), for low-cost current-steering digital-to-analog converter (DAC) design is proposed. The proposed RTC method exhibits randomized starting-element selection, consecutive-element selection, and low-element switching activity. It can be used to significantly suppress the harmonic distortion caused by a large mismatch of small-area transistors, and, thus, very low cost DACs can be realized. With the proposed RTC, a 14-bit current-steering DAC is implemented in a 1P6M 0.18-[micro]m 1.8-V CMOS process. The measured spurious-free dynamic range (SFDR) exceeds 80 dB. The measurement results showed that RTC improves the SFDR by more than 16 dB. The DAC has an active area of less than 0.28 [mm.sup.2]. The proposed DAC achieves a smaller active area than state-of-the-art 12- to 14-bit DACs. Index Terms--Current steering, digital-to-analog converters (DACs), dynamic element matching (DEM).

We present a theoretical analysis of coherent microwave photonic filters (MPFs), which employ intensity modulation and direct detection. Expressions for the frequency dependent power gain are derived. The noise and distortion performance of MPFs is also analyzed. Two example filter implementations are given which provide a 100-MHz passband centered at 40 GHz. Index Terms--Microwave photonic filter (MPF), microwave photonics, nonlinear distortion, optical waveguide filter.

A newly introduced inverse class-E power amplifier (PA) was designed, simulated, fabricated, and characterized. The PA operated at 2.26 GHz and delivered 20.4-dBm output power with peak drain efficiency (DE) of 65% and power gain of 12 dB. Broadband performance was achieved across a 300-MHz bandwidth with DE of better than 50% and 1-dB output-power flatness. The concept of enhanced injection predistortion with a capability to selectively suppress unwanted sub-frequency components and hence suitable for memory effects minimization is described coupled with a new technique that facilitates an accurate measurement of the phase of the third-order intermodulation (IM3) products. A robust iterative computational algorithm proposed in this paper dispenses with the need for manual tuning of amplitude and phase of the IM3 injected signals as commonly employed in the previous publications. The constructed inverse class-E PA was subjected to a nonconstant envelope 16 quadrature amplitude modulation signal and was linearized using combined lookup table (LUT) and enhanced injection technique from which superior properties from each technique can be simultaneously adopted. The proposed method resulted in 0.7% measured error vector magnitude (in rms) and 34-dB adjacent channel leakage power ratio improvement, which was 10 dB better than that achieved using the LUT predistortion alone. Index Terms--Class E, injection, linearization, lookup table (LUT), memory effects, power amplifier (PA), predistortion.

In this paper we present a novel algorithm to speed up the inter-mode decision process for the H.264/AVC encoding. The proposed inter-mode decision scheme determines the best coding mode of a given macroblock (MB) by predicting the best mode from neighboring MBs in time and in space and by estimating its rate-distortion (RD) cost from the MB in the previous frame. The performance of the proposed algorithm is evaluated in metrics such as the encoding time, the average peak signal-to-noise ratio and the coding bit-rate for test sequences. Simulation results demonstrate that the proposed algorithm can determine the best mode using only one or two rate-distortion cost computations for about half of the MBs resulting in up to 56% total encoding time reduction with on average 2.4% of bit rate increase at the same PSNR compared to H.264/AVC JM 12.1. Index Terms--H.264/AVC encoder, mode decision, mode prediction, rate-distortion (R-D) theory, video coding.

In today's hybrid video coding, Rate-Distortion Optimization (RDO) plays a critical role. It aims at minimizing the distortion under a constraint on the rate. Currently, the most popular RDO algorithm for one-pass coding is the one recommended in the H.264/AVC reference software. It, or HR-[lambda] for convenience, is actually a kind of universal method which performs the optimization only according to the quantization process while ignoring the properties of input sequences. Intuitively, it is not efficient all the time and an adaptive scheme should be better. Therefore, a new algorithm Lap-[lambda] is presented in this paper. Based on the Laplace distribution of transformed residuals, the proposed Lap-[lambda] is able to adaptively optimize the input sequences so that the overall coding efficiency is improved. Cases which cannot be well captured by the proposed models are considered via escape methods. Comprehensive simulations verify that compared with HR-[lambda], Lap-[lambda] shows a much better or similar performance in all scenarios. Particularly, significant gains of 1.79 dB and 1.60 dB in PSNR are obtained for slow sequences and B-frames, respectively. Index Terms--Hybrid video coding, Lagrange multiplier selection, rate-distortion optimization (RDO).

A systematic analysis of line-current distortions of the discontinuous-conduction-mode and the continuous-conduction-mode boundary boost power factor correction converter due to valley switching (VS) and switching-frequency limitation, where VS is either maintained or lost after the onset of switching-frequency limitation, is provided. Closed-form expressions for the line current are derived. It is shown that if the switching frequency is limited and VS is not maintained, the line current is more distorted with voltage-mode control than with current-mode control. The effects of line-current distortions are demonstrated with both simulation and experimental results. Index Terms--Boost converter, discontinuous conduction mode (DCM)/continuous conduction mode (CCM) boundary, line-current distortion, power factor correction (PFC), single-phase rectifier, switching-frequency limitation, valley switching (VS).

Two linear low-loss varactor configurations for tunable RF applications are compared. The wide tone-spacing varactor stack provides the best linearity for signals with relative large tone spacing like receiver jammer situations. The narrow tone-spacing varactor stack offers the highest linearity for in-band-modulated signals, and is better suited to adaptive transmitters. Both structures make use of a varactor with an exponential C([V.sub.R]) relation, and so the different requirements of transmit and receive chains can be addressed in one technology. Both configurations have been realized in a silicon-on-glass technology. The measured Q at 1.95 GHz is from ~40 to 200 over a capacitance tuning range of 3.5 with the maximum control voltage of 12 V. The measured OIP3 of both structures are roughly 60 dBm. Index Terms--Adaptive systems, band switching, impedance matching, low distortion, tunable filters, tuners, varactors.

The adaptive neuro-fuzzy inference system (ANFIS) has been widely used for modeling different kinds of nonlinear systems including RF power amplifiers (PAs). The modified ANFIS (MANFIS) architecture is simpler than that of ANFIS, but with nearly the same performance for modeling nonlinear systems. In this paper, the MANFIS is applied to model RF PAs with memory effects. The simulation and experimental results both in the time and frequency domains show that this model has good modeling accuracy and the characteristics of faster convergence and lower computational complexity compared with the ANFIS model. The normalized mean squared errors of the MANFIS model are slightly lower than those of some other neural network models such as the real-valued time delay neural network, radial basis-function neural network, etc. Finally, the MANFIS model is successfully used in a digital predistortion system, which can provide over 10-dB adjacent channel leakage ratio improvement for three-carrier wideband code division multiple access signals. Index Terms--Adaptive neuro-fuzzy inference system (ANFIS), adjacent channel leakage ratio (ACLR), digital predistortion (DPD), power amplifiers (PAs).

This work proposes two capacitor-swapping techniques, random feedback-capacitor interchanging (RFCI) and averaging RFCI (ARFCI) techniques, for cyclic analog-to-digital converters (ADCs) to reduce the harmonic distortion caused by capacitor mismatch without trimming or calibration. The proposed RFCI and ARFCI techniques can be realized by simply rearranging the capacitor connections of the ADCs in different operation cycles. Hence, complicated circuits are not needed. The RFCI technique improves upon the spurious-free dynamic range (SFDR) of conventional ADCs without sacrificing the signal-to-noise-and-distortion ratio (SNDR). The ARFCI technique has better SNDR characteristics but less SFDR improvement than RFCI. With RFCI and ARFCI, the capacitor matching requirement is relaxed for high SFDR and the capacitance can then be reduced to meet the SNDR requirement, reducing the driving capability of the opamps, and thus reducing the total power and area of the ADCs. The prior commutated feedback-capacitor switching (CFCS) technique (see Yu et al., 1996) has less effect on the SFDR of cyclic ADCs but improves the signal-to-noise ratio (SNR). This work proposes a reconfigurable cyclic ADC architecture that can be easily reconfigured to operate with one of the RFCI, ARFCI, and CFCS techniques by a simple timing control circuit. This reconfigurable topology provides three conversion characteristics with one item of intellectual property (IP), rather than three separate IPs and thus greatly enhances the capabilities of cyclic ADCs. Index Terms--Analog-to-digital converter (ADC), capacitor mismatch, spurious-free dynamic range (SFDR).

Echo state networks (ESNs) are a special form of recurrent neural network (RNN). Complexities with existing algorithms have thus far limited supervised training techniques for RNNs from widespread use. When it comes to practical applications, multilayer perceptron neural networks (MLPNs) still dominate. This paper investigates the application of ESNs for the prediction of true current harmonics of a nonlinear load in the presence of distorted supply voltage. The determination of true harmonic current injection by individual loads is complicated by the fact that the supply voltage waveform at the point of common coupling (PCC) is distorted by other loads at the PCC or further upstream. Experimental results are presented with the proposed ESN algorithm applied to a laboratory test circuit. The difference between the measured current harmonics and the predicted ESN results are quantified in the form of a new parameter. The uniqueness of the proposed harmonic prediction method is that the results are obtained without disrupting the operation of any load and only require the acquisition of voltage and current waveforms. This method is applicable for both single-and three-phase loads. Index Terms--AC motor drives, harmonic analysis, harmonic distortion, neural network applications, neural network architecture.

A novel approach for power amplifier (PA) characterization suitable for single iteration digital predistorter synthesis is proposed. This approach consists of synergetic crest factor reduction and baseband digital predistortion to avoid the average power variation at the input of the PA between the characterization and linearization steps. This is achieved by bypassing the crest factor reduction block during the characterization step and by applying it concurrently with digital predistortion in the linearization step. First, the PA's behavior sensitivity to the average input power is evaluated. The limitations of conventional approaches for the PA characterization, in the context of single iteration digital predistortion, are then demonstrated. The performance of the proposed technique is validated experimentally on a 300-W peak PA. The measured improvement of the adjacent channel power ratio at the output of the linearized amplifier is 16 dBc for the conventional approach and 29 dBc for the proposed approach. Index Terms--Crest factor reduction, digital predistorter (DPD), linearization, peak-to-average power ratio (PAPR), power amplifier (PA), wideband code division multiple access (WCDMA).

This paper describes a new design approach for a power amplifier (PA) of the highly efficient hybrid envelope elimination and restoration (H-EER) transmitter. Since the PA operates mostly at the average power region of the modulation signal, power-added efficiency (PAE) of the PA at the average drain voltage is very important for the overall transmitter PAE. Accordingly, the PA is designed to have a maximum PAE in that region. The performances of the proposed PA and a conventional PA under H-EER operation are evaluated via ADS and MATLAB simulations using a behavioral large-signal model of a silicon LDMOSFET, which verifies that the proposed PA has significant advantages for the H-EER transmitter in both PAE and output power. A saturated amplifier, inverse class F, has been implemented using a 5-W peak envelope power LDMOSFET for 3GPP forward-link single-carrier wideband code-division multiple-access at 1 GHz with a peak-to-average power ratio of 9.8 dB. An envelope amplifier is built that has an efficiency of above 68% and peak output voltage of 31 V for an interlock experiment. The overall PAE of the transmitter with a conventional PA is 35.5% at an output power of 29.2 dBm. On the other hand, the transmitter with the proposed PA delivers significantly improved performances: PAE increased by 4% and output power by 2.5 dB. The H-EER transmitter has been linearized by the digital feedback predistortion technique. The measured error vector magnitude is reduced to 1.47% from 6.4%. These results clearly show that the proposed architecture is a good candidate for efficient linear transmitters. Index Terms--Adjacent channel leakage ratio (ACLR), digital feedback predistortion (DFBPD), efficiency, error vector magnitude (EVM), hybrid envelope elimination and restoration (H-EER), linearity, peak-to-average power ratio (PAPR), power-added efficiency (PAE), power amplifier (PA), RF transmitter, wideband code-division multiple-access (WCDMA).

We propose a distortion optimal rate allocation algorithm for robust transmission of embedded bitstreams over noisy channels. The algorithm is based on the backward application of a Viterbi-like algorithm to a search trellis, and can be applied to both scenarios of fixed and variable channel packet length problems, referred to as FPP and VPP, respectively. For the VPP, the complexity of the algorithm is comparable to the well-known dynamic programming approach of Chande and Farvardin. For the FPP, where no low-complexity algorithm is known, the complexity of the proposed algorithm is O([N.sup.2]), where N is the number of transmitted packets. Index Terms--Combined source/channel coding, distortion optimal rate allocation algorithm, embedded bitstreams, embedded coding, joint source/channel coding, progressively coded bitstreams, trellis, unequal error protection, Viterbi algorithm.

A family of switch-linear hybrid (SLH) converters is proposed, which integrates the advantages of linear amplifiers into switch-mode converters without sacrificing the energy efficiency of the system. Due to its high input resistance and low output resistance, a source (emitter) follower is introduced to be the core unit fed by a switching-filter supply, which constitutes the hybrid converter's topology. The proposed SLH converters feature excellent load robustness in addition to other advantages of pure linear systems, resulting in small volume and cheap cost. This paper describes the typical topologies and basic operating principle of the SLH converters. It is revealed that the special operation status that MOSFET devices possess uniquely has led to the derivation of a number of new converter topologies. Theoretical analysis and experimental results verify the excellent steady and dynamic performance of the SLH converters. Index Terms--AC-AC converter, DC--AC converter, low distortion, low THD, switch-linear hybrid converter, switching amplifier, switching converter.