Search

LLC converter design optimization remains a challenging task for varying loads such as in battery chargers. There are numerous L-L-C combinations to choose from a design space that can satisfy the required voltage gains of the application. An accurate magnetic model is essential to optimally size the passive components according to the application needs. This paper provides a new design tool for gapped core magnetics to optimize the transformer and resonant inductor in LLC converters. Unlike conventional design algorithms, the proposed algorithm considers multiple distributed cores and selects the optimal magnetic flux density by minimizing a penalty function that includes power loss, cost and volume of the magnetic components using Big-Bang Big-Crunch Algorithm. The gapped core transformer and inductor design equations have been verified in Ansys Maxwell and Simplorer co-simulation environment for a 3700 W 48 V LLC and calculated power loss have been compared with experimental results. For the givenLmandLrpair of37.52μHand9.38μH, the proposed magnetic model designed a transformer with two-distributed cores, each one exhibiting a magnetizing inductance of17.73μHand leakage inductance of0.7μHon a EE422120 with 3F36 material. The total power loss of the transformers are measured as 12.44 W on a 3700 W prototype switched at 350 kHz.

Latest developments in low voltage wide-bandgap semiconductor technology have increased the popularity of single-phase multi-level (ML) totem pole (TP) power-factor correction (PFC) converters. Phase shifted flying capacitor based power stages offer several advantages, such as higher input current ripple frequency, smaller size inductor and differential mode (DM) filter, and usage of low voltage Gallium Nitride (GaN) devices with better figure-of-merit. Even though it has been proven that ML TP PFC converters have good power density and efficiency, the determination of optimal voltage levels and switching frequency requires a system-level optimization. This paper proposes an optimization framework for ML TP PFC converters, taking the power stage, thermal, DM filter, and magnetic designs, as well as practical design considerations, into account to determine the voltage-levels and switching frequency that minimize the power losses, cost and volume of the total system. To process output power of 3700W, the optimization tool suggests using a 4-Level GaN TP PFC topology switched at 45 kHz. The outcome of the tool has been compared with other fixed inductor current ripple designs, as well as optimized designs for 3-Level and 5-Level TP PFC converters in terms of cost, volume, and power losses. In accordance with the optimization results, a prototype of a 4L TP PFC rated at 3700 W is designed, which achieves a peak efficiency of 99.6% at 1 kW and >99.1% efficiency under the full power range.