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In Yunnan and other plateau mountainous areas, hydropower and mineral resources are abundant, and there are relatively many vehicles used for the transportation of large hydropower facilities. The widespread phenomenon of vehicle overload causes severe fatigue among the drivers. However, there is no reference vehicle load spectrum for fatigue analysis in the existing research. The application of wireless sensing technology to bridge health monitoring is favorable for the entire monitoring system’s low-cost and intelligent development. In this study, wireless sensors are used to collect sensing data in the measured area and perform preliminary filtering processing. The data collected by the sensing layer is aggregated at the TD gateway layer to realize local short-term storage of monitoring data, and 3G wireless transmission is used for the effective processing of the data. The clustering method is used to classify the vehicle models based on investigating the most representative expressway traffic flow information in Yunnan Province. Moreover, the weighted probability distribution model of different vehicle models is established through statistical analysis, which simplifies the composition’s fatigue intensity spectrum model. The selection of five vehicles of the equivalent model followed by a six-axle vehicle has the most significant impact on bridge damage as the standard fatigue vehicle. The research results establish a basis for the fatigue design of highway bridges in plateau and mountainous areas and provide data to establish vehicle fatigue load spectra in national highway regions.

In the present study, we investigated the feasibility of the vaginal administration of drospirenone silicone IVR. The in vitro release characteristics of matrix-type and reservoir-type IVR were compared under sink conditions in 21 days. At the same time, API excipients compatibility and preformulation study was performed by HPLC, IR, and DSC methods. Biocompatibility of reservoir system was evaluated by tolerability on tissue level in rats. It was found that, under strong light exposure, high temperature, and high humidity conditions, drospirenone and excipients had no significant interactions. The daily release of reservoir-type IVR was about 0.5 mg/d sustaining 21 days, which significantly decreased the burst effect compared with the matrix system. When drospirenone was modified by the PVPk30 in the reservoir system formulation, the daily release rate increased to 1.0 mg/d sustaining 21 days. The cumulative release of reservoir-type IVR was fitted to zero release equation. In addition, biocompatibility of drospirenone IVR system in this dosage is safe. It is feasibility feasibile to further developed for safe, convenient, and effective contraceptive drug delivery with reduced dosing interval.

This paper presents three new types of pulse quenching mechanism (NMOS-to-PMOS, PMOS-to-NMOS and NMOS-to-NMOS) and verifies them using 3-D TCAD mixed mode simulations at the 90 nm node. The three major contributions of this paper are: (1) with the exception of PMOS-to-PMOS, pulse quenching is also prominent for PMOS-to-NMOS and NMOS-to-NMOS in a 90 nm process. (2) Pulse quenching in general correlates weakly with ion LET, but strongly with incident angle and layout style (i.e. spacing between transistors and n-well contact area). (3) Compact layout and cascaded inverting stages can be utilized to promote SET pulse quenching in combinatorial circuits.

A new FPGA architecture suitable for digital signal processing applications is presented. DSP modules can be inserted into FPGA conveniently with the proposed architecture, which is much faster when used in the field of digital signal processing compared with traditional FPGAs. An advanced 2-level MUX (multiplexer) is also proposed. With the added SLEEP MODE PASS to traditional 2-level MUX, static leakage is reduced. Furthermore, buffers are inserted at early returns of long lines. With this kind of buffer, the delay of the long line is improved by 9.8% while the area increases by 4.37%. The layout of this architecture has been taped out in standard 0.13 μm CMOS technology successfully. The die size is 6.3 × 4.5 mm2 with the QFP208 package. Test results show that performances of presented classical DSP cases are improved by 28.6%-302% compared with traditional FPGAs.