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2-Dimensional (2D) materials are attracting strong interest in printed electronics because of their unique properties and easy processability, enabling the fabrication of devices with low cost and mass scalable methods such as inkjet printing. For the fabrication of fully printed devices, it is of fundamental importance to develop a printable dielectric ink, providing good insulation and the ability to withstand large electric fields. Hexagonal boron nitride (h-BN) is typically used as a dielectric in printed devices. However, the h-BN film thickness is usually above 1 μm, hence limiting the use of h-BN in low-voltage applications. Furthermore, the h-BN ink is composed of nanosheets with broad lateral size and thickness distributions, due to the use of liquid-phase exfoliation (LPE). In this work, we investigate anatase TiO2 nanosheets (TiO2-NS), produced by a mass scalable bottom-up approach. We formulate the TiO2-NS into a water-based and printable solvent and demonstrate the use of the material with sub-micron thickness in printed diodes and transistors, hence validating the strong potential of TiO2-NS as a dielectric for printed electronics.

There is an increasing interest in printed electronics driven principally by flexible and wearable applications. The interest stems from the ability to fabricate electronic devices, such as Field Effect Transistors (FET), more efficiently in terms of materials use and cost‐effectively than traditional lithographic techniques. Challenges persist in achieving high resolution and accuracy in defining device geometry. In the study, a high‐resolution materials printer able to achieve resolutions in the micron range, surpassing the capabilities of commercially available printers is successfully designed and fabricated. The printer incorporates an all‐in‐one printing system, comprising Inkjet and a Dip Pen Nanolithography (DPN) technique, enabling both additive and subtractive manufacturing at the microscale. The experiments demonstrate the successful fabrication of FETs based on 2D materials (2DMs), with micrometric channel lengths exhibiting a high degree of controllability and repeatability, even when contacting limited channel regions as micrometer‐sized molybdenum disulfide (MoS2) flakes. Electrical characterizations of the fabricated devices underscore the significant technological advancements achieved by the prototypes. [ABSTRACT FROM AUTHOR]

This work demonstrates the fabrication and characterization of single-layer MoS2 field-effect transistors using biodegradable albumen (chicken eggwhite) as gate dielectric. By introducing albumen as an insulator for MoS2 transistors high carrier mobilities (up to ~90 cm2 V−1 s−1) are observed, which is remarkably superior to that obtained with commonly used SiO2 dielectric which we attribute to ionic gating due to the formation of an electric double layer in the albumen MoS2 interface. In addition, the investigated devices are characterized upon illumination, observing responsivities of 4.5 AW−1 (operated in photogating regime) and rise times as low as 52 ms (operated in photoconductivity regime). The presented study reveals the combination of albumen with van der Waals materials for prospective biodegradable and biocompatible optoelectronic device applications. Furthermore, the demonstrated universal fabrication process can be easily adopted to fabricate albumen-based devices with any other van der Waals material. [ABSTRACT FROM AUTHOR]

The strong reduction of thermal conductivity with respect to bulk silicon makes nanostructured silicon one of the best materials for highly efficient direct conversion of heat into electrical power and vice-versa. The widespread technologies for the integration of silicon devices can be used to define on-chip micro thermoelectric generators (scavengers); similar structures could also be used for precise and well-localized cooling through the reverse process of heat pumping. However, the road to the fabrication of integrated thermal energy scavengers or cooler, based on silicon, is still very long. In this work, the design and the fabrication process of on-chip thermoelectric devices based on a large number of interconnected monocrystalline silicon nanobeams, very tall (>1 µm) and thin (less than 200 nanometers), arranged in large areas combs is shown. The small width of the nanobeams gives a reduced thermal conductivity, and the height perpendicular to the substrate allows the definition of a highly dense collection of nanostructures. The total cross-section is far broader than that of other nanostructures, a characteristic that guarantees both mechanical stability and larger deliverable power per unit area., (© 2024 The Author(s). Small published by Wiley-VCH GmbH.)