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Quantum Entanglement is a vital phenomenon required for realizing secure quantum networks, so much that distributed entanglement can be re-imagined as a commodity which can be traded to enable and maintain these networks. We explore the idea of commercializing entanglement-based cryptography and future applications where advanced quantum memory systems support less advanced users. We design a sneakernet-based quantum communication network with a central party connecting the users through delayed-choice quantum entanglement swapping, using quantum Low-Density-Parity-Check (qLDPC) encoded qubits on neutral atoms. Our analysis compares this approach with traditional surface codes, demonstrating that qLDPC codes offer superior scaling in terms of resource efficiency and logical qubit count. We show that with near-term attainable patch sizes, one can attain medium-to-high fidelity correlations, paving the way towards large-scale commercial quantum networks.

Significant work has been done to develop quantum satellites, which generate entangled pairs in space and distribute them to ground stations separated some distance away. The reverse uplink case, where pairs are generated on the ground and swapped on the satellite using an optical Bell-measurement, has not been seriously considered due to a prevailing assumption that it is practically infeasible. In this letter, we illustrate the feasibility of performing Discrete Variable photonic Bell-measurements in space by conducting a detailed numerical analysis to estimate the channel efficiency and attainable pair fidelity for various satellite-station configurations. Our model accounts for a wide range of physical effects such as atmospheric effects, stray photons, and mode mismatch. Our findings show promise toward the feasibility of photonic Bell-measurements in space, which motivates future research towards large-scale Satellite-based uplink entanglement distribution., Comment: 6 pages, 3 figures

The development of fault-tolerant quantum computers (FTQCs) is gaining increased attention within the quantum computing community. Like their digital counterparts, FTQCs, equipped with error correction and large qubit numbers, promise to solve some of humanity's grand challenges. Estimates of the resource requirements for future FTQC systems are essential to making design choices and prioritizing R&D efforts to develop critical technologies. Here, we present a resource estimation framework and software tool that estimates the physical resources required to execute specific quantum algorithms, compiled into their graph-state form, and laid out onto a modular superconducting hardware architecture. This tool can predict the size, power consumption, and execution time of these algorithms at as they approach utility-scale according to explicit assumptions about the system's physical layout, thermal load, and modular connectivity. We use this tool to study the total resources on a proposed modular architecture and the impact of tradeoffs between and inter-module connectivity, latency and resource requirements.

The development of quantum computing systems for large scale algorithms requires targeted error rates unachievable through hardware advancements alone. Quantum Error Correction (QEC) allows us to use systems with a large number of physical qubits to form a fault tolerant system with a lower number of logical qubits and a favourable logical error rate. While some gates can be easily implemented in a QEC code transversally, there is no code that has a universal set of transversal gates. Transversal Injection is a new method of preparing logical non-Pauli eigenstates that can be used as resource states for quantum computation. State preparation can be done directly in the surface code and has the potential to prepare higher fidelity injected states. Compared to other techniques, transversal injection can reduce the resource burden for state distillation protocols. In this paper, the authors present the theory behind this new technique as well as an algorithm for calculating the resulting logical states prepared in the surface code., Comment: 6 Pages, 3 Figures, IEEE QEC23. arXiv admin note: substantial text overlap with arXiv:2211.10046

The development of quantum computing systems has been a staple of academic research since the mid-1990s when the first proposal for physical platforms were proposed using Nuclear Magnetic Resonance and Ion-Trap hardware. These first proposals were very basic, essentially consisting of identifying a physical qubit (two-level quantum system) that could be isolated and controlled to achieve universal quantum computation. Over the past thirty years, the nature of quantum architecture design has changed significantly and the scale of investment, groups and companies involved in building quantum computers has increased exponentially. Architectural design for quantum computers examines systems at scale: fully error-corrected machines, potentially consisting of millions if not billions of physical qubits. These designs increasingly act as blueprints for academic groups and companies and are becoming increasingly more detailed, taking into account both the nature and operation of the physical qubits themselves and also peripheral environmental and control infrastructure that is required for each physical system. In this paper, several architectural structures that I have worked on will be reviewed, each of which has been adopted by either a national quantum computing program or a quantum startup., Comment: 39 Pages. This paper was written in the context of an award with the Royal Society of New South Wales, focused on my personal contributions and impact to quantum computing development, and should be read with that in mind

Graph states are useful computational resources in quantum computing, particularly in measurement-based quantum computing models. However, compiling arbitrary graph states into executable form for fault-tolerant surface code execution and accurately estimating the compilation cost and the run-time resource cost remains an open problem. We introduce the Substrate Scheduler, a compiler module designed for fault-tolerant graph state compilation. The Substrate Scheduler aims to minimize the space-time volume cost of generating graph states. We show that Substrate Scheduler can efficiently compile graph states with thousands of vertices for "A Game of Surface Codes"-style patch-based surface code systems. Our results show that our module generates graph states with the lowest execution time complexity to date, achieving graph state generation time complexity that is at or below linear in the number of vertices and demonstrating specific types of graphs to have constant generation time complexity. Moreover, it provides a solid foundation for developing compilers that can handle a larger number of vertices, up to the millions or billions needed to accommodate a wide range of post-classical quantum computing applications., Comment: 11 pages, 11 figures

The reliable, deterministic production of trustworthy high-quality single photons is a critical component of discrete variable, optical quantum technology. For single-photon based fully error-corrected quantum computing systems, it is estimated that photon sources will be required to produce a reliable stream of photons at rates exceeding 1 GHz [1]. Photon multiplexing, where low probability sources are combined with switching networks to route successful production events to an output, are a potential solution but requires extremely fast single photon switching with ultra-low loss rates. In this paper we examine the specific properties of the switching elements and present a new design that exploits the general one-way properties of common switching elements such as thermal pads. By introducing multiple switches to a basic, temporal multiplexing device, we are able to use slow switching elements in a multiplexed source being pumped at much faster rates. We model this design under multiple error channels and show that anticipated performance is now limited by the intrinsic loss rate of the optical waveguides within integrated photonic chipsets.

In this paper, we explore the relationship between the width of a qubit lattice constrained in one dimension and physical thresholds for scalable, fault-tolerant quantum computation. To circumvent the traditionally low thresholds of small fixed-width arrays, we deliberately engineer an error bias at the lowest level of encoding using the surface code. We then address this engineered bias at a higher level of encoding using a lattice-surgery surface code bus that exploits this bias, or a repetition code to make logical qubits with unbiased errors out of biased surface code qubits. Arbitrarily low error rates can then be reached by further concatenating with other codes, such as Steane [[7,1,3]] code and the [[15,7,3]] CSS code. This enables a scalable fixed-width quantum computing architecture on a square qubit lattice that is only 19 qubits wide, given physical qubits with an error rate of $8.0\times 10^{-4}$. This potentially eases engineering issues in systems with fine qubit pitches, such as quantum dots in silicon or gallium arsenide., Comment: 34 pages, 19 figures

Fault-tolerant, error-corrected quantum computation is commonly acknowledged to be crucial to the realisation of large-scale quantum algorithms that could lead to extremely impactful scientific or commercial results. Achieving a universal set of quantum gate operations in a fault-tolerant error-corrected framework suffers from a `conservation of unpleasantness'. In general, no matter what error correction technique is employed, there is always one element of a universal gate set that carries a significant resource overhead - either in physical qubits, computational time, or both. Specifically, this is due to the application of non-Clifford gates. A common method for realising these gates for stabiliser codes such as the surface code is a combination of three protocols: state injection, distillation and gate teleportation. These protocols contribute to the resource overhead compared to logical operations such as a CNOT gate and contributes to the qubit resources for any error-corrected quantum algorithm. In this paper, we introduce a very simple protocol to potentially reduce this overhead for non-Clifford gates: Transversal Injection. Transversal injection modifies the initial physical states of all data qubits in a stabiliser code before standard encoding and results in the direct preparation of a large class of single qubit states, including resource states for non-Clifford logic gates. Preliminary results hint at high quality fidelities at larger distances and motivate further research on this technique.

We present a quantum circuit compiler that prepares an algorithm-specific graph state from quantum circuits described in high level languages, such as Cirq and Q#. The computation can then be implemented using a series of non-Pauli measurements on this graph state. By compiling the graph state directly instead of starting with a standard lattice cluster state and preparing it over the course of the computation, we are able to better understand the resource costs involved and eliminate wasteful Pauli measurements on the actual quantum device. Access to this algorithm-specific graph state also allows for optimisation over locally equivalent graph states to implement the same quantum circuit. The compiler presented here finds ready application in measurement based quantum computing, NISQ devices and logical level compilation for fault tolereant implementations.

In this tutorial, we introduce basic conceptual elements to understand and build a gate-based superconducting quantum computing system.

Reliable resource estimation and benchmarking of quantum algorithms is a critical component of the development cycle of viable quantum applications for quantum computers of all sizes. Determining critical resource bottlenecks in algorithms, especially when resource intensive error correction protocols are required, will be crucial to reduce the cost of implementing viable algorithms on actual quantum hardware.

We introduce a data bus, for reducing the qubit counts within quantum computations (protected by surface codes). For general computations, an automated trade-off analysis (software tool and source code are open sourced and available online) is performed to determine to what degree qubit counts are reduced by the data bus: is the time penalty worth the qubit count reductions? We provide two examples where the qubit counts are convincingly reduced: 1) interaction of two surface code patches on NISQ machines with 28 and 68 qubits, and 2) very large-scale circuits with a structure similar to state-of-the-art quantum chemistry circuits. The data bus has the potential to transform all layers of the quantum computing stack (e.g., as envisioned by Google, IBM, Riggeti, Intel), because it simplifies quantum computation layouts, hardware architectures and introduces lower qubits counts at the expense of a reasonable time penalty.

Quantum computations are expressed in general as quantum circuits, which are specified by ordered lists of quantum gates. The resulting specifications are used during the optimisation and execution of the expressed computations. However, the specification format makes it difficult to verify that optimised or executed computations still conform to the initial gate list specifications: showing the computational equivalence between two quantum circuits expressed by different lists of quantum gates is exponentially complex in the worst case. In order to solve this issue, this work presents a derivation of the specification format tailored specifically for fault-tolerant quantum circuits. The circuits are considered a form consisting entirely of single qubit initialisations, CNOT gates and single qubit measurements (ICM form). This format allows, under certain assumptions, to efficiently verify optimised (or implemented) computations. Two verification methods based on checking stabiliser circuit structures are presented., Comment: 7 pages, 4 figures

Three new graph invariants are introduced which may be measured from a quantum graph state and form examples of a framework under which other graph invariants can be constructed. Each invariant is based on distinguishing a different number of qubits. This is done by applying alternate measurements to the qubits to be distinguished. The performance of these invariants is evaluated and compared to classical invariants. We verify that the invariants can distinguish all non-isomorphic graphs with 9 or fewer nodes. The invariants have also been applied to `classically hard' strongly regular graphs, successfully distinguishing all strongly regular graphs of up to 29 nodes, and preliminarily to weighted graphs. We have found that although it is possible to prepare states with a polynomial number of operations, the average number of preparations required to distinguish non-isomorphic graph states scales exponentially with the number of nodes. We have so far been unable to find operators which reliably compare graphs and reduce the required number of preparations to feasible levels., Comment: Comprehensive update including a study of scalability of algorithms. 12 pages, 7 figures

Lattice surgery is a method to perform quantum computation fault-tolerantly by using operations on boundary qubits between different patches of the planar code. This technique allows for universal planar-code computation without eliminating the intrinsic two-dimensional nearest-neighbor properties of the surface code that eases physical hardware implementations. Lattice-surgery approaches to algorithmic compilation and optimization have been demonstrated to be more resource efficient for resource-intensive components of a fault-tolerant algorithm, and consequently may be preferable over braid-based logic. Lattice surgery can be extended to the Raussendorf lattice, providing a measurement-based approach to the surface code. In this paper we describe how lattice surgery can be performed on the Raussendorf lattice and therefore give a viable alternative to computation using braiding in measurement based implementations of topological codes.

A recent proposal has shown that it is possible to perform linear-optics quantum computation using a ballistic generation of the lattice. Yet, due to the probabilistic generation of its cluster state, it is not possible to use the fault-tolerant Raussendorf lattice, which requires a lower failure rate during the entanglement-generation process. Previous work in this area showed proof-of-principle linear-optics quantum computation, while this paper presents an approach to it which is more practical, satisfying several key constraints. We develop a classical measurement scheme, that purifies a large faulty lattice to a smaller lattice with entanglement faults below threshold. A single application of this method can reduce the entanglement error rate to $7\%$ for an input failure rate of $25\%$. Thus, we can show that it is possible to achieve fault tolerance for ballistic methods.

Surface codes can protect quantum information stored in qubits from local errors as long as the per-operation error rate is below a certain threshold. Here we propose holonomic surface codes by harnessing the quantum holonomy of the system. In our scheme, the holonomic gates are built via auxiliary qubits rather than the auxiliary levels in multilevel systems used in conventional holonomic quantum computation. The key advantage of our approach is that the auxiliary qubits are in their ground state before and after each gate operation, so they are not involved in the operation cycles of surface codes. This provides an advantageous way to implement surface codes for fault-tolerant quantum computation., Comment: 14 pages, 6 figures

The traditional method for computation in either the surface code or in the Raussendorf model is the creation of holes or "defects" within the encoded lattice of qubits that are manipulated via topological braiding to enact logic gates. However, this is not the only way to achieve universal, fault-tolerant computation. In this work, we focus on the Lattice Surgery representation, which realizes transversal logic operations without destroying the intrinsic 2D nearest-neighbor properties of the braid-based surface code and achieves universality without defects and braid based logic. For both techniques there are open questions regarding the compilation and resource optimization of quantum circuits. Optimization in braid-based logic is proving to be difficult and the classical complexity associated with this problem has yet to be determined. In the context of lattice-surgery-based logic, we can introduce an optimality condition, which corresponds to a circuit with the lowest resource requirements in terms of physical qubits and computational time, and prove that the complexity of optimizing a quantum circuit in the lattice surgery model is NP-hard.

The task of programming a quantum computer is just as strange as quantum mechanics itself. But it now looks like a simple 3D puzzle may be the future tool of quantum software engineers., Comment: 10 Pages, 4 figures. Article for ACM-XRDS, Magazine for students. Fall Issue on Quantum Computing. Expanded Reference List

Quantum information processing is expressed using quantum bits (qubits) and quantum gates which are arranged in the terms of quantum circuits. Here, each qubit is associated to a quantum circuit wire which is used to conduct the desired operations. Most of the existing quantum circuits allocate a single quantum circuit wire for each qubit and, hence, introduce a significant overhead. In fact, qubits are usually not needed during the entire computation but only between their initialization and measurement. Before and after that, corresponding wires may be used by other qubits. In this work, we propose a solution which exploits this fact in order to optimize the design of quantum circuits with respect to the required wires. To this end, we introduce a representation of the lifetimes of all qubits which is used to analyze the respective need for wires. Based on this analysis, a method is proposed which "recycles" the available wires and, by this, reduces the size of the resulting circuit. Experimental evaluations based on established reversible and fault-tolerant quantum circuits confirm that the proposed solution reduces the amount of wires by more than 90% compared to unoptimized quantum circuits., Comment: 9 pages, 5 figures, 2 tables, minor changes. To Appear Phys. Rev. A. Software available at http://github.com/alexandrupaler/wirerecycle

In this paper we outline a method for a compiler to translate any non fault tolerant quantum circuit to the geometric representation of the lattice surgery error-correcting code using inherent merge and split operations. Since the efficiency of state distillation procedures has not yet been investigated in the lattice surgery model, their translation is given as an example using the proposed method. The resource requirements seem comparable to the defect-based state distillation process, but modularity and eventual implementability allow the lattice surgery model to be an interesting alternative to braiding., Comment: code repository: https://github.com/herr-d/LS_translation

The yield of physical qubits fabricated in the laboratory is much lower than that of classical transistors in production semiconductor fabrication. Actual implementations of quantum computers will be susceptible to loss in the form of physically faulty qubits. Though these physical faults must negatively affect the computation, we can deal with them by adapting error correction schemes. In this paper We have simulated statically placed single-fault lattices and lattices with randomly placed faults at functional qubit yields of 80%, 90% and 95%, showing practical performance of a defective surface code by employing actual circuit constructions and realistic errors on every gate, including identity gates. We extend Stace et al.'s superplaquettes solution against dynamic losses for the surface code to handle static losses such as physically faulty qubits. The single-fault analysis shows that a static loss at the periphery of the lattice has less negative effect than a static loss at the center. The randomly-faulty analysis shows that 95% yield is good enough to build a large scale quantum computer. The local gate error rate threshold is $\sim 0.3\%$, and a code distance of seven suppresses the residual error rate below the original error rate at $p=0.1\%$. 90% yield is also good enough when we discard badly fabricated quantum computation chips, while 80% yield does not show enough error suppression even when discarding 90% of the chips. We evaluated several metrics for predicting chip performance, and found that the average of the product of the number of data qubits and the cycle time of a stabilizer measurement of stabilizers gave the strongest correlation with post-correction residual error rates. Our analysis will help with selecting usable quantum computation chips from among the pool of all fabricated chips., Comment: 39 pages, 19 figures

Experimental groups are now fabricating quantum processors powerful enough to execute small instances of quantum algorithms and definitively demonstrate quantum error correction that extends the lifetime of quantum data, adding urgency to architectural investigations. Although other options continue to be explored, effort is coalescing around topological coding models as the most practical implementation option for error correction on realizable microarchitectures. Scalability concerns have also motivated architects to propose distributed memory multicomputer architectures, with experimental efforts demonstrating some of the basic building blocks to make such designs possible. We compile the latest results from a variety of different systems aiming at the construction of a scalable quantum computer., Comment: 30 pages, 4 figures, 143 references

Quantum computing technology has reached a second renaissance in the past five years. Increased interest from both the private and public sector combined with extraordinary theoretical and experimental progress has solidified this technology as a major advancement in the 21st century. As anticipated by many, the first realisation of quantum computing technology would occur over the cloud, with users logging onto dedicated hardware over the classical internet. Recently IBM has released the {\em Quantum Experience} which allows users to access a five qubit quantum processor. In this paper we take advantage of this online availability of actual quantum hardware and present four quantum information experiments that have never been demonstrated before. We utilise the IBM chip to realise protocols in Quantum Error Correction, Quantum Arithmetic, Quantum graph theory and Fault-tolerant quantum computation, by accessing the device remotely through the cloud. While the results are subject to significant noise, the correct results are returned from the chip. This demonstrates the power of experimental groups opening up their technology to a wider audience and will hopefully allow for the next stage development in quantum information technology., Comment: 11 Pages, 18 Figures (many more in Supp Material), Comments Welcome. To appear, Phys. Rev. A. (final version)

Given a quantum algorithm, it is highly nontrivial to devise an efficient sequence of physical gates implementing the algorithm on real hardware and incorporating topological quantum error correction. In this paper, we present a first step towards this goal, focusing on generating correct and simple arrangements of topological structures that correspond to a given quantum circuit and largely neglecting their efficiency. We detail the many challenges that will need to be tackled in the pursuit of efficiency. The software source code can be consulted at https://github.com/alexandrupaler/tqec., Comment: 24 pages, 28 figures

We present a quantum circuit representation consisting entirely of qubit initialisations (I), a network of controlled-NOT gates (C) and measurements with respect to different bases (M). The ICM representation is useful for optimisation of quantum circuits that include teleportation, which is required for fault-tolerant, error corrected quantum computation. The non-deterministic nature of teleportation necessitates the conditional introduction of corrective quantum gates and additional ancillae during circuit execution. Therefore, the standard optimisation objectives, gate count and number of wires, are not well-defined for general teleportation-based circuits. The transformation of a circuit into the ICM representation provides a canonical form for an exact fault-tolerant, error corrected circuit needed for optimisation prior to the final implementation in a realistic hardware model., Comment: Shorter Computer Science focused version of arXiv:1509.02004

Fault-tolerant quantum error correction is a necessity for any quantum architecture destined to tackle interesting, large-scale problems. Its theoretical formalism has been well founded for nearly two decades. However, we still do not have an appropriate compiler to produce a fault-tolerant, error corrected description from a higher level quantum circuit for state of the art hardware models. There are many technical hurdles, including dynamic circuit constructions that occur when constructing fault-tolerant circuits with commonly used error correcting codes. We introduce a package that converts high level quantum circuits consisting of commonly used gates into a form employing all decompositions and ancillary protocols needed for fault-tolerant error correction. We call this form the (I)initialisation, (C)NOT, (M)measurement form (ICM) and consists of an initialisation layer of qubits into one of four distinct states, a massive, deterministic array of CNOT operations and a series of time ordered $X$- or $Z$-basis measurements. The form allows a more flexbile approach towards circuit optimisation. At the same time, the package outputs a standard circuit or a canonical geometric description which is a necessity for operating current state-of-the-art hardware architectures using topological quantum codes., Comment: 17 pages, 17 figures, comments welcome. The compiler source code is released under the Microsoft Reference Source License (Ms-RSL, http://referencesource.microsoft.com/ license.html) at http://www.teqcnique.com/icmconvert

In this paper we provide a basic introduction of the core ideas and theories surrounding fault-tolerant quantum computation. These concepts underly the theoretical framework of large-scale quantum computation and communications and are the driving force for many recent experimental efforts to construct small to medium sized arrays of controllable quantum bits. We examine the basic principals of redundant quantum encoding, required to protect quantum bits from errors generated from both imprecise control and environmental interactions and then examine the principals of fault-tolerance from largely a classical framework. As quantum fault-tolerance essentially is avoiding the uncontrollable cascade of errors caused by the interaction of quantum-bits, these concepts can be directly mapped to quantum information., Comment: Intro to fault-tolerant quantum computing from the perspective of the classical community, 7 pages

Networked entanglement is an essential component for a plethora of quantum computation and communication protocols. Direct transmission of quantum signals over long distances is prevented by fibre attenuation and the no-cloning theorem, motivating the development of quantum repeaters, designed to purify entanglement, extending its range. Quantum repeaters have been demonstrated over short distances, but error-corrected, global repeater networks with high bandwidth require new technology. Here we show that error corrected quantum memories installed in cargo containers and carried by ship can provide a flexible connection between local networks, enabling low-latency, high-fidelity quantum communication across global distances at higher bandwidths than previously proposed. With demonstrations of technology with sufficient fidelity to enable topological error-correction, implementation of the quantum memories is within reach, and bandwidth increases with improvements in fabrication. Our approach to quantum networking avoids technological restrictions of repeater deployment, providing an alternate path to a worldwide Quantum Internet., Comment: 7 Pages, 2 Figures 1 Table. Comments Welcome. Final Version, to Appear Sci. Rep

Quantum computing promises a new approach to solving difficult computational problems, and the quest of building a quantum computer has started. While the first attempts on construction were succesful, scalability has never been achieved, due to the inherent fragile nature of the quantum bits (qubits). From the multitude of approaches to achieve scalability topological quantum computing (TQC) is the most promising one, by being based on an flexible approach to error-correction and making use of the straightforward measurement-based computing technique. TQC circuits are defined within a large, uniform, 3-dimensional lattice of physical qubits produced by the hardware and the physical volume of this lattice directly relates to the resources required for computation. Circuit optimization may result in non-intuitive mismatches between circuit specification and implementation. In this paper we introduce the first method for cross-level validation of TQC circuits. The specification of the circuit is expressed based on the stabilizer formalism, and the stabilizer table is checked by mapping the topology on the physical qubit level, followed by quantum circuit simulation. Simulation results show that cross-level validation of error-corrected circuits is feasible., Comment: 12 Pages, 5 Figures. Comments Welcome. RC2014, Springer Lecture Notes on Computer Science (LNCS) 8507, pp. 189-200. Springer International Publishing, Switzerland (2014), Y. Shigeru and M.Shin-ichi (Eds.)

The accelerated development of quantum technology has reached a pivotal point. Early in 2014, several results were published demonstrating that several experimental technologies are now accurate enough to satisfy the requirements of fault-tolerant, error corrected quantum computation. While there are many technological and experimental issues that still need to be solved, the ability of experimental systems to now have error rates low enough to satisfy the fault-tolerant threshold for several error correction models is a tremendous milestone. Consequently, it is now a good time for the computer science and classical engineering community to examine the {\em classical} problems associated with compiling quantum algorithms and implementing them on future quantum hardware. In this paper, we will review the basic operational rules of a topological quantum computing architecture and outline one of the most important classical problems that need to be solved; the decoding of error correction data for a large-scale quantum computer. We will endeavour to present these problems independently from the underlying physics as much of this work can be effectively solved by non-experts in quantum information or quantum mechanics., Comment: 14 Pages, 7 Figures, Invited paper for Springer Lecture Notes on Computer Science

Topological quantum computation is a promising technique to achieve large-scale, error-corrected computation. Quantum hardware is used to create a large, 3-dimensional lattice of entangled qubits while performing computation requires strategic measurement in accordance with a topological circuit specification. The specification is a geometric structure that defines encoded information and fault-tolerant operations. The compilation of a topological circuit is one important aspect of programming a quantum computer, another is the mapping of the topological circuit into the operations performed by the hardware. Each qubit has to be controlled, and measurement results are needed to propagate encoded quantum information from input to output. In this work, we introduce an algorithm for mapping an topological circuit to the operations needed by the physical hardware. We determine the control commands for each qubit in the computer and the relevant measurements that are needed to track information as it moves through the circuit., Comment: 16 Pages, 8 Figures, to Appear Sci. Rep

The realisation of large-scale quantum computing is no longer simply a hardware question. The rapid development of quantum technology has resulted in dozens of control and programming problems that should be directed towards the classical computer science and engineering community. One such problem is known as Pauli tracking. Methods for implementing quantum algorithms that are compatible with crucial error correction technology utilise extensive quantum teleportation protocols. These protocols are intrinsically probabilistic and result in correction operators that occur as byproducts of teleportation. These byproduct operators do not need to be corrected in the quantum hardware itself. Instead, byproduct operators are tracked through the circuit and output results reinterpreted. This tracking is routinely ignored in quantum information as it is assumed that tracking algorithms will eventually be developed. In this work we help fill this gap and present an algorithm for tracking byproduct operators through a quantum computation. We formulate this work based on quantum gate sets that are compatible with all major forms of quantum error correction and demonstrate the completeness of the algorithm., Comment: 5 Pages, 1 figure, Accepted for Design, Automation and Test In Europe (DATE'2014)

Physics and information are intimately connected, and the ultimate information processing devices will be those that harness the principles of quantum mechanics. Many physical systems have been identified as candidates for quantum information processing, but none of them are immune from errors. The challenge remains to find a path from the experiments of today to a reliable and scalable quantum computer. Here, we develop an architecture based on a simple module comprising an optical cavity containing a single negatively-charged nitrogen vacancy centre in diamond. Modules are connected by photons propagating in a fiber-optical network and collectively used to generate a topological cluster state, a robust substrate for quantum information processing. In principle, all processes in the architecture can be deterministic, but current limitations lead to processes that are probabilistic but heralded. We find that the architecture enables large-scale quantum information processing with existing technology., Comment: 24 pages, 14 Figures. Comment welcome

Topological quantum computing has recently proven itself to be a very powerful model when considering large- scale, fully error corrected quantum architectures. In addition to its robust nature under hardware errors, it is a software driven method of error corrected computation, with the hardware responsible for only creating a generic quantum resource (the topological lattice). Computation in this scheme is achieved by the geometric manipulation of holes (defects) within the lattice. Interactions between logical qubits (quantum gate operations) are implemented by using particular arrangements of the defects, such as braids and junctions. We demonstrate that junction-based topological quantum gates allow highly regular and structured implementation of large CNOT (controlled-not) gate networks, which ultimately form the basis of the error corrected primitives that must be used for an error corrected algorithm. We present a number of heuristics to optimise the area of the resulting structures and therefore the number of the required hardware resources., Comment: 7 Pages, 10 Figures, 1 Table

State distillation is the process of taking a number of imperfect copies of a particular quantum state and producing fewer better copies. Until recently, the lowest overhead method of distilling states |A>=(|0>+e^{i\pi/4}|1>)/\sqrt{2} produced a single improved |A> state given 15 input copies. New block code state distillation methods can produce k improved |A> states given 3k+8 input copies, potentially significantly reducing the overhead associated with state distillation. We construct an explicit surface code implementation of block code state distillation and quantitatively compare the overhead of this approach to the old. We find that, using the best available techniques, for parameters of practical interest, block code state distillation does not always lead to lower overhead, and, when it does, the overhead reduction is typically less than a factor of three., Comment: 26 pages, 28 figures

Quantum information processing and its associated technologies has reached an interesting and timely stage in their development where many different experiments have been performed establishing the basic building blocks. The challenge moving forward is to scale up to larger sized quantum machines capable of performing tasks not possible today. This raises a number of interesting questions like: How big will these machines need to be? how many resources will they consume? This needs to be urgently addressed. Here we estimate the resources required to execute Shor's factoring algorithm on a distributed atom-optics quantum computer architecture. We determine the runtime and requisite size of the quantum computer as a function of the problem size and physical error rate. Our results suggest that once experimental accuracy reaches levels below the fault-tolerant threshold, further optimisation of computational performance and resources is largely an issue of how the algorithm and circuits are implemented, rather than the physical quantum hardware, Comment: 18 Pages, 17 Figs. Comments Welcome

Topological quantum computing has recently proven itself to be a powerful computational model when constructing viable architectures for large scale computation. The topological model is constructed from the foundation of a error correction code, required to correct for inevitable hardware faults that will exist for a large scale quantum device. It is also a measurement based model of quantum computation, meaning that the quantum hardware is responsible only for the construction of a large, computationally universal quantum state. This quantum state is then strategically consumed, allowing for the realisation of a fully error corrected quantum algorithm. The number of physical qubits needed by the quantum hardware and the amount of time required to implement an algorithm is dictated by the manner in which this universal quantum state is consumed. In this paper we examine the problem of algorithmic optimisation in the topological lattice and introduce the required elements that will be needed when designing a classical software package to compile and implement a large scale algorithm on a topological quantum computer., Comment: 6 Pages, 9 Figures, Accepted Proc. 21st Asian Test Symposium (ATS'12), Niigata, Japan (2012)

Two primary challenges stand in the way of practical large-scale quantum computation, namely achieving sufficiently low error rate quantum gates and implementing interesting quantum algorithms with a physically reasonable number of qubits. In this work we address the second challenge, presenting a new technique, bridge compression, which enables remarkably low volume structures to be found that implement complex computations in the surface code. The surface code has a number of highly desirable properties, including the ability to achieve arbitrarily reliable computation given sufficient qubits and quantum gate error rates below approximately 1%, and the use of only a 2-D array of qubits with nearest neighbor interactions. As such, our compression technique is of great practical relevance., Comment: 17 pages, 71 figures, formal proof of methodology added

In this paper we introduce a design for an optical topological cluster state computer constructed exclusively from a single quantum component. Unlike previous efforts we eliminate the need for on demand, high fidelity photon sources and detectors and replace them with the same device utilised to create photon/photon entanglement. This introduces highly probabilistic elements into the optical architecture while maintaining complete specificity of the structure and operation for a large scale computer. Photons in this system are continually recycled back into the preparation network, allowing for a arbitrarily deep 3D cluster to be prepared using a comparatively small number of photonic qubits and consequently the elimination of high frequency, deterministic photon sources., Comment: 19 pages, 13 Figs (2 Appendices with additional Figs.). Comments welcome

Dedicated research into the design and construction of a large scale Quantum Information Processing (QIP) system is a complicated task. The design of an experimentally feasible quantum processor must draw upon results in multiple fields; from experimental efforts in system control and fabrication through to far more abstract areas such as quantum algorithms and error correction. Recently, the adaptation of topological coding models to physical systems in optics has illustrated a possible long term pathway to truly large scale QIP. As the topological model has well defined protocols for Quantum Error Correction (QEC) built in as part of its construction, a more grounded analysis of the {\em classical} processing requirements is possible. In this paper we analyze the requirements for a classical processing system, designed specifically for the topological cluster state model. We demonstrate that via extensive parallelization, the construction of a classical "front-end" system capable of processing error correction data for a large topological computer is possible today., Comment: 14 Pages, 14 Figures (Revised version in response to referee comments)

Quantum error correction (QEC) and fault-tolerant quantum computation represent one of the most vital theoretical aspect of quantum information processing. It was well known from the early developments of this exciting field that the fragility of coherent quantum systems would be a catastrophic obstacle to the development of large scale quantum computers. The introduction of quantum error correction in 1995 showed that active techniques could be employed to mitigate this fatal problem. However, quantum error correction and fault-tolerant computation is now a much larger field and many new codes, techniques, and methodologies have been developed to implement error correction for large scale quantum algorithms. In response, we have attempted to summarize the basic aspects of quantum error correction and fault-tolerance, not as a detailed guide, but rather as a basic introduction. This development in this area has been so pronounced that many in the field of quantum information, specifically researchers who are new to quantum information or people focused on the many other important issues in quantum computation, have found it difficult to keep up with the general formalisms and methodologies employed in this area. Rather than introducing these concepts from a rigorous mathematical and computer science framework, we instead examine error correction and fault-tolerance largely through detailed examples, which are more relevant to experimentalists today and in the near future., Comment: 35 pages, 25 Figures, Published version

The architecture scalability afforded by recent proposals of a large scale photonic based quantum computer, utilizing the theoretical developments of topological cluster states and the photonic chip, allows us to move on to a discussion of massively scaled Quantum Information Processing (QIP). In this letter we introduce the model for a secure and unsecured topological cluster mainframe. We consider the quantum analogue of High Performance Computing, where a dedicated server farm is utilized by many users to run algorithms and share quantum data. The scaling structure of photonics based topological cluster computing leads to an attractive future for server based QIP, where dedicated mainframes can be constructed and/or expanded to serve an increasingly hungry user base with the ideal resource for individual quantum information processing., Comment: 4 Pages, 2 Figures (figures are a little low-res due to arXiv file size limits)

The development of a large scale quantum computer is a highly sought after goal of fundamental research and consequently a highly non-trivial problem. Scalability in quantum information processing is not just a problem of qubit manufacturing and control but it crucially depends on the ability to adapt advanced techniques in quantum information theory, such as error correction, to the experimental restrictions of assembling qubit arrays into the millions. In this paper we introduce a feasible architectural design for large scale quantum computation in optical systems. We combine the recent developments in topological cluster state computation with the photonic module, a simple chip based device which can be used as a fundamental building block for a large scale computer. The integration of the topological cluster model with this comparatively simple operational element addresses many significant issues in scalable computing and leads to a promising modular architecture with complete integration of active error correction exhibiting high fault-tolerant thresholds., Comment: 14 Pages, 8 Figures, changes to the main text, new appendix added

Photonic entanglement has a wide range of applications in quantum computation and communication. Here we introduce a new device: the "photonic module", which allows for the rapid, deterministic preparation of a large class of entangled photon states. The module is an application independent, "plug and play" device, with sufficient flexibility to prepare entanglement for all major quantum computation and communication applications in a completely deterministic fashion without number-discriminated photon detection. We present two alternative constructions for the module, one using free-space components and one in a photonic bandgap structures. The natural operation of the module is to generate states within the stabilizer formalism and we present an analysis on the cavity-QED requirements to experimentally realize this device., Comment: 8 pages, 2 figures, revised version. Simplified design for the module in both free-space and photonic crystals, new co-authors added. Accepted in PRA

The basic operating element of standard quantum computation is the qubit, an isolated two-level system that can be accurately controlled, initialized and measured. However, the majority of proposed physical architectures for quantum computation are built from systems that contain much more complicated Hilbert space structures. Hence, defining a qubit requires the identification of an appropriate controllable two-dimensional sub-system. This prompts the obvious question of how well a qubit, thus defined, is confined to this subspace, and whether we can experimentally quantify the potential leakage into to states outside the qubit subspace. In this paper we demonstrate that subspace leakage can be quantitatively characterized using minimal theoretical assumptions by examining the Fourier spectrum of the Rabi oscillation experiment., Comment: 13 pages, 11 figures, accepted for publication in New Journal of Physics

A major challenge for quantum computation in ion trap systems is scalable integration of error correction and fault tolerance. We analyze a distributed architecture with rapid high fidelity local control within nodes and entangled links between nodes alleviating long-distance transport. We demonstrate fault-tolerant operator measurements which are used for error correction and non-local gates. This scheme is readily applied to linear ion traps which cannot be scaled up beyond a few ions per individual trap but which have access to a probabilistic entanglement mechanism. A proof-of-concept system is presented which is within the reach of current experiment., Comment: 8 pages, 6 figures