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3. Device engineering guidelines for performance boost in IGZO front gated TFTs based on defect control

5. Ultra-low Leakage IGZO-TFTs with Raised Source/Drain for Vt > 0 V and Ion > 30 µA/µm

6. Social Cohesion and Integration: Learning Active Citizenship

7. Timely Graduation in the Lower Vocational Track

8. Mathematics and Language Skills and the Choice of Science Subjects in Secondary Education

9. Understanding and modelling the PBTI reliability of thin-film IGZO transistors

10. Tailoring IGZO-TFT architecture for capacitorless DRAM, demonstrating > 103s retention, >1011 cycles endurance and Lg scalability down to 14nm

11. Properties of ALD TaxNy films as a barrier to aluminum in work function metal stacks.

13. Capacitor-less, Long-Retention (>400s) DRAM Cell Paving the Way towards Low-Power and High-Density Monolithic 3D DRAM

16. Record GmSAT/SSSAT and PBTI Reliability in Si-Passivated Ge nFinFETs by Improved Gate-Stack Surface Preparation

18. IGZO Integration Scheme For Enabling IGZO nFETs

20. Vertically Stacked Gate-All-Around Si Nanowire CMOS Transistors with Reduced Vertical Nanowires Separation, New Work Function Metal Gate Solutions, and DC/AC Performance Optimization

22. Metal gate work function tuning by Al incorporation in TiN.

25. An In-depth Study of High-Performing Strained Germanium Nanowires pFETs

26. Optical properties and local bonding configurations of hydrogenated amorphous silicon nitride thin films.

28. Performance and electrostatic improvement by high-pressure anneal on Si-passivated strained Ge pFinFET and gate all around devices with superior NBTI reliability

29. In Depth Analysis of 3D NAND Enablers in Gate Stack Integration and Demonstration in 3D Devices

30. Vertically stacked gate-all-around Si nanowire CMOS transistors with dual work function metal gates

31. Highly scalable bulk FinFET Devices with Multi-VT options by conductive metal gate stack tuning for the 10-nm node and beyond

32. Whitepaper: Project-based curricula

34. Gate-all-around MOSFETs based on vertically stacked horizontal Si nanowires in a replacement metal gate process on bulk Si substrates

38. Gate-all-around NWFETs vs. triple-gate FinFETs: Junctionless vs. extensionless and conventional junction devices with controlled EWF modulation for multi-VT CMOS

39. RMG nMOS 1st process enabling 10x lower gate resistivity in N7 bulk FinFETs

42. Verklaringen voor het seksespecifieke studierendement op de pabo

43. Fluorinated Greenhouse Gases in Photovoltaic Module Manufacturing: Potential Emissions and Abatement Strategies

45. Gender-related Differences in Student Achievements in Primary Teacher Education

48. Ganzen en zwanen; arctische trekvogels bij boeren te gast

49. Highly scalable bulk FinFET Devices with Multi-VT options by conductive metal gate stack tuning for the 10-nm node and beyond

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