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Processing requirements are exponentially increasing to keep pace with the data volumes generated by increasingly “Big Data” sensors. These requirements are compounded when factoring in the data movements planned for future spacecraft constellation mesh networks, i.e. connected spacecraft infrastructures for on-orbit fleet management, autonomous sensor fusion, data storage, very low latency actionable information generation, and real-time communication. Unibap AB and Troxel Aerospace Industries, Inc. have worked together to develop a heterogeneous radiation-tolerant onboard cloud computing hardware platform bringing terrestrial Internet-of-Things edge processing to space, e.g. Infrastructure as a Service, Big Data analytics and Artificial Intelligence. This platform is part of Unibap’s SpaceCloud ecosystem, which makes virtual servers and other resources dynamically available to customers. Leveraging its powerful heterogeneous hardware platform, the SpaceCloud framework has been developed with support by the European Space Agency (ESA) to enable rapid and flexible application development using containerized and isolated virtualization either for execution locally or on networked spacecraft. SpaceCloud allows exchange of information that is transparent between local or networked nodes to facilitate cooperation using a distributed mesh network communication architecture. A node is any entity or subfunction, such as an application, or a vehicle, ground control station, sensor read-out module, cloud detection application, data base indexing etc., that is connected to the mesh network. Data exchanges may include intra-data processing between different software apps in a pipeline, or telemetry from on-orbit robotics-based nodes, commands from ground control nodes, science data fusion, etc. By exchanging pertinent data, nodes can act together to perform a task autonomously without requiring direct control or intervention by a central control node. The focus of SpaceCloud is to enable commercial software to be reused onboard to decrease the overall cost and development time to deploy new capabilities on compatible space assets. As an example, SaraniaSat and Unibap have worked with L3Harris Geospatial to enable the geospatial intelligence software suite ENVI®/IDL® on SpaceCloud. A very low-latency onboard SpaceCloud application for detecting aircraft using ENVI®/IDL® and machine learning within 100 sq. km multispectral satellite imagery has been successfully developed and demonstrated. The SpaceCloud framework executes on the iX5 and iX10 families of x86 radiation tolerant computer solutions featuring AMD multi-core CPU, GPU, Microsemi FPGA, and Intel Movidius Myriad X VPU accelerator and local high-speed solid-state storage. Radiation testing in the US has shown very promising results on both 28 nm and 14 nm processor nodes with high tolerance for single event latch-up (SEL) and total ionizing dose (TID). To improve radiation tolerance, the SpaceCloud framework performs real-time software monitoring and FDIR through the SafetyChip feature working in tandem on the x86 software stack and an RTOS in a fault-tolerant configuration in FPGA. The concept has been developed with funding support from ESA. Radiation tolerance can be further increased by use of a single event upset (SEU) mitigating middleware that protects CPU and GPU processing. This paper presents the SpaceCloud In-orbit Demonstration compute architecture and framework configuration as implemented in D-Orbit’s Wild Ride ION SCV mission due for launch in Q2 2021.

Over the last years there has been an accelerated increase in the requirements for On-Board Processing (OBP) for satellite on-board systems. These requirements include higher instrument data rates and the introduction of new techniques such as on-board machine learning inference (OBMLI). Outside of a demand for increased computational performance, the need for in-flight re-configurability, as well as shortening development time and cost are increasingly driving the selection of processors and FPGAs in the design of on-board systems. To address these needs, several COTS processor and FPGA devices have been proposed for the use in space applications. While providing superior performance compared to devices specifically designed for radiation environment, the qualification status and lack of openly available radiation data may be prohibitive for the use of COTS devices in certain applications. In this work, a survey of both COTS and RHBD devices supporting high-performance OBP that are currently used or have been proposed to be used in future missions are presented. The survey presented includes device parameters such as the relative performance, qualification status and the availability of radiation test results. Devices included in the survey are: FPGAs, MPSoCs, multicore processors, manycore processors, GPUs, dedicated AI/ML accelerators, etc. Finally, an overview of the availability of machine learning tools for the listed devices is also presented. It is shown that several available devices targeting space applications, offer their users tools for the development and deployment of machine learning algorithms. The work has been carried out partially internally at ESA, and through the on-going TRP activity "FOPIEA" (Future On-board Processing Information Extraction Algorithms). The goal is to have a tentative list of devices that can be used in future ESA missions for IOD purposes. Part of the work has already been provided as input for the ESA COTS initiative working group.

Embedded GPUs have been identified from both private and government space agencies as promising hardware technologies to satisfy the increased needs of payload processing. The GPU4S (GPU for Space) project funded from the European Space Agency (ESA) has explored in detail the feasibility and the benefit of using them for space workloads. Currently at the closing phases of the project, in this paper we describe the main project outcomes and explain the lessons we learnt. In addition, we provide some guidelines for the next steps towards their adoption in space. This work is funded by ESA under the GPU4S (GPU for Space) project (ITT AO/1-9010/17/NL/AF). It is also partially supported by the Spanish Ministry of Economy and Competitiveness (MINECO) under grants PID2019-107255GB and FJCI-2017-34095 and HiPEAC.

The detector readout for the Radiation-hard Electron Monitor (RADEM) aboard the JUpiter ICy moons Explorer (JUICE) uses a custom-made application-specific integrated circuit (ASIC, model: IDE3466) for the charge signal readout from silicon radiation sensors. RADEM measures the total ionizing dose and dose rate for protons (5 MeV to 250 MeV), electrons (0.3 MeV to 40 MeV) and ions. RADEM has in total three chips of the same design: one chip for the proton and ion detector, one for the electron detector, and one for the directional detector. The ASIC has 36 chargesensitive pre-amplifiers (CSA), 36 counters of 22-bits each, and one analogue output for multiplexing the pulse heights from all channels. The counters count pulses from charged particles in the silicon sensors depending on the charge magnitude and the coincidence trigger pattern from the 36 channels. We have designed the ASIC in 0.35-μm CMOS process and an ASIC wafer lot has been manufactured at AMS. This article presents the ASIC design specifications and design validation results. The preliminary results from tests with bare chips indicate that the design meets the technical requirements.

This work is a continuation of our preliminary tests on NIRCA - the Near Infrared Readout and Controller ASIC [1]. The primary application for NIRCA is future astronomical science and Earth observation missions where NIRCA will be used with mercury cadmium telluride image sensors (HgCdTe, or MCT) [2], [3]. Recently we have completed the ASIC tests in the cryogenic environment down to 77 K. We have verified that NIRCA provides to the readout integrated circuit (ROIC) regulated power, bias voltages, and fully programmable digital sequences with sample control of the analogue to digital converters (ADC). Both analog and digital output from the ROIC can be acquired and image data is 8b/10bencoded and delivered via serial interface. The NIRCA also provides temperature measurement, and monitors several analog and digital input channels. The preliminary work confirms that NIRCA is latch-up immune and able to operate down to 77 K. We have tested the performance of the 12-bit ADC with pre-amplifier to have 10.8 equivalent number of bits (ENOB) at 1.4 Msps and maximum sampling speed at 2 Msps. The 1.8-V and 3.3-V output regulators and the 10-bit DACs show good linearity and work as expected. A programmable sequencer is implemented as a micro-controller with a custom instruction set. Here we describe the special operations of the sequencer with regards to the applications and a novel approach to parallel real-time hardware outputs. The test results of the working prototype ASIC show good functionality and performance from room temperature down to 77 K. The versatility of the chip makes the architecture a possible candidate for other research areas, defense or industrial applications that require analog and digital acquisition, voltage regulation, and digital signal generation.

In this paper we present initial test results of the Near Infrared Readout and Controller ASIC (NIRCA), designed for large area image sensors under contract from the European Space Agency (ESA) and the Norwegian Space Center. The ASIC is designed to read out image sensors based on mercury cadmium telluride (HgCdTe, or MCT) operating down to 77 K. IDEAS has developed, designed and initiated testing of NIRCA with promising results, showing complete functionality of all ASIC sub-components. The ASIC generates programmable digital signals to clock out the contents of an image array and to amplify, digitize and transfer the resulting pixel charge. The digital signals can be programmed into the ASIC during run-time and allows for windowing and custom readout schemes. The clocked out voltages are amplified by programmable gain amplifiers and digitized by 12-bit, 3-Msps successive approximation register (SAR) analogue-to-digital converters (ADC). Digitized data is encoded using 8-bit to 10-bit encoding and transferred over LVDS to the readout system. The ASIC will give European researchers access to high spectral sensitivity, very low noise and radiation hardened readout electronics for astronomy and Earth observation missions operating at 77 K and room temperature. The versatility of the chip makes the architecture a possible candidate for other research areas, or defense or industrial applications that require analog and digital acquisition, voltage regulation, and digital signal generation.

The Atmospheric Drag, Occultation ‘N’ Ionospheric Scintillation mission (ADONIS) studies the dynamics of the terrestrial thermosphere and ionosphere in dependency of solar events over a full solar cycle in Low Earth Orbit (LEO). The objectives are to investigate satellite drag with in-situ measurements and the ionospheric electron density profiles with radio occultation and scintillation measurements. A constellation of two satellites provides the possibility to gain near real-time data (NRT) about ionospheric conditions over the Arctic region where current coverage is insufficient. The mission shall also provide global high-resolution data to improve assimilative ionospheric models. The low-cost constellation can be launched using a single Vega rocket and most of the instruments are already space-proven allowing for rapid development and good reliability. From July 16 to 25, 2013, the Alpbach Summer School 2013 was organised by the Austrian Research Promotion Agency (FFG), the European Space Agency (ESA), the International Space Science Institute (ISSI) and the association of Austrian space industries Austrospace in Alpbach, Austria. During the workshop, four teams of 15 students each independently developed four different space mission proposals on the topic of “Space Weather: Science, Missions and Systems”, supported by a team of tutors. The present work is based on the mission proposal that resulted from one of these teams’ efforts. publishedVersion

Following the same trend of automotive and avionics, the space domain is witnessing an increase in the on-board computing performance demands. This raise in performance needs comes from both control and payload parts of the spacecraft and calls for advanced electronics able to provide high computational power under the constraints of the harsh space environment. On the non-technical side, for strategic reasons it is mandatory to get European independence on the used computing technology. In this project, which is still in its early phases, we study the applicability of embedded GPUs in space, which have shown a dramatic improvement of their performance per-watt ratio coming from their proliferation in consumer markets based on competitive European technology. To that end, we perform an analysis of the existing space application domains to identify which software domains can benefit from their use. Moreover, we survey the embedded GPU domain in order to assess whether embedded GPUs can provide the required computational power and identify the challenges which need to be addressed for their adoption in space. In this paper, we describe the steps to be followed in the project, as well as the results of our preliminary analyses in the first months of the project. This work has received funding from the the European Space Agency (ESA) under the GPU4S (GPU for Space) Project, answer to the ESA ITT AO/1-9010/17/NL/AF tenderwith title ”Low Power GPU Solutions For High Performance On-Board Data Processing” and from the European Research Council (ERC) under the European Union’s Horizon 2020 research and innovation programme (grant agreement No. 772773). This work has also been partially supported by the Spanish Ministry of Economy and Competitiveness (MINECO) under grant TIN2015-65316-P and the HiPEAC Network of Excellence. MINECO partially supported Leonidas Kosmidis under Juan de la Cierva Formación postdoctoral fellowship (FJCI-2017-34095) and Jaume Abella under Ramon y Cajal postdoctoral fellowship (RYC-2013-14717).