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Software-Defined Networking (SDN), with segregated data and control planes, provides faster data routing, stability, and enhanced quality metrics, such as throughput (Th), maximum available bandwidth (Bd(max)), data transfer (DTransfer), and reduction in end-to-end delay (D(E-E)). This paper explores the critical work of deploying SDN in large-scale Data Center Networks (DCNs) to enhance its Quality of Service (QoS) parameters, using logically distributed control configurations. There is a noticeable increase in Delay(E-E) when adopting SDN with a unified (single) control structure in big DCNs to handle Hypertext Transfer Protocol (HTTP) requests causing a reduction in network quality parameters (Bd(max), Th, DTransfer, D(E-E), etc.). This article examines the network performance in terms of quality matrices (bandwidth, throughput, data transfer, etc.), by establishing a large–scale SDN-based virtual network in the Mininet environment. The SDN network is simulated in three stages: (1) An SDN network with unitary controller-POX to manage the data traffic flow of the network without the server load management algorithm. (2) An SDN network with only one controller to manage the data traffic flow of the network with a server load management algorithm. (3) Deployment of SDN in proposed control arrangement (logically distributed controlled framework) with multiple controllers managing data traffic flow under the proposed Intelligent Sensing Server Load Management (ISSLM) algorithm. As a result of this approach, the network quality parameters in large-scale networks are enhanced. [ABSTRACT FROM AUTHOR]

With the rapid deployment of intelligent transportation systems in real-life applications, both dedicated short-range communications (DSRC) and cellular Vehicle-to-Everything (C-V2X), utilized to enable V2X communication, are undergoing extensive development to meet the quality of service (QoS) demands of advanced vehicular applications and scenarios. Compared to C-V2X, which lacks fully validated effective reliability, DSRC has undergone extensive field testing worldwide, ensuring its practicality. IEEE 802.11bd, as the next-generation V2X (NGV) standard within DSRC, is expected to greatly exceed the performance of its predecessor, 802.11p. However, existing studies mention that the ambient traffic environment will influence the performance of V2X due to the cyber-physical properties of V2X. To fully assess the advancements of NGV, this study presents a comparative analysis of IEEE 802.11bd and IEEE 802.11p, focusing on dynamic traffic conditions. Specifically, the technical advancements of the IEEE 802.11bd standard are first theoretically examined, emphasizing significant enhancements in aspects like modulation and coding schemes, coding rates, and channel coding. Subsequently, these critical technical enhancements are implemented in Veins, a simulation framework for the Internet of Vehicles (IoV), encompassing large-scale dynamic traffic scenarios. The simulation results indicate that the IEEE 802.11bd standard significantly enhances the data transfer rate compared to IEEE 802.11p, achieving a stable twofold increase. Furthermore, the data transmission latency is reduced by over half compared to IEEE 802.11p, while the data transmission reliability experiences a noteworthy 20% enhancement. Notably, the enhanced data transmission mode of the IEEE 802.11bd standard requires an increased signal-to-noise ratio (SNR). Additionally, this research evaluates the data dissemination properties in the IoV and finds that the traffic volume has a limited impact on the data propagation speed. [ABSTRACT FROM AUTHOR]

In the modern era, with the emergence of the Internet of Things (IoT), big data applications, cloud computing, and the ever-increasing demand for high-speed internet with the aid of upgraded telecom network resources, users now require virtualization of the network for smart handling of modern-day challenges to obtain better services (in terms of security, reliability, scalability, etc.). These requirements can be fulfilled by using software-defined networking (SDN). This research article emphasizes one of the major aspects of the practical implementation of SDN to enhance the QoS of a virtual network through the load management of network servers. In an SDN-based network, several servers are available to fulfill users' hypertext transfer protocol (HTTP) requests to ensure dynamic routing under the influence of the SDN controller. However, if the number of requests is directed to a specific server, the controller is bound to follow the user-programmed instructions, and the load on that server is increased, which results in (a) an increase in end-to-end user delay, (b) a decrease in the data transfer rate, and (c) a decrease in the available bandwidth of the targeted server. All of the above-mentioned factors will result in the degradation of network QoS. With the implementation of the proposed algorithm, dynamic active sensing server load management (DASLM), on the SDN controller, the load on the server is shared based on QoS control parameters (throughput, response time, round trip time, etc.). The overall delay is reduced, and the bandwidth utilization along with throughput is also increased. [ABSTRACT FROM AUTHOR]

With the rapid deployment of intelligent transportation systems in real-life applications, both dedicated short-range communications (DSRC) and cellular Vehicle-to-Everything (C-V2X), utilized to enable V2X communication, are undergoing extensive development to meet the quality of service (QoS) demands of advanced vehicular applications and scenarios. Compared to C-V2X, which lacks fully validated effective reliability, DSRC has undergone extensive field testing worldwide, ensuring its practicality. IEEE 802.11bd, as the next-generation V2X (NGV) standard within DSRC, is expected to greatly exceed the performance of its predecessor, 802.11p. However, existing studies mention that the ambient traffic environment will influence the performance of V2X due to the cyber-physical properties of V2X. To fully assess the advancements of NGV, this study presents a comparative analysis of IEEE 802.11bd and IEEE 802.11p, focusing on dynamic traffic conditions. Specifically, the technical advancements of the IEEE 802.11bd standard are first theoretically examined, emphasizing significant enhancements in aspects like modulation and coding schemes, coding rates, and channel coding. Subsequently, these critical technical enhancements are implemented in Veins, a simulation framework for the Internet of Vehicles (IoV), encompassing large-scale dynamic traffic scenarios. The simulation results indicate that the IEEE 802.11bd standard significantly enhances the data transfer rate compared to IEEE 802.11p, achieving a stable twofold increase. Furthermore, the data transmission latency is reduced by over half compared to IEEE 802.11p, while the data transmission reliability experiences a noteworthy 20% enhancement. Notably, the enhanced data transmission mode of the IEEE 802.11bd standard requires an increased signal-to-noise ratio (SNR). Additionally, this research evaluates the data dissemination properties in the IoV and finds that the traffic volume has a limited impact on the data propagation speed.

In the modern era, with the emergence of the Internet of Things (IoT), big data applications, cloud computing, and the ever-increasing demand for high-speed internet with the aid of upgraded telecom network resources, users now require virtualization of the network for smart handling of modern-day challenges to obtain better services (in terms of security, reliability, scalability, etc.). These requirements can be fulfilled by using software-defined networking (SDN). This research article emphasizes one of the major aspects of the practical implementation of SDN to enhance the QoS of a virtual network through the load management of network servers. In an SDN-based network, several servers are available to fulfill users’ hypertext transfer protocol (HTTP) requests to ensure dynamic routing under the influence of the SDN controller. However, if the number of requests is directed to a specific server, the controller is bound to follow the user-programmed instructions, and the load on that server is increased, which results in (a) an increase in end-to-end user delay, (b) a decrease in the data transfer rate, and (c) a decrease in the available bandwidth of the targeted server. All of the above-mentioned factors will result in the degradation of network QoS. With the implementation of the proposed algorithm, dynamic active sensing server load management (DASLM), on the SDN controller, the load on the server is shared based on QoS control parameters (throughput, response time, round trip time, etc.). The overall delay is reduced, and the bandwidth utilization along with throughput is also increased.

In this paper, we propose a design and implementation of a Direct Memory Access Controller (DMAC) as a part of an SoC. The main purpose of the DMAC design is to integrate it into a System on a Chip (SoC) for the exchange of a large volume of data between the memory and peripherals at high speed. The proposed DMAC works on Advanced Microcontroller Bus Architecture (AMBA) specifications. Internally, these specifications define two buses, Advanced High-performance Bus (AHB) and Advanced Peripheral Bus (APB). The Direct Memory Access (DMA) controller functions as the bridge between AHB and APB and allows them to work in parallel. It works either in buffer or non-buffer data transfer mode, according to the peripheral speed. This is synchronized with an asynchronous FIFO. Fast data reads can be achieved by using an AMBA based DMA controller with a processor in the SoC. This means that the DMAC provides a high volume of data transfer. Hence, the proposed DMAC is a better option for high volumes of data, as well as for timing. It can be concluded that if using this AMBA-based DMA controller the issues of high speed and high volume data have been resolved. Comparison is made with ARM processors, such as Cortex A8 and ZC702, and design comparison with Xilinx DMA is also made. The DMAC is viewed as a more appropriate choice.

This article intends to demonstrate – through the monitoring of traffic data – the importance of data transfer rate on mobile networks and prevalent user trends. Current paper examines both already operating mobile networks and ones presently in the state of standardization in order to shed light on the data transfer rate maximizing strategy, and to find out how a wide frequency spectrum should be necessary for handling growing user demands. Furthermore, recognizing the demand for the continuous expansion of data traffic, current article – relying on previous Cisco research and the analysis of broadband mobile networks – aims to estimate the necessary data transfer rate and the amount of increase in data usage regarding the next few years to serve the developing mobile technologies. In the world of IoT, M2M and Smart Cities, the available mobile networks most likely will not be able to sufficiently deal with the high traffic, the article seeks to answer whether the development of new mobile technologies (like the 5G) are in line with the growing needs of users and machines and to propose a solution for handling the expected data traffic.

This study proposes a two‐port Ethernet and two‐port RS485 network serial interface (SI) for packet transformation and data transmission for computer‐to‐computer communication. The proposed SI, which is composed of an RS485 module, an Ethernet module, a transmitter manager, a receiver manager, and the manager first‐in–first‐out (FIFO) queue, not only increases the data transmission rate but also guarantees correct communication between two Ethernet modules and two RS485 modules. An application‐specific integrated circuit is proposed to increase the operation frequency of the two‐port–two‐port SI. Furthermore, the large FIFO size enables the transmission of the maximum Ethernet packet length of 88 B and allows the latency of 51 clocks to be overcome. The measurement results indicate that the operating frequency, baud rate, data transfer rate, power consumption, processing delay, gate count, and chip size are 125 MHz, 115,200 Hz, 1 Gbps, 137 mW, 139.31 µs, 162,300, and 1.27 × 1.27 mm2, respectively, at a power supply of 1.8 V and total FIFO queue of 10 kB. The error between the theoretical throughput (7.342 Mbps) and the measured throughput (7.5067 Mbps) was ∼2.24%. [ABSTRACT FROM AUTHOR]

A compact and simple structure is designed to create an all-optical XOR logic gate using a two-dimensional, photonic crystal lattice. The structure was implemented using three waveguides connected by two nano-resonators. The plane wave expansion method was used to obtain the photonic band gap and the finite-difference time-domain method was used to investigate the behavior of the electromagnetic field in the photonic crystal structure. Examining the high contrast ratio and high-speed cascade, all-optical XOR on a chip, the effects of fabrication error and the changes in the input optical power showed that the structure could be used in optical integrated circuits. The contrast ratio and data transfer rate of the cascade XOR logic gate were respectively obtained as 44.29 dB and 1.5 Tb/s. In addition, the designed structure had very small dimensions at 158.65 μm2 and required very low power to operate, which made it suitable for low-power circuits. This structure could also be used as a NOT logic gate. Therefore, an XNOR logic gate can be designed using XOR and NOT logic gates.

Using a two‐dimensional photonic crystal lattice, a compact and simple structure has been introduced in the present study to construct an all‐optical half adder. The designed structure operates under the interference effect. The phase difference has been created in different states by putting the point defects and the difference in the length of the input waveguides. To do analyses, the finite‐difference time‐domain method and the plane wave expansion have been used. The advantages of this design include the small dimensions, high possibility of construction, compatibility with the silicon‐based technology, and equality of the output power in the logic states 0 and 1. The contrast ratio calculated for the port Sum and the port Carry has been equal to 9.3 and 8.22 dB. The response time has been equal to 0.22 ps, generating the data transfer rate of 4.55 Tbps. [ABSTRACT FROM AUTHOR]

In this paper, we propose a design and implementation of a Direct Memory Access Controller (DMAC) as a part of an SoC. The main purpose of the DMAC design is to integrate it into a System on a Chip (SoC) for the exchange of a large volume of data between the memory and peripherals at high speed. The proposed DMAC works on Advanced Microcontroller Bus Architecture (AMBA) specifications. Internally, these specifications define two buses, Advanced High-performance Bus (AHB) and Advanced Peripheral Bus (APB). The Direct Memory Access (DMA) controller functions as the bridge between AHB and APB and allows them to work in parallel. It works either in buffer or non-buffer data transfer mode, according to the peripheral speed. This is synchronized with an asynchronous FIFO. Fast data reads can be achieved by using an AMBA based DMA controller with a processor in the SoC. This means that the DMAC provides a high volume of data transfer. Hence, the proposed DMAC is a better option for high volumes of data, as well as for timing. It can be concluded that if using this AMBA-based DMA controller the issues of high speed and high volume data have been resolved. Comparison is made with ARM processors, such as Cortex A8 and ZC702, and design comparison with Xilinx DMA is also made. The DMAC is viewed as a more appropriate choice. [ABSTRACT FROM AUTHOR]

This article intends to demonstrate -- through the monitoring of traffic data -- the importance of data transfer rate on mobile networks and prevalent user trends. Current paper examines both already operating mobile networks and ones presently in the state of standardization in order to shed light on the data transfer rate maximizing strategy, and to find out how a wide frequency spectrum should be necessary for handling growing user demands. Furthermore, recognizing the demand for the continuous expansion of data traffic, current article -- relying on previous Cisco research and the analysis of broadband mobile networks -- aims to estimate the necessary data transfer rate and the amount of increase in data usage regarding the next few years to serve the developing mobile technologies. In the world of IoT, M2M and Smart Cities, the available mobile networks most likely will not be able to sufficiently deal with the high traffic, the article seeks to answer whether the development of new mobile technologies (like the 5G) are in line with the growing needs of users and machines and to propose a solution for handling the expected data traffic. [ABSTRACT FROM AUTHOR]

Due to the requirements of increased bandwidth and data transfer rate in wireless communication, cognitive radio (CR) has been proposed as a solution to the spectrum scarcity problem. Regarding the many advantages that ultra‐wideband (UWB) antennas offer, they could be used in CR systems. Simultaneously, by designing a band reject filter for avoiding interference with other applications, like wireless local area network (WLAN) and Worldwide Interoperability for Microwave Access (WiMAX), safety communication can be provided. In this work, two novel CRs (so that secondary ports are as non‐planar and uni‐planar parasitic antennas shapes) are presented. Each antenna consists of two ports at the opposite sides; one of them plays as UWB port (first work: 3.1–10.6 GHz and second work: 2.98–11.83 GHz) with filtered WLAN/WiMAX (first work: 4.9–5.8 GHz and second work: 4.9–6.08 GHz) and the other one supports filtered frequency bandwidth (first work: 4.8–6.2 GHz and second work: 5.1–6 GHz). Size reduction occurred in this work with both structures having the same size of 25 × 25 × 0.8 mm3. The designed antennas were measured and results of antennas have agreed well with the simulation analysis. [ABSTRACT FROM AUTHOR]