105 results on '"Chung, Ching-Che"'
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2. Implementation of Lightweight Convolutional Neural Networks with an Early Exit Mechanism Utilizing 40 nm CMOS Process for Fire Detection in Unmanned Aerial Vehicles
3. Design of a human body channel communication transceiver using convolutional codes
4. A Low-Power Hierarchical CNN Hardware Accelerator for Bearing Fault Diagnosis
5. A Multiplier-Free Convolution Neural Network Hardware Accelerator for Real-Time Bearing Condition Detection of CNC Machinery
6. A fast phase tracking reference-less all-digital CDR circuit for human body channel communication
7. An all-digital delay-locked loop for 3-D ICs die-to-die clock deskew applications
8. Lightweight CNN hardware accelerator using the ternary quantization method for fault diagnosis of CNC machinery
9. CNN Hardware Accelerator for Real-Time Bearing Fault Diagnosis
10. A Binary Weight Convolutional Neural Network Hardware Accelerator for Analysis Faults of the CNC Machinery on FPGA
11. A Maximum Logarithmic Maximum a Posteriori Probability Based Soft-Input Soft-Output Detector for the Coded Spatial Modulation Systems
12. A Body Channel Communication Transceiver with a 16x Oversampling CDR and Convolutional Codes
13. A 90 nm All-digital Smart Temperature Sensor with Wireless Body Area Network Baseband Transceiver for Biotelemetry Applications
14. A symbol-rate timing synchronization method for low power wireless OFDM systems
15. An ultra-low-power and portable digitally controlled oscillator for SoC applications
16. A portable digitally controlled oscillator using novel varactors
17. A DBN Hardware Accelerator for Auditory Scene Classification
18. Using Quantization-Aware Training Technique with Post-Training Fine-Tuning Quantization to Implement a MobileNet Hardware Accelerator
19. An All-Digital Temperature Sensor with Process and Voltage Variation Tolerance for IoT Applications
20. Design of a DBN Hardware Accelerator for Handwritten Digit Recognitions
21. Built-in Self-Test Circuits for All-digital Phase-Locked Loops
22. An FPGA-Based Transceiver for Human Body Channel Communication Using Walsh Codes
23. Hadoop cluster with FPGA-based hardware accelerators for K-means clustering algorithm
24. An area-efficient and wide-range digital DLL for per-pin deskew applications
25. A cell-based 5-MHz on-chip clock generator
26. Time-domain characteristics of body channel communication (BCC) and BCC transceiver design
27. An all-digital voltage sensor for static voltage drop measurements
28. A 0.52/1 V Fast Lock-in ADPLL for Supporting Dynamic Voltage and Frequency Scaling
29. A fast lock-in all-digital phase-locked loop in 40-nm CMOS technology
30. A Wide-Range Low-Cost All-Digital Duty-Cycle Corrector
31. A DCO compiler for all-digital PLL design
32. FPGA-based accelerator platform for big data matrix processing
33. A Low-Cost Low-Power All-Digital Spread-Spectrum Clock Generator
34. A 1 Mb/s–40 Mb/s human body channel communication transceiver
35. An all-digital on-chip abnormal temperature warning sensor for dynamic thermal management
36. Partial Parity Cache and Data Cache Management Method to Improve the Performance of an SSD-Based RAID
37. High-Resolution All-Digital Duty-Cycle Corrector in 65-nm CMOS Technology
38. All-digital delay-locked loop for 3D-IC die-to-die clock synchronization
39. An all-digital phase-locked loop compiler with liberty timing files
40. High-resolution and all-digital on-chip delay measurement with low supply sensitivity for SoC applications
41. A DCO compiler for all-digital PLL design.
42. FPGA-based accelerator platform for big data matrix processing.
43. A counter-based all-digital spread-spectrum clock generator with high EMI reduction in 65nm CMOS
44. A low-complexity high-performance wear-leveling algorithm for flash memory system design
45. A Low-Power DCO Using Interlaced Hysteresis Delay Cells
46. An All-Digital Large-$N$ Audio Frequency Synthesizer for HDMI Applications
47. A high-performance wear-leveling algorithm for flash memory system
48. A Fast Phase Tracking ADPLL for Video Pixel Clock Generation in 65 nm CMOS Technology
49. A Low-Power and Portable Spread Spectrum Clock Generator for SoC Applications
50. A referenceless all-digital fast frequency acquisition full-rate CDR circuit for USB 2.0 in 65nm CMOS technology
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