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Lately, there has been a rapid increase in the use of software-based deep learning neural networks (S-DNN) for the analysis of unstructured data consumption. For implementation of the S-DNN, synapse-device-based hardware DNN (H-DNN) has been proposed as an alternative to typical Von-Neumann structural computing systems. In the H-DNN, various numerical values such as the synaptic weight, activation function, and etc., have to be realized through electrical device or circuit. Among them, the synaptic weight that should have both positive and negative numerical values needs to be implemented in a simpler way. Because the synaptic weight has been expressed by conductance value of the synapse device, it always has a positive value. Therefore, typically, a pair of synapse devices is required to realize the negative weight values, which leads to additional hardware resources such as more devices, higher power consumption, larger area, and increased circuit complexity. Herein, we propose an alternative simpler method to realize the negative weight (named weight shifter) and its hardware implementation. To demonstrate the weight shifter, we investigated its theoretical, numerical, and circuit-related aspects, following which the H-DNN circuit was successfully implemented on a printed circuit board.

In hardware neural networks (HNNs), different operating temperatures cause variation in conductance of resistive arrays, and they can significantly distort the information of the synaptic weights, leading to a considerable loss in pattern recognition accuracy. In this study, a WOx–based resistive device is characterized with varying ambient temperatures, and 1k-bit synapse arrays are evaluated. A systematic analysis of the impact of operating temperature on the array-based HNNs is executed using neural network simulations. Moreover, we propose a temperature compensator (TC) that can mitigate anomalous array behavior without modifying the readout circuitry. Our results have demonstrated successful accuracy recovery of the array-based HNN over a wide range of operating temperatures.

To overcome the performance degradation in hardware neural networks (NNs) with non-ideal synapse devices, we proposed a novel neuromorphic architecture with both TiOx-based interfacial RRAM and CBRAM-based filamentary RRAM for highly accurate NN training and long-term inference reliability. We used a threshold-triggered training scheme, in which interfacial and filamentary RRAMs were programmed in a complementary fashion. This took advantage of the long retention time of the filamentary RRAM and the high-resolution, symmetric weight update in the interfacial RRAM. Additional evaluation of device parameters, such as linearity, precision, variation, and retention time, was conducted. An excellent pattern recognition accuracy of ~97% was achieved during training with the MNIST dataset. Thus, reliable inference accuracy after training was maintained using the filamentary RRAM.

Stasis weight ( $$\hbox {G}_s$$ ) that is an independent weight on applied input pulse amplitude was demonstrated for multinary data processing in a synaptic device-based neuromorphic system. Because multinary data is implemented as various input pulse amplitudes, the $$\hbox {G}_s$$ is necessary for high inference accuracy. Typically, synaptic devices exhibit nonlinear current–voltage characteristics (nonlinear device) and have different weight values depending on the applied input pulse amplitudes ( $$\hbox {G}_{{\mathrm{ns}}}$$ ). Therefore, to achieve high inference accuracy, we proposed pulse modulation circuits that can transform the pulse amplitude into pulse width or number. As a result, the $$\hbox {G}_s$$ was obtained from the nonlinear device possessing the $$\hbox {G}_{{\mathrm{ns}}}$$ , and the inference accuracy of the simulated MNIST data set was obviously improved from 29.34% to 97.6%.

Hardware neural networks (HNNs) which use synapse device (SD) arrays show promise as an approach to energy efficient parallel computation of massive vector-matrix multiplication. To maximize the inference accuracy of application-specific HNNs, we propose a highly reliable 2-terminal SD with fixed resistance based on WOx films. First, we investigate the device requirements of an array-based HNN through MATLAB and SPICE simulations taking into account the parasitic resistance effects in the array. On top of that, to fabricate the SD we utilize the intrinsic properties of the WOx film, which exhibits substantial changes in conductivity from 10−8 to 104 Ω−1cm−1 by varying the oxygen vacancy concentration. After the process optimization of oxide stoichiometry and electrode materials, we can form nanoscale WO×-based SDs with excellent conductance uniformity and I-V linearity. Our results show that inference accuracy is significantly improved by using WOx-based SD arrays even in advanced node scaling. Through experimental hardware implementation, 16 × 16 pixel images are correctly classified and we show the potential of WOx-based SD for future large-scale HNN applications.

In this study, a highly reliable Li based two-terminal electrochemical synapse device was developed to investigate the synaptic characteristics. Based on the identified fabrication conditions, a solid-state electrolyte was interposed between the anode and cathode to prevent the self-injection phenomenon. Consequently, improved reliabilities, such as endurance and retention, were achieved. These results demonstrate the significant potential of two-terminal synaptic device in the hardware implementation of neuromorphic computing systems.

A novel 3D vertical structure that can store both information and energy is proposed in this letter. For the fabrication of 3D structural devices, an isolation layer (IL) is essential because it prevents interference between each cell of the device. Given that it occupies a large volume in the 3D structure, the IL can be more effectively utilized. In particular, for energy efficiency, an energy-storage device can be adopted into the IL; thus, both energy and information can be stored in the same volume using the proposed hybrid 3D vertical structure. The demonstration of the proposed structure showed a strong potential for various fields of 3D stackable devices that require high-density integration and energy efficiency.

The electrical behavior of the high-field induced diffusive metal (HFIDM) is demonstrated in ceramic–metal composite film deposited by aerosol deposition (AD) method. To verify the effect of HFIDM, electrical properties for non-composite and metal-composite films are analyzed. The obtained results clearly demonstrate that HFIDM in composite film strongly affected its electrical properties such as current level, conduction mechanism, breakdown field, and resistance. These changes are attributed to the displacement and migration of HFIDM under electric field, leading to the noticeable variations in its electrical properties. These findings can provide a strong roadmap for AD-based applications using ceramic-HFIDM composite film.

An ionic electrochemical-reaction-based two-terminal synaptic device (Ionic Synapse) is developed for improved weight updating in hardware-based neuromorphic systems. The developed ionic synapse consists of an anode and a cathode that have the typical structure of a rechargeable battery. It can migrate metal ions from the anode (cathode) to the cathode (anode) under electrical bias, yielding total conductance changes. Analysis of the fabricated device reveals that the conductance changes are strongly dependent on the amounts of migrated ions, which can be sensitively controlled using applied identical pulses. Consequently, improved linearity for weight-updating is successfully achieved. These findings indicate the potential of the ionic electrochemical reaction mechanism for the realization of a desirable two-terminal synaptic device.

In this study, we investigated the effect of an Al

Due to the rapid progress of artificial intelligence technology based on neural networks, the amount of required computation has been increasing dramatically. To keep up with the ever-increasing demand, novel analog neuromorphic computing architectures have been intensively studied, where cross-point arrays of resistive memory devices are utilized for high-speed and power-efficient computation. Among various synaptic memory device candidates, a metal oxide-based electrochemical random-access memory (MO-ECRAM) has been attractive due to its complementary metal-oxide-semiconductor (CMOS)-compatibility and superior programmability. In this work, we fabricate a WO3-based MO-ECRAM with multiple terminals and characterize the conductance modulation in the channel regions with and without the gate stack. While the gated region conductance shows a high on/off ratio, the ungated region conductance displays weak modulation with a near-unity on/off ratio. Based on our experimental observation, we propose a lithographical technique to intentionally uncover the channel area and utilize the ungated area's resistance to limit the maximum conductance of each cross-point element at the individual device level. We conduct a neural network training simulation for MNIST dataset and show that this technique can guarantee robust large array operations for high-performance neural network computation.

An oxygen-based ionic synaptic transistor (O-IST) is a promising synaptic element for neuromorphic computing. In this study, we demonstrated that the density of the electrolyte plays a key role in achieving excellent synaptic characteristics in an O-IST. In a Pr0.7Ca0.3MnO3-based O-IST, we precisely controlled the density of the HfOx electrolyte and found that a low-density electrolyte could improve the ion mobility. Owing to the improved ion mobility and controlled ion migration, we demonstrated that excellent synaptic characteristics, such as a wide dynamic range, linear weight update, low operating voltage operations, and stable cyclic operation, were achieved. Finally, we confirmed an improved pattern recognition accuracy using an O-IST with an HfOx electrolyte of optimal density.

We propose a titanium oxide (TiOx)-based temperature sensor that can be operated in two ways, namely, by showing either abrupt or gradual metal–insulator transition (MIT) characteristics. For an as-prepared reliable TiOx-based MIT device, both abrupt and gradual MIT characteristics were observed under varying bias and temperature conditions. These results strongly demonstrate that two different types of temperature sensor (critical temperature sensor and differential temperature sensor) can be selectively operated by varying the applied bias in a single MIT device.

The origins of the nonlinear and asymmetric synaptic characteristics of TiO x -based synapse devices were investigated. Based on the origins, a microstructural electrode was utilized to improve the synaptic characteristics. Under an identical pulse bias, a TiO x -based synapse device exhibited saturated conductance changes, which led to nonlinear and asymmetric synaptic characteristics. The formation of an interfacial layer between the electrode and TiO x layer, which can limit consecutive oxygen migration and chemical reactions, was considered as the main origin of the conductance saturation behavior. To achieve consecutive oxygen migration and chemical reactions, structural engineering was utilized. The resultant microstructural electrode noticeably improved the synaptic characteristics, including the unsaturated, linear, and symmetric conductance changes. These synaptic characteristics resulted in the recognition accuracy significantly increasing from 38% to 90% in a neural network-based pattern recognition simulation.

In this paper, we demonstrated the feasibility of the Aerosol Deposition (AD) method which can be adapted as a future fabrication process for flexible electronic devices. On the basis of this method’s noticeable advantages such as room-temperature processing, suitability for mass production, wide material selectivity, and direct fabrication on a flexible substrate, we fabricated and evaluated a flexible conductive bridge random access memory (CBRAM) to confirm the feasibility of this method. The CBRAM was fabricated by the AD-method, and a novel film formation mechanism was observed and analyzed. Considering that the analyzed film formation mechanism is notably different with previously reported for film formation mechanisms of the AD method, these results of study will provide strong guidance for the fabrication of flexible electronic device on ductile substrate.

In this study, we investigated the effect of an Al2O3 barrier layer in an all-solid-state inorganic Li-based nano-ionic synaptic transistor (LST) with Li3PO4 electrolyte/WO x channel structure. Near-ideal synaptic behavior in the ultralow conductance range (∼50 nS) was obtained by controlling the abrupt ion migration through the introduction of a sputter-deposited thin (∼3 nm) Al2O3 interfacial layer. A trade-off relationship between the weight update linearity and on/off ratio with varying Al2O3 layer thickness was also observed. To determine the origin of the Al2O3 barrier layer effects, cyclic voltammetry analysis was conducted, and the optimal ionic diffusivity and mobility were found to be key parameters in achieving ideal synaptic behavior. Owing to the controlled ion migration, the retention characteristics were considerably improved by the Al2O3 barrier. Finally, a highly improved pattern recognition accuracy (83.13%) was achieved using the LST with an Al2O3 barrier of optimal thickness.

We propose a robust and reliable method based on deep neural networks to estimate the remaining useful life of lithium-ion batteries in electric vehicles. In general, the degradation of a battery can be predicted by monitoring its internal resistance. However, prediction under battery operation cannot be achieved using conventional methods such as electrochemical impedance spectroscopy. The battery state can be predicted based on the change in the capacity according to the state of health. For the proposed method, a statistical analysis of capacity fade considering the impedance increase according to the degree of deterioration is conducted by applying a deep neural network to diverse data from charge/discharge characteristics. Then, probabilistic predictions based on the capacity fade trends are obtained to improve the prediction accuracy of the remaining useful life using another deep neural network.

In this research, we propose a method that can significantly improve the linearity of current–voltage characteristics (L–IV) of synapse devices. Considering that analog input data are dependent on the L–IV, synapse devices having non-linear current–voltage characteristics can result in drastic conductance variations during inference operations. It means that the L–IV is one of the key parameters in the synapse device. To improve the L–IV, a triode region of a metal oxide semiconductor field effect transistor (MOSFET) was utilized with a Li-ion-based memristor as a gate voltage divider, which results in gradual channel conductance changes (analog synaptic weights). The channel conductance of the MOSFET can be selectively controlled based on Li-ion intercalation and de-intercalation. A notably improved L–IV and analog synaptic weights were achieved, which enhanced the MNIST data set recognition accuracy from 35.8% to 92.03%.

In this paper, we propose an on-chip learning method that can overcome the poor characteristics of pre-developed practical synaptic devices, thereby increasing the accuracy of the neural network based on the neuromorphic system. The fabricated synaptic devices, based on Pr1&minus, xCaxMnO3, LiCoO2, and TiOx, inherently suffer from undesirable characteristics, such as nonlinearity, discontinuities, and asymmetric conductance responses, which degrade the neuromorphic system performance. To address these limitations, we have proposed a conductance-based linear weighted quantization method, which controls conductance changes, and trained a neural network to predict the handwritten digits from the standard database MNIST. Furthermore, we quantitatively considered the non-ideal case, to ensure reliability by limiting the conductance level to that which synaptic devices can practically accept. Based on this proposed learning method, we significantly improved the neuromorphic system, without any hardware modifications to the synaptic devices or neuromorphic systems. Thus, the results emphatically show that, even for devices with poor synaptic characteristics, the neuromorphic system performance can be improved.

In this research, we propose a nanoscale and embeddable subzero temperature sensor that is made with a temperature-dependent titanium-oxide based metal-insulator-transition (MIT) device. For a nanoscale two-terminal structured MIT device, the MIT device's characteristics are noticeably changed from abrupt to gradual MIT under zero temperature, which is called MIT deformation. On the basis of the MIT deformation characteristics, subzero temperatures can be detected by reading current levels as temperature changes. Furthermore, this sensor has desirable sensing properties such as high-linearity and proper sensitivity. The obtained results strongly show that titanium-oxides with CMOS process compatibility, cost-effectiveness, nontoxicity, etc, can be applied at the nanoscale and embeddable on subzero temperature sensors on a chip.

For the first time, a novel bright reflective color STN LCD with inner scattering reflector on polymer substrate has been developed. The adoption of polymer substrate enables LCD to lighten and to have thinner thickness. Moreover, the structure of color filters on inner scattering reflector at the low polymer substrate improves color purity and brightness added to parallax free image compared to conventional reflective LCD. In this research, we have newly developed low temperature process and stepped heating for color plastic film LCD through thin film deposition, scattering reflector with constant brightness and color filter fabrication process.

The MIM device with very low threshold voltage and perfect symmetry was fabricated. The threshold voltage and the symmetry were 1.4 V and 1:1, respectively. A high performance MIM device was formed by newly developed processes based on our unique anodization and annealing treatment.