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In this study, the influence of the thickness of the channel layer on the electrical properties and stability of tungsten-doped indium oxide (IWO) thin-film transistors (TFTs) was investigated. Although oxide-semiconductor TFTs, particularly indium gallium zinc oxide, are promising, problems related to oxygen vacancies have led to their instability. In contrast, IWO has proven to be a compelling alternative because of its robust resistance to oxygen vacancies. IWO TFTs with varying channel thicknesses (10, 20, and 30 nm) were fabricated, and the device parameters, such as threshold voltage (Vth), subthreshold swing (SS), field-effect mobility (μFE), and on/off current ratio (Ion/Ioff), were analyzed. It was found that as the channel thickness increased, Vth exhibited a negative shift and SS increased, indicating an increase in carrier concentration. This phenomenon is attributed to the bulk trap density, in particular to oxygen vacancies. Negative bias stress tests confirmed the influence of the oxygen vacancies, with thicker channels showing more pronounced shifts. Low-frequency noise measurements were consistent with the carrier number fluctuation model, indicating that defects within the channel region contribute to the observed noise. The study concludes that identifying an optimal channel thickness during device manufacturing is crucial for improved TFT performance, with 20 nm devices characterized by high μFE and comparable trap density to 10 nm. This study provides valuable insight into the nuanced relationship between the channel thickness, trap density, and electrical performance of IWO TFTs. [ABSTRACT FROM AUTHOR]

This study investigated the potential of indium tungsten oxide (IWO) channel-based inorganic electrolyte transistors as synaptic devices. We comparatively analyzed the electrical characteristics of indium gallium zinc oxide (IGZO) and IWO channels using phosphosilicate glass (PSG)-based electrolyte transistors, focusing on the effects of electric-double-layer (EDL) and electrochemical doping. The results showed the superior current retention characteristics of the IWO channel compared to the IGZO channel. To validate these findings, we compared the DC bias characteristics of SiO2-based field-effect transistors (FETs) with IGZO and IWO channels. Furthermore, by examining the transfer curve characteristics under various gate voltage (VG) sweep ranges for PSG transistors based on IGZO and IWO channels, we confirmed the reliability of the proposed mechanisms. Our results demonstrated the superior short-term plasticity of the IWO channel at VG = 1 V due to EDL operation, as confirmed by excitatory post-synaptic current measurements under pre-synaptic conditions. Additionally, we observed superior long-term plasticity at VG ≥ 2 V due to proton doping. Finally, the IWO channel-based FETs achieved a 92% recognition rate in pattern recognition simulations at VG = 4 V. IWO channel-based inorganic electrolyte transistors, therefore, have remarkable applicability in neuromorphic devices. [ABSTRACT FROM AUTHOR]

This study demonstrates a significant enhancement in the performance of thin-film transistors (TFTs) in terms of stability and mobility by combining indium–tungsten oxide (IWO) and zinc oxide (ZnO). IWO/ZnO heterojunction structures were fabricated with different channel thickness ratios and annealing environments. The IWO (5 nm)/ZnO (45 nm) TFT, annealed in O2 ambient, exhibited a high mobility of 26.28 cm2/V·s and a maximum drain current of 1.54 μA at a drain voltage of 10 V, outperforming the single-channel ZnO TFT, with values of 3.8 cm2/V·s and 28.08 nA. This mobility enhancement is attributed to the formation of potential wells at the IWO/ZnO junction, resulting in charge accumulation and improved percolation conduction. The engineered heterojunction channel demonstrated superior stability under positive and negative gate bias stresses compared to the single ZnO channel. The analysis of O 1s spectra showed OI, OII, and OIII peaks, confirming the theoretical mechanism. A bias temperature stress test revealed superior charge-trapping time characteristics at temperatures of 25, 55, and 85 °C compared with the single ZnO channel. The proposed IWO/ZnO heterojunction channel overcomes the limitations of the single ZnO channel and presents an attractive approach for developing TFT-based devices having excellent stability and enhanced mobility. [ABSTRACT FROM AUTHOR]

To facilitate the utility of field effect transistor (FET)-type sensors, achieving sensitivity enhancement beyond the Nernst limit is crucial. Thus, this study proposed a novel approach for the development of ferroelectric FETs (FeFETs) using lead zirconate titanate (PZT) ferroelectric films integrated with indium–tungsten oxide (IWO) channels synthesized via a cost-effective sol-gel process. The electrical properties of PZT-IWO FeFET devices were significantly enhanced through the strategic implementation of PZT film treatment by employing intentional annealing procedures. Consequently, key performance metrics, including the transfer curve on/off ratio and subthreshold swings, were improved. Moreover, unprecedented electrical stability was realized by eliminating the hysteresis effect during double sweeps. By leveraging a single-gate configuration as an FeFET transformation element, extended-gate (EG) detection methodologies for pH sensing were explored, thereby introducing a pioneering dimension to sensor architecture. A measurement paradigm inspired by plane gate work was adopted, and the proposed device exhibited significant resistive coupling, consequently surpassing the sensitivity thresholds of conventional ion-sensitive field-effect transistors. This achievement represents a substantial paradigm shift in the landscape of ion-sensing methodologies, surpassing the established Nernst limit (59.14 mV/pH). Furthermore, this study advances FeFET technology and paves the way for the realization of highly sensitive and reliable ion sensing modalities. [ABSTRACT FROM AUTHOR]

The primary objective of neuromorphic electronic devices is the implementation of neural networks that replicate the memory and learning functions of biological synapses. To exploit the advantages of electrolyte gate synaptic transistors operating like biological synapses, we engineered electric double-layer transistors (EDLTs) using phosphorus-doped silicate glass (PSG). To investigate the effects of phosphorus on the EDL and synaptic behavior, undoped silicate spin-on-glass-based transistors were fabricated as a control group. Initially, we measured the frequency-dependent capacitance and double-sweep transfer curves for the metal-oxide-semiconductor (MOS) capacitors and MOS field-effect transistors. Subsequently, we analyzed the excitatory post-synaptic currents (EPSCs), including pre-synaptic single spikes, double spikes, and frequency variations. The capacitance and hysteresis window characteristics of the PSG for synaptic operations were verified. To assess the specific synaptic operational characteristics of PSG-EDLTs, we examined EPSCs based on the spike number and established synaptic weights in potentiation and depression (P/D) in relation to pre-synaptic variables. Normalizing the P/D results, we extracted the parameter values for the nonlinearity factor, asymmetric ratio, and dynamic range based on the pre-synaptic variables, revealing the trade-off relationships among them. Finally, based on artificial neural network simulations, we verified the high-recognition rate of PSG-EDLTs for handwritten digits. These results suggest that phosphorus-based EDLTs are beneficial for implementing high-performance artificial synaptic hardware. [ABSTRACT FROM AUTHOR]