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In our previous works, the piezoresistive sensors have been demonstrated to be accurate and efficient tools for stress measurements in microelectronic packaging. In this study, we first designed test chips with piezoresistive stress sensors, temperature sensors as well as heats, and the test wafers were next manufactured through commercialized IC processes. Piezoresistive sensors on silicon strips, which were cut directly from silicon wafers at a specific angle, were then calibrated, and highly consistent piezoresistive coefficients were extracted at various wafer sites so that both normal and shear stress on the test chips can be measured. Finally, we packaged the test chips into 100-pin PQFP structures with different batches and measured internal stresses on the test chips inside the packaging. After measuring packaging induced stresses as well as thermal stresses on several batches of PQFPs, it was found that the normal stress diversities were obvious from different batches of the packaging structure, and the shearing stresses were approximately zero in all of the PQFPs at different chip site.

Stress measurements in microelectronic packaging through piezoresistive sensors take the advantage of both in-situ and nondestructive. In this study, test chips with both p-type and n-type piezoresistive stress sensors, as well as a heat source, were first designed, then manufactured by a commercialized foundry so that the uniformity of the test chips was expected. Both temperature and stress calibrations were next performed through a special designed MQFP (Metal Quad Flat Package) and four-point bending (4PB) structure, respectively. Measurements of stresses which are produced due to both manufacturing process and thermal effects on the test chips were finally executed, and approximately linear relationships were observed between stress and temperature as well as stress and input power. It is concluded that n-type piezoresistive stress sensors are able to extract stress in microelectronic packaging with good accuracy.

Based on experimental data, a simple R–C (thermal resistance–heat capacitance) model with software precaution strategies are proposed in this paper to predict the steady-state temperature of the circuit in an electronic packaging in real time. Further developments on the new methodology lead to real time monitoring if input power and/or the environment are changing during operations. It is concluded that the new methodologies, which make the over-temperature prediction much more reliable, efficient, sensible, and faster, can be easily employed for over-temperature protection designs on electronic packaging. [S1043-7398(00)00301-7]

In this work, a simple assembled structure was designed and fabricated so that the calibration procedures on piezoresisitve stress sensors for microelectronic packaging can be simpler, more accurate, and more efficient. After comparing with the previous work results, validity of the aforementioned new structure was next demonstrated through experimental data. Since many accessory experimental facilities employed in traditional calibration procedure become unnecessary, the new methodology takes great advantage on piezoresisitve coefficient calibrations, especially for calibration at temperature other than room temperature.