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Various indirect feedback tuning apparatuses and methods for tuning photonic systems are enabled. For instance, a system can perform operations, such as: determining a temperature of an optical device, determining, based on the temperature of the optical device and a feedback model, a tuning input to stabilize an optical signal, and performing, based on the tuning input, feedback tuning, wherein the feedback tuning comprises thermal tuning and electrical tuning.

To establish flatten networks and accomplish rapid and efficient communications in the future hyper-scale data centers, HERO, a high-radix optical switch based on integrated silicon photonics, is proposed in this work. The architecture of HERO, including the switch fabric, switch interface and switch controller, is described in detail. Two new switch control approaches: split-transaction predictive control and wavelength-group switching, are developed. The efficient control together with the optimized high-radix integrated optical switch fabrics help HERO achieve over 1 Pbps switching capacity. Even for small packets, such as 64–256 B Ethernet packets, the maximal utilization of the switch can reach up to 83%, and the throughput can approximate 1 Pbps. Further design explorations on the packet length and some key configurations, including the number of wavelengths and wavelength groups, are also conducted in this work, paving the way to the design of high-performance flatten data-center networks in the future.

To establish flatten networks and accomplish rapid and efficient communications in the future hyper-scale data centers, HERO, a high-radix optical switch based on integrated silicon photonics, is proposed in this work. The architecture of HERO, including the switch fabric, switch interface and switch controller, is described in detail. Two new switch control approaches: split-transaction predictive control and wavelength-group switching, are developed. The efficient control together with the optimized high-radix integrated optical switch fabrics help HERO achieve over 1 Pbps switching capacity. Even for small packets, such as 64–256 B Ethernet packets, the maximal utilization of the switch can reach up to 83%, and the throughput can approximate 1 Pbps. Further design explorations on the packet length and some key configurations, including the number of wavelengths and wavelength groups, are also conducted in this work, paving the way to the design of high-performance flatten data-center networks in the future.

Silicon photonics is the leading candidate technology for high-speed and low-energy-consumption networks. Thermal and process variations are the two main challenges of achieving high-reliability photonic networks. Thermal variation is due to the heat issues created by application, floorplan, and environment, while process variation is caused by fabrication variability in the deposition, masking, exposition, etching, and doping. Tuning techniques are then required to overcome the impact of the variations and efficiently stabilize the performance of silicon photonic networks. We extend our previous optical switch integration model, BOSIM, to support the variation and thermal analyses. Based on device properties, we propose indirect feedback tuning (IFT) to simultaneously alleviate thermal and process variations. IFT can improve the BER of silicon photonic networks to 10-9 under different variation situations. Compared to state-of-the-art techniques, IFT can achieve an up to 1.52×108 times bit-error-rate improvement and 4.11X better heater energy efficiency. Indirect feedback does not require high-speed optical signal detection, and thus, the circuit design of IFT saves up to 61.4% of the power and 51.2% of the area compared to state-of-the-art designs. This work is partially supported by InnoHK ACCESS center.

A lot of efforts have been devoted to optically enabled high-performance communication infrastructures for future manycore processors. Silicon photonic network promises high bandwidth, high energy efficiency and low latency. However, the ever-increasing network complexity results in high optical power demands, which stress the optical power delivery and affect delivery efficiency. Facing these challenges, we propose Ring-based Optical Active Delivery (ROAD) system, to effectively manage and efficiently deliver high optical power throughout photonic-electronic hybrid systems. Experimental results demonstrate up to 5.49X energy efficiency improvement compared to traditional design without affecting processor performance.

Silicon photonic networks are revolutionizing computing systems by improving the energy efficiency, bandwidth, and latency of data movements. Optical modulators, such as microresonators and Mach-Zehnder Interferometers (MZIs), are the basic building blocks of silicon photonic networks. This work proposes a SPICE-compatible electro-optical co-simulation model, BOSIM, to systematically study optical modulators using PN, PIN, and metal-insulator-silicon (MIS) capacitor device technologies. BOSIM holistically models both transient and steady state properties, such as switching speed, power, transmission spectrum, area and carrier distribution. BOSIM is validated by the measured data from eight research groups and companies. Compared to microresonators, BOSIM shows MZIs are fast, with a high extinction ratio and large bandwidth but in the sacrifice of loss, energy, and area. Using a PIN diode over a PN diode can save area, but retain the loss and energy, while an MIS capacitor has the shock response of carrier distribution in a narrow range and is marginalized gradually. For instance, an MZI can achieve a 2.5X bit rate, 6.06X extinction ratio, 71.04X 3dB bandwidth, but costs at least 1.93X passing loss, 1.46X energy consumption and 16.67X area, compared with microresonator.

Photonics is the leading candidate technology for high-speed and low-energy-consumption systems. Thermal and process variations are the two main challenges of achieving high-reliability photonic systems. Thermal variation is due to the heat issues created by application, floorplan, and environment, while process variation is caused by fabrication variability in the deposition, masking, exposition, etching, and doping. Tuning techniques are then required to overcome the impact of the variations and efficiently stabilize the performance of silicon photonic systems. In this thesis, we first developed a holistic optical switch integration model, called BOSIM. BOSIM is validated by the measured data from eight research groups and companies. Based on BOSIM we analyze the thermal and electrical properties of optical switches. Secondly, we propose indirect feedback tuning (IFT) to simultaneously alleviate thermal and process variations. IFT can improve the BER of silicon photonic systems to 10−9 under different variation situations. Thirdly, we present a more effective method, BAT, that combines our invented optical bridging method with IFT. BAT enhances the temperature channel transition among microresonators (MRs) and minimizes bit errors during temperature changes. BAT is integrated with thermal tuning, electrical tuning, laser tuning, and receiver tuning. We optimize MR design, control logic, tuning circuit, thermal floorplan, and network protection mechanism for BAT. Compared to state-of-the-art methods, BAT achieves a 10−12 BER for photonic chiplets, saves up to 70.0% of the thermal tuning power, and improves up to a 1.17X system energy efficiency.

This work proposes a cross-layer framework to optimize high-radix optical switches and facilitate rapid initial system design explorations and evaluations. Case studies on 64-port switches show the framework can reduce as much as 93% laser energy consumption with optimized device parameters.

High-radix integrated silicon photonic switches promise ultrahigh bandwidth communications required by next generation data centers. To holistically explore the characteristics of high-radix integrated optical switches, this work systematically studies the latency, throughput and energy consumption, with detailed models and various system configurations. Three categories of space switches, blocking, rearrangeable non-blocking and strictly non-blocking switches, are investigated, together with one of the widely used wavelength switches, arrayed waveguide grating router (AWGR). The work paves the ways to automatically optimize high-radix integrated silicon photonic switches. © 2019 IEEE.

This work proposes a cross-layer framework to optimize high-radix optical switches and facilitate rapid initial system design explorations and evaluations. Case studies on 64-port switches show the framework can reduce as much as 93% laser energy consumption with optimized device parameters.

As large-scale applications are demanding more computation power while Moore's Law is slowing down, rackscale computing systems are being developed to meet the increasing computation and energy requirements. Optical interconnects have become an alternative to address the performance and energy efficiency issues of rack-scale systems because of their superiority in bandwidth, latency, and power. In this paper, we systematically analyze the rack-scale optical network (RSON) architecture with different path reservation schemes and optical inter-chip networks and the most commonly used architecture for high-performance computing systems. We explore the RSON architecture, floorplan optimized delta optical network (FODON) switch architecture and the preemptive chain feedback (PCF) scheme to optimize multi-domain path reservation. Experimental results show that the RSON with FODON switch and PCF scheme can improve system performance per energy consumption by up to 5x, and around 4x on average, while still maintaining better scalability than state-of-The-Art systems. © 2019 IEEE.

High-radix integrated silicon photonic switches promise ultrahigh bandwidth communications required by next generation data centers. To holistically explore the characteristics of high-radix integrated optical switches, this work systematically studies the latency, throughput and energy consumption, with detailed models and various system configurations. Three categories of space switches, blocking, rearrangeable non-blocking and strictly non-blocking switches, are investigated, together with one of the widely used wavelength switches, arrayed waveguide grating router (AWGR). The work paves the ways to automatically optimize high-radix integrated silicon photonic switches. © 2019 IEEE.

The increasingly higher demands on computing power from scientific computations, big data processing and deep learning are pushing the emergence of exascale computing systems. Tens of thousands of or even more manycore nodes are connected to build such systems. It imposes huge performance and power challenges on different aspects of the systems. As a basic block in high-performance computing systems, modularized rack will play a significant role in addressing these challenges. In this chapter, we introduce rack-scale optical networks (RSON), a silicon photonics enabled inter/intra-chip network for rack-scale many-core systems. RSON leverages the fact that most traffic is within rack and the high bandwidth and low-latency rack-scale optical network can improve both performance and energy efficiency. We codesign the intra-chip and inter-chip optical networks together with optical internode interface to provide balanced data access to both local memory and remote note’s memory, making the nodes within rack cooperate effectively. The evaluations show that RSON can improve the overall performance and energy efficiency dramatically. Specifically, RSON can deliver as much as 5.4x more performance under the same energy consumption compared to traditional InfiniBand connected rack. © The Institution of Engineering and Technology 2019.