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A topology with a reduced component count, referred to as the different multilevel current source inverter (DML-CSI), has been introduced in the literature. However, similar to other CSIs, DML-CSI also suffers from the issue of open-circuit faults (OCFs), which are reported to be the most common and destructive failures in industrial settings. In addressing this significant drawback, this article introduces a new configuration termed the fault-tolerant switching-cell CSI (FT-SC2SI), derived from the DML-CSI circuit. To enhance the proposed topology's resilience against severe OCF scenarios and avoid the need for an additional closed-loop controller, the phase-shifted pulsewidth modulation (PS-PWM) method is employed. Notably, the proposed solution is straightforward and does not necessitate any fault diagnosis or other complex controllers. Furthermore, the PS-PWM operation under faulty conditions does not require modification. Likewise, the quality of the waveforms is not compromised during the faulty operating conditions. Experimental results are provided to substantiate the findings.

This article proposes a single-phase current source inverter (CSI) that uses active power decoupling (APD) technique. The proposed CSI attenuates an undesirable low-frequency ripple power transferred from ac side and has a dc-link inductor with small inductance. In addition, it implements the switching cell structure to minimize overlap-time and eliminate arm-open problem, thus improving quality of output waveforms. It is easy to implement control scheme because the APD circuit is controlled independently of the output side. Detailed analysis and experimental results are provided to verify performance of the proposed CSI.

This article presents a family of the two-phase isolated buck-boost dc–dc converter with an automatic current balancing feature inhering from the series-capacitor (SC) high conversion ratio converter. The current of each module is automatically well-balanced regardless of the gate signals mismatch and different characteristics of the semiconductor switches utilized in the proposed converter. In addition, the SC combined with the two-phase current-fed full-bridge converter is typically analyzed in this study. To further enhance the reliability, the proposed converter with clamping voltage overshoot action is introduced. Moreover, the design parameters, equivalent circuits, switching schemes, and operation modes of the proposed dc–dc converter are described in detail. The current balancing principle of the two inductor currents in the designed converter is also explained. Furthermore, the performance of the proposed converter is analyzed in PSIM simulation. Lastly, a hardware prototype with a rated power of 2 kW was built and tested in different operating conditions to validate the analysis and effectiveness of the presented converter.

This letter proposes a novel space vector pulsewidth modulation scheme for three-phase current source inverter. In the proposed switching, one of upper switches and one of lower switches are always on-state, so there is no overlap between high-frequency switching signals. Therefore, the inverter can improve the quality of output waveforms and efficiency. In addition, the number of switching is reduced with the help of sensed line-to-line voltage. A 1-kW prototype was built and tested to verify the performance of the proposed scheme.

The paralleled H-bridge multilevel current source inverter (PHB-MLCSI) is widely used in industry, especially for high-power and medium-voltage applications. Even so, the risk of an open-circuit fault (OCF), which is the most common and destructive failure among all conventional CSIs also jeopardizes the reliability of the standard PHB-MLCSI. To overcome this major shortcoming, a new topology called paralleled H-bridge multilevel switching-cell current source inverter is introduced in this article. Thus, OCF is no longer an issue in the proposed topology, even if it occurs frequently or is caused by switch turn on mismatch/delay among all complementary switches in every switching cycle. The phase-shifted pulsewidth modulation (PS-PWM) method is used to control the proposed topology due to the following two reasons: 1) other PWM schemes, such as level shifted and low/fundamental frequency or half-cycle PWMs cannot overcome OCF if it occurs frequently; 2) mismatches in gating signals, tolerance in parameters of the input dc smoothing inductors (chokes), and unequal input dc voltage values are other concerns in the PHB-MLCSI that may deteriorate the performance of the converter. The PS-PWM method with redundant switching states is a proper modulation technique to handle all the aforementioned mismatch issues to an acceptable level. A variety of experimental tests are conducted to validate the feasibility of the proposed solution. Finally, a comparison is drawn between the proposed circuit and three other existing MLCSIs, further highlighting its distinctive features.