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[ES] El auge en la aplicación de redes neuronales profundas (RNPs) en una gran variedad de campos científicos ha propiciado su uso no solo en servidores de cómputo sino también en dispositivos de bajo consumo. Los cálculos que se realizan tanto en entrenamiento como en inferencia de las RNPs se descomponen en núcleos de álgebra lineal y se extraen de bibliotecas especializadas como Intel MKL, BLIS, etc. Sin embargo, la memoria requerida por estas bibliotecas puede exceder de la capacidad máxima de estos pequeños dispositivos. Además, la gran variedad de hardware de bajo consumo hace prácticamente imposible contar con núcleos de cómputo optimizados para cada modelo. Una opción para reducir el coste de generación y mantenimiento de estas bibliotecas es la utilización de generadores de código automáticos como Apache TVM. Estas herramientas permiten desarrollar un solo código común para todos los dispositivos y posteriormente generar el código ensamblador para cada uno. Además, con TVM solamente se debe generar los núcleos necesarios para un modelo de RNP concreto evitando utilizar memoria del dispositivo con funcionalidad que no se utiliza para cada caso. En este proyecto se pretende generar núcleos computacionales para distintas arquitecturas de forma automática utilizando Apache TVM con el objetivo de reproducir las necesidades de los RNPs., [EN] The boom in the application of Deep Neural Networis (DNNs) in a wide variety of scientific fields has led to their use not only in compute-intensive servers but also in low-power devices. Many of the computations performed m RNPs, both in training and inference, are decomposed into linear algebra kernels and extracted from specialised libraries such as Intel Mkl or BLIS. However, the amount of memory required by these libraries can exceed the maximum capacity of these small devices. In addition, the wide variety of low-power hardware makes it virtually impossible to have optimised compute cores for each modeL One option to reduce the cost of generating and maintaming these libraries is the use of automatic code generators such as Apache TVM. These tools allow you to generate a single common code for all devices and then ,generate the assembly code for each device. With TVM, only the cores needed for a specific RNP model must be generated, avoiding the use of device memory with functionality that is not going to be used. This project aims to generate optimised computational kernels for different'architectures automatically using Apache TVM with the objective of reproducing the needs of RNP.

[ES] El auge en la aplicación de redes neuronales profundas (RNPs) en una gran variedad de campos científicos ha propiciado su uso no solo en servidores de cómputo sino también en dispositivos de bajo consumo. Los cálculos que se realizan tanto en entrenamiento como en inferencia de las RNPs se descomponen en núcleos de álgebra lineal y se extraen de bibliotecas especializadas como Intel MKL, BLIS, etc. Sin embargo, la memoria requerida por estas bibliotecas puede exceder de la capacidad máxima de estos pequeños dispositivos. Además, la gran variedad de hardware de bajo consumo hace prácticamente imposible contar con núcleos de cómputo optimizados para cada modelo. Una opción para reducir el coste de generación y mantenimiento de estas bibliotecas es la utilización de generadores de código automáticos como Apache TVM. Estas herramientas permiten desarrollar un solo código común para todos los dispositivos y posteriormente generar el código ensamblador para cada uno. Además, con TVM solamente se debe generar los núcleos necesarios para un modelo de RNP concreto evitando utilizar memoria del dispositivo con funcionalidad que no se utiliza para cada caso. En este proyecto se pretende generar núcleos computacionales para distintas arquitecturas de forma automática utilizando Apache TVM con el objetivo de reproducir las necesidades de los RNPs., [EN] The boom in the application of Deep Neural Networis (DNNs) in a wide variety of scientific fields has led to their use not only in compute-intensive servers but also in low-power devices. Many of the computations performed m RNPs, both in training and inference, are decomposed into linear algebra kernels and extracted from specialised libraries such as Intel Mkl or BLIS. However, the amount of memory required by these libraries can exceed the maximum capacity of these small devices. In addition, the wide variety of low-power hardware makes it virtually impossible to have optimised compute cores for each modeL One option to reduce the cost of generating and maintaming these libraries is the use of automatic code generators such as Apache TVM. These tools allow you to generate a single common code for all devices and then ,generate the assembly code for each device. With TVM, only the cores needed for a specific RNP model must be generated, avoiding the use of device memory with functionality that is not going to be used. This project aims to generate optimised computational kernels for different'architectures automatically using Apache TVM with the objective of reproducing the needs of RNP.

[ES] El auge en la aplicación de redes neuronales profundas (RNPs) en una gran variedad de campos científicos ha propiciado su uso no solo en servidores de cómputo sino también en dispositivos de bajo consumo. Los cálculos que se realizan tanto en entrenamiento como en inferencia de las RNPs se descomponen en núcleos de álgebra lineal y se extraen de bibliotecas especializadas como Intel MKL, BLIS, etc. Sin embargo, la memoria requerida por estas bibliotecas puede exceder de la capacidad máxima de estos pequeños dispositivos. Además, la gran variedad de hardware de bajo consumo hace prácticamente imposible contar con núcleos de cómputo optimizados para cada modelo. Una opción para reducir el coste de generación y mantenimiento de estas bibliotecas es la utilización de generadores de código automáticos como Apache TVM. Estas herramientas permiten desarrollar un solo código común para todos los dispositivos y posteriormente generar el código ensamblador para cada uno. Además, con TVM solamente se debe generar los núcleos necesarios para un modelo de RNP concreto evitando utilizar memoria del dispositivo con funcionalidad que no se utiliza para cada caso. En este proyecto se pretende generar núcleos computacionales para distintas arquitecturas de forma automática utilizando Apache TVM con el objetivo de reproducir las necesidades de los RNPs., [EN] The boom in the application of Deep Neural Networis (DNNs) in a wide variety of scientific fields has led to their use not only in compute-intensive servers but also in low-power devices. Many of the computations performed m RNPs, both in training and inference, are decomposed into linear algebra kernels and extracted from specialised libraries such as Intel Mkl or BLIS. However, the amount of memory required by these libraries can exceed the maximum capacity of these small devices. In addition, the wide variety of low-power hardware makes it virtually impossible to have optimised compute cores for each modeL One option to reduce the cost of generating and maintaming these libraries is the use of automatic code generators such as Apache TVM. These tools allow you to generate a single common code for all devices and then ,generate the assembly code for each device. With TVM, only the cores needed for a specific RNP model must be generated, avoiding the use of device memory with functionality that is not going to be used. This project aims to generate optimised computational kernels for different'architectures automatically using Apache TVM with the objective of reproducing the needs of RNP.

[EN] Directive-based programming models, such as OpenMP, OpenACC, and OmpSs, enable users to accelerate applications by using coprocessors with little effort. These devices offer significant computing power, but their use can introduce two problems: an increase in the total cost of ownership and their underutilization because not all codes match their architecture. Remote accelerator virtualization frameworks address those problems. In particular, rCUDA provides transparent access to any graphic processor unit installed in a cluster, reducing the number of accelerators and increasing their utilization ratio. Joining these two technologies, directive-based programming models and rCUDA, is thus highly appealing. In this work, we study the integration of OmpSs and OpenACC with rCUDA, describing and analyzing several applications over three different hardware configurations that include two InfiniBand interconnections and three NVIDIA accelerators. Our evaluation reveals favorable performance results, showing low overhead and similar scaling factors when using remote accelerators instead of local devices.

[EN] Directive-based programming models, such as OpenMP, OpenACC, and OmpSs, enable users to accelerate applications by using coprocessors with little effort. These devices offer significant computing power, but their use can introduce two problems: an increase in the total cost of ownership and their underutilization because not all codes match their architecture. Remote accelerator virtualization frameworks address those problems. In particular, rCUDA provides transparent access to any graphic processor unit installed in a cluster, reducing the number of accelerators and increasing their utilization ratio. Joining these two technologies, directive-based programming models and rCUDA, is thus highly appealing. In this work, we study the integration of OmpSs and OpenACC with rCUDA, describing and analyzing several applications over three different hardware configurations that include two InfiniBand interconnections and three NVIDIA accelerators. Our evaluation reveals favorable performance results, showing low overhead and similar scaling factors when using remote accelerators instead of local devices.

[EN] Directive-based programming models, such as OpenMP, OpenACC, and OmpSs, enable users to accelerate applications by using coprocessors with little effort. These devices offer significant computing power, but their use can introduce two problems: an increase in the total cost of ownership and their underutilization because not all codes match their architecture. Remote accelerator virtualization frameworks address those problems. In particular, rCUDA provides transparent access to any graphic processor unit installed in a cluster, reducing the number of accelerators and increasing their utilization ratio. Joining these two technologies, directive-based programming models and rCUDA, is thus highly appealing. In this work, we study the integration of OmpSs and OpenACC with rCUDA, describing and analyzing several applications over three different hardware configurations that include two InfiniBand interconnections and three NVIDIA accelerators. Our evaluation reveals favorable performance results, showing low overhead and similar scaling factors when using remote accelerators instead of local devices.