Search

High-fidelity single-shot readout of spin qubits requires distinguishing states much faster than the T1 time of the spin state. One approach to improving readout fidelity and bandwidth (BW) is cryogenic amplification, where the signal from the qubit is amplified before noise sources are introduced and room-temperature amplifiers can operate at lower gain and higher BW. We compare the performance of two cryogenic amplification circuits: a current-biased heterojunction bipolar transistor circuit (CB-HBT), and an AC-coupled HBT circuit (AC-HBT). Both circuits are mounted on the mixing-chamber stage of a dilution refrigerator and are connected to silicon metal oxide semiconductor (Si-MOS) quantum dot devices on a printed circuit board (PCB). The power dissipated by the CB-HBT ranges from 0.1 to 1 {\mu}W whereas the power of the AC-HBT ranges from 1 to 20 {\mu}W. Referred to the input, the noise spectral density is low for both circuits, in the 15 to 30 fA/$\sqrt{\textrm{Hz}}$ range. The charge sensitivity for the CB-HBT and AC-HBT is 330 {\mu}e/$\sqrt{\textrm{Hz}}$ and 400 {\mu}e/$\sqrt{\textrm{Hz}}$, respectively. For the single-shot readout performed, less than 10 {\mu}s is required for both circuits to achieve bit error rates below $10^{-3}$, which is a putative threshold for quantum error correction., Comment: 11 pages, 13 figures

We demonstrate a capability of deterministic doping at the single atom level using a combination of direct write focused ion beam and solid-state ion detectors. The focused ion beam system can position a single ion to within 35 nm of a targeted location and the detection system is sensitive to single low energy heavy ions. This platform can be used to deterministically fabricate single atom devices in materials where the nanostructure and ion detectors can be integrated, including donor-based qubits in Si and color centers in diamond.

As a first step to porting scanning tunneling microscopy methods of atomic-precision fabrication to a strained-Si/SiGe platform, we demonstrate post-growth P atomic-layer doping of SiGe heterostructures. To preserve the substrate structure and elastic state, we use a T $\leq 800^\circ$C process to prepare clean Si$_{0.86}$Ge$_{0.14}$ surfaces suitable for atomic-precision fabrication. P-saturated atomic-layer doping is incorporated and capped with epitaxial Si under a thermal budget compatible with atomic-precision fabrication. Hall measurements at T$=0.3$ K show that the doped heterostructure has R$_{\square}=570\pm30$ $\Omega$, yielding an electron density $n_{e}=2.1\pm0.1\times10^{14}$cm$^{-2}$ and mobility $\mu_e=52\pm3$ cm$^{2}$ V$^{-1}$ s$^{-1}$, similar to saturated atomic-layer doping in pure Si and Ge. The magnitude of $\mu_e$ and the complete absence of Shubnikov-de Haas oscillations in magnetotransport measurements indicate that electrons are overwhelmingly localized in the donor layer, and not within a nearby buried Si well. This conclusion is supported by self-consistent Schr\"odinger-Poisson calculations that predict electron occupation primarily in the donor layer., Comment: 7 pages, 6 figures, to be submitted to Physical Review Materials. This work has been supported by the Division of Materials Sciences and Engineering, Office of Basic Energy Sciences, U.S. Department of Energy (DOE). This work was performed, in part, at the Center for Integrated Nanotechnologies, an Office of Science User Facility operated for the U.S. Department of Energy (DOE) Office of Science

We introduce a silicon metal-oxide-semiconductor quantum dot architecture based on a single polysilicon gate stack. The elementary structure consists of two enhancement gates separated spatially by a gap, one gate forming a reservoir and the other a quantum dot. We demonstrate, in three devices based on two different versions of this elementary structure, that a wide range of tunnel rates is attainable while maintaining single-electron occupation. A characteristic change in slope of the charge transitions as a function of the reservoir gate voltage, attributed to screening from charges in the reservoir, is observed in all devices, and is expected to play a role in the sizable tuning orthogonality of the split enhancement gate structure. The all-silicon process is expected to minimize strain gradients from electrode thermal mismatch, while the single gate layer should avoid issues related to overlayers (e.g., additional dielectric charge noise) and help improve yield. Finally, reservoir gate control of the tunnel barrier has implications for initialization, manipulation and readout schemes in multi-quantum dot architectures., Comment: v1: 11 pages, 3 extended data tables, 1 extended data figure, v2: 5 pages, 3 figures, 5 pages supplementary material, 3 extended data tables, 2 extended data figures. Reorganization of the paper structure, modification of the title, abstract and introduction and conclusion, no change to the results and main text figures

Using scanning tunneling microscopy (STM), we investigate oxide-induced growth pits in Si thin films deposited by molecular beam epitaxy. In the transition temperature range from 2D adatom islanding to step-flow growth, systematic controlled air leaks into the growth chamber induce pits in the growth surface. We show that pits are also correlated with oxygen-contaminated flux from Si sublimation sources. From a thermodynamic standpoint, multilayer growth pits are unexpected in relaxed homoepitaxial growth, whereas oxidation is a known cause for step pinning, roughening, and faceting on elemental surfaces, both with and without growth flux. Not surprisingly, pits are thermodynamically metastable and heal by annealing to recover a smooth periodic step arrangement. STM reveals new details about the pits' atomistic origins and growth dynamics. We give a model for heterogeneous nucleation of pits by preferential adsorption of {\AA}-sized oxide nuclei at intrinsic growth antiphase boundaries, and subsequent step pinning and bunching around the nuclei., Comment: 9 pages, 5 figures

Si-MOS based QD qubits are attractive due to their similarity to the current semiconductor industry. We introduce a highly tunable MOS foundry compatible qubit design that couples an electrostatic quantum dot (QD) with an implanted donor. We show for the first time coherent two-axis control of a two-electron spin qubit that evolves under the QD-donor exchange interaction and the hyperfine interaction with the donor nucleus. The two interactions are tuned electrically with surface gate voltages to provide control of both qubit axes. Qubit decoherence is influenced by charge noise, which is of similar strength as epitaxial systems like GaAs and Si/SiGe.

Despite their ubiquity in nanoscale electronic devices, the physics of tunnel barriers has not been developed to the extent necessary for the engineering of devices in the few-electron regime. This problem is of urgent interest, as this is the precise regime into which current, extreme-scale electronics fall. Here, we propose theoretically and validate experimentally a compact model for multi-electrode tunnel barriers, suitable for design-rules-based engineering of tunnel junctions in quantum devices. We perform transport spectroscopy at $T=4$ K, extracting effective barrier heights and widths for a wide range of biases, using an efficient Landauer-B\"uttiker tunneling model to perform the analysis. We find that the barrier height shows several regimes of voltage dependence, either linear or approximately exponential. The exponential dependence approximately correlates with the formation of an electron channel below an electrode. Effects on transport threshold, such as metal-insulator-transition and lateral confinement are non-negligible and included. We compare these results to semi-classical solutions of Poisson's equation and find them to agree qualitatively. Finally, we characterize the sensitivity of a tunnel barrier that is raised or lowered without an electrode being directly above the barrier region., Comment: 13 pages, 9 figures; removed comments from TeX source file, paper unchanged

Silicon-based metal-oxide-semiconductor quantum dots are prominent candidates for high-fidelity, manufacturable qubits. Due to silicon's band structure, additional low-energy states persist in these devices, presenting both challenges and opportunities. Although the physics governing these valley states has been the subject of intense study, quantitative agreement between experiment and theory remains elusive. Here, we present data from a new experiment probing the valley states of quantum dot devices and develop a theory that is in quantitative agreement with both the new experiment and a recently reported one. Through sampling millions of realistic cases of interface roughness, our method provides evidence that, despite radically different processing, the valley physics between the two samples is essentially the same. This work provides the first evidence that valley splitting can be deterministically predicted and controlled in metal oxide semiconductor quantum dots, a critical requirement for such systems to realize a reliable qubit platform., Comment: 7 pages, 4 figures

Enhancement-mode Si/SiGe electron quantum dots have been pursued extensively by many groups for \revEdit{their} potential in quantum computing. Most of the reported dot designs utilize multiple metal-gate layers and use Si/SiGe heterostructures with Ge concentration close to 30\%. Here we report the fabrication and low-temperature characterization of quantum dots in Si/Si$_{0.8}$Ge$_{0.2}$ heterostructures using only one metal-gate layer. We find that the threshold voltage of a channel narrower than 1 $\mu$m increases as the width decreases. The higher threshold can be attributed to the combination of quantum confinement and disorder. We also find that the lower Ge ratio used here leads to a narrower operational gate bias range. The higher threshold combined with the limited gate bias range constrains the device design of lithographic quantum dots. We incorporate such considerations in our device design and demonstrate a quantum dot that can be tuned from a single dot to a double dot. The device uses only a single metal-gate layer, greatly simplifying device design and fabrication.

Deterministic control over the location and number of donors is crucial to donor spin quantum bits (qubits) in semiconductor based quantum computing. In this work, a focused ion beam is used to implant antimony donors close to quantum dots. Ion detectors are integrated next to the quantum dots to sense the implants. The numbers of donors implanted can be counted to a precision of a single ion. In low-temperature transport measurements, regular coulomb blockade is observed from the quantum dots. Charge offsets indicative of donor ionization are also observed in devices with counted donor implants.

We examine a silicon-germanium heterojunction bipolar transistor (HBT) for cryogenic pre-amplification of a single electron transistor (SET). The SET current modulates the base current of the HBT directly. The HBT-SET circuit is immersed in liquid helium, and its frequency response from low frequency to several MHz is measured. The current gain and the noise spectrum with the HBT result in a signal-to-noise-ratio (SNR) that is a factor of 10-100 larger than without the HBT at lower frequencies. The transition frequency defined by SNR = 1 has been extended by as much as a factor of 10 compared to without the HBT amplification. The power dissipated by the HBT cryogenic pre-amplifier is approximately 5 nW to 5 {\mu}W for the investigated range of operation. The circuit is also operated in a single electron charge read-out configuration in the time-domain as a proof-of-principle demonstration of the amplification approach for single spin read-out., Comment: Reprinted with permission from M. J. Curry, et alii. Copyright 2015, AIP Publishing LLC. This article may be downloaded for personal use only. Any other use requires prior permission of the author and the AIP Publishing LLC. 5 pages, 4 figures

We present transport measurements of silicon MOS split gate structures with and without Sb implants. We observe classical point contact (PC) behavior that is free of any pronounced unintentional resonances at liquid He temperatures. The implanted device has resonances superposed on the point contact transport indicative of transport through the Sb donors. We fit the differential conductance to a rectangular tunnel barrier model with a linear barrier height dependence on source-drain voltage and non-linear dependence on gate bias. Effects such as Fowler-Nordheim (FN) tunneling and image charge barrier lowering (ICBL) are considered. Barrier heights and widths are estimated for the entire range of relevant biases. The barrier heights at the locations of some of the resonances for the implanted tunnel barrier are between 15-20 meV, which are consistent with transport through shallow partially hybridized Sb donors. The dependence of width and barrier height on gate voltage is found to be linear over a wide range of gate bias in the split gate geometry but deviates considerably when the barrier becomes large and is not described completely by standard 1D models such as FN or ICBL effects., Comment: 9 pages, 3 figures

We show that a scanning capacitance microscope (SCM) can image buried delta-doped donor nanostructures fabricated in Si via a recently developed atomic-precision scanning tunneling microscopy (STM) lithography technique. A critical challenge in completing atomic-precision nanoelectronic devices is to accurately align mesoscopic metal contacts to the STM defined nanostructures. Utilizing the SCMs ability to image buried dopant nanostructures, we have developed a technique by which we are able to position metal electrodes on the surface to form contacts to underlying STM fabricated donor nanostructures with a measured accuracy of 300 nm. Low temperature (T=4K) transport measurements confirm successful placement of the contacts to the donor nanostructures., Comment: The first two listed authors contributed equally to this work

Recently, a single atom transistor was deterministically fabricated using phosphorus in Si by H-desorption lithography with a scanning tunneling microscope (STM). This milestone in precision, achieved by operating the STM in the conventional tunneling mode, typically utilizes very slow ($\sim\!10^2~\mathrm{nm^2/s}$) patterning speeds. By contrast, using the STM in a high voltage ($>10~\mathrm{V}$) field emission mode, patterning speeds can be increased by orders of magnitude to $\gtrsim\!10^4~\mathrm{nm^2/s}$. We show that the rapid patterning negligibly affects the functionality of relatively large micron-sized features, which act as contacting pads on these devices. For nanoscale structures, we show that the resulting transport is consistent with the donor incorporation chemistry enhancing the device definition to a scale of $10~\mathrm{nm}$ even though the pattering spot size is $40~\mathrm{nm}$.

In this paper, we will review the process of evidence accumulation in the PSEIKI system for expectation-driven interpretation of images of 3-D scenes. Expectations are presented to PSEIKI as a geometrical hierarchy of abstractions. PSEIKI's job is then to construct abstraction hierarchies in the perceived image taking cues from the abstraction hierarchies in the expectations. The Dempster-Shafer formalism is used for associating belief values with the different possible labels for the constructed abstractions in the perceived image. This system has been used successfully for autonomous navigation of a mobile robot in indoor environments., Comment: Appears in Proceedings of the Fifth Conference on Uncertainty in Artificial Intelligence (UAI1989)

We present an electron spin resonance (ESR) approach to characterize shallow electron trapping in band-tail states at Si/SiO2 interfaces in metal-oxide-semiconductor (MOS) devices and demonstrate it on two MOS devices fabricated at different laboratories. Despite displaying similar low temperature (4.2 K) peak mobilities, our ESR data reveal a significant difference in the Si/SiO2 interface quality of these two devices, specifically an order of magnitude difference in the number of shallow trapped charges at the Si/SiO2 interfaces. Thus, our ESR method allows a quantitative evaluation of the Si/SiO2 interface quality at low electron densities, where conventional mobility measurements are not possible., Comment: 6 pages, 3 figures

Electrons floating on the surface of superfluid helium have been suggested as promising mobile spin qubits. Three micron wide channels fabricated with standard silicon processing are filled with superfluid helium by capillary action. Photoemitted electrons are held by voltages applied to underlying gates. The gates are connected as a 3-phase charge-coupled device (CCD). Starting with approximately one electron per channel, no detectable transfer errors occur while clocking $10^9$ pixels. One channel with its associated gates is perpendicular to the other 120, providing a CCD which can transfer electrons between the others. This perpendicular channel has not only shown efficient electron transport but also serves as a way to measure the uniformity of the electron occupancy in the 120 parallel channels.

Unprecedented transport efficiency is demonstrated for electrons on the surface of micron-scale superfluid helium filled channels by co-opting silicon processing technology to construct the equivalent of a charge-coupled device (CCD). Strong fringing fields lead to undetectably rare transfer failures after over a billion cycles in two dimensions. This extremely efficient transport is measured in 120 channels simultaneously with packets of up to 20 electrons, and down to singly occupied pixels. These results point the way towards the large scale transport of either computational qubits or electron spin qubits used for communications in a hybrid qubit system.

We propose and demonstrate a relaxed-SiGe/strained-Si (SiGe/s-Si) enhancement-mode gate stack for quantum dots. The enhancement-mode SiGe/s-Si structure is pursued because it spaces the quantum dot away from charge and spin defect rich dielectric interfaces and minimizes background dopants. A mobility of 1.6\times10^5 cm^2/Vs at 5.8\times10^{11}/cm^2 is measured in Hall bars that witness the same device process flow as the quantum dot. Periodic Coulomb blockade (CB) is measured in a double-top-gated lateral quantum dot nanostructure. The CB terminates with open diamonds up to \pm 10 mV of DC voltage across the device. The devices were fabricated within a 150 mm Si foundry setting that uses implanted ohmics and chemical-vapor-deposited dielectrics, in contrast to previously demonstrated enhancement-mode SiGe/s-Si structures made with AuSb alloyed ohmics and atomic-layer-deposited dielectric. A modified implant, polysilicon formation and annealing conditions were utilized to minimize the thermal budget so that the buried s-Si layer would not be washed out by Ge/Si interdiffusion., Comment: 4 pages, 3 figures

We present transport measurements of a tunable silicon metal-oxide-semiconductor double quantum dot device with lateral geometry. Experimentally extracted gate-to-dot capacitances show that the device is largely symmetric under the gate voltages applied. Intriguingly, these gate voltages themselves are not symmetric. Comparison with numerical simulations indicates that the applied gate voltages serve to offset an intrinsic asymmetry in the physical device. We also show a transition from a large single dot to two well isolated coupled dots, where the central gate of the device is used to controllably tune the interdot coupling., Comment: 4 pages, 3 figures, to be published in Applied Physics Letters

Compact modeling of MOSFETs from a 0.35 micron SOI technology node operating at 4 K is presented. The Verilog-A language is used to modify device equations for BSIM models and more accurately reproduce measured DC behavior, which is not possible with the standard BSIM model set. The Verilog-A approach also allows the embedding of nonlinear length, width and bias effects into BSIM calculated curves beyond those that can be achieved by the use of different BSIM parameter sets. Nonlinear dependences are necessary to capture effects particular to 4 K behavior, such as current kinks. The 4 K DC behavior is reproduced well by the compact model and the model seamlessly evolves during simulation of circuits and systems as the simulator encounters SOI MOSFETs with different lengths and widths. The incorporation of various length/width and bias dependent effects into one Verilog-A / BSIM4 library, therefore, produces one model for all sets of devices for this technology node.

Quantum dot (QD) lay-outs are becoming more complex as the technology is being applied to more complex multi-QD structures. This increase in complexity requires improved capacitance modeling both for design and accurate interpretation of QD properties from measurement. A combination of process simulation, electrostatic simulation, and computer assisted design (CAD) lay-out packages are used to develop a three dimensional (3D) classical capacitance model. The agreement of the capacitances of the classical model is tested against two different, experimentally measured, topographically complex silicon QD geometries. Agreement with experiment, within 10-20%, is demonstrated for the two structures when the details of the structure are transferred from the CAD to the model capturing the full 3D topography. Small uncertainty in device dimensions due to uncontrolled variation in processing, like layer thickness and gate size, are calculated to be sufficient to explain the disagreement. The sensitivity of the capacitances to small variations in the structure also highlights the limits of accuracy of capacitance models for QD analysis. We furthermore observe that a critical density, the metal insulator transition, can be used as a good approximation of the metallic edge of the quantum dot when electron density in the dot is calculated directly with a semi-classical simulation.

Electronic devices that are designed to use the properties of single atoms such as donors or defects have become a reality with recent demonstrations of donor spectroscopy, single photon emission sources, and magnetic imaging using defect centers in diamond. Improving single ion detector sensitivity is linked to improving control over the straggle of the ion as well as providing more flexibility in lay-out integration with the active region of the single donor device construction zone by allowing ion sensing at potentially greater distances. Using a remotely located passively gated single ion Geiger mode avalanche diode (SIGMA) detector we have demonstrated 100% detection efficiency at a distance of >75 um from the center of the collecting junction. This detection efficiency is achieved with sensitivity to ~600 or fewer electron-hole pairs produced by the implanted ion. Ion detectors with this sensitivity and integrated with a thin dielectric, for example 5 nm gate oxide, using low energy Sb implantation would have an end of range straggle of <2.5 nm. Significant reduction in false count probability is achieved by modifying the ion beam set-up to allow for cryogenic operation of the SIGMA detector. Using a detection window of 230 ns at 1 Hz, the probability of a false count was measured as 1E-1 and 1E-4 for operation temperatures of 300K and 77K, respectively. Low temperature operation and reduced false, dark, counts are critical to achieving high confidence in single ion arrival. For the device performance in this work, the confidence is calculated as a probability of >98% for counting one and only one ion for a false count probability of 1E-4 at an average ion number per gated window of 0.015., Comment: 10 pages, 5 figures, submitted to Nanotechnology

Laterally coupled charge sensing of quantum dots is highly desirable, because it enables measurement even when conduction through the quantum dot itself is suppressed. In this work, we demonstrate such charge sensing in a double top gated MOS system. The current through a point contact constriction integrated near a quantum dot shows sharp 2% changes corresponding to charge transitions between the dot and a nearby lead. We extract the coupling capacitance between the charge sensor and the quantum dot, and we show that it agrees well with a 3D capacitance model of the integrated sensor and quantum dot system., Comment: 4 Pages, 3 Figures

Achieving low-error, exchange-interaction operations in quantum dots for quantum computing imposes simultaneous requirements on the exchange energy's dependence on applied voltages. A double quantum dot (DQD) qubit, approximated with a quadratic potential, is solved using a full configuration interaction method. This method is more accurate than Heitler-London and Hund-Mulliken approaches and captures new and significant qualitative behavior. We show that multiple regimes can be found in which the exchange energy's dependence on the bias voltage between the dots is compatible with current quantum error correction codes and state-of-the-art electronics. Identifying such regimes may prove valuable for the construction and operation of quantum gates that are robust to charge fluctuations, particularly in the case of dynamically corrected gates., Comment: 8 pages, 6 figures

We present measurements of silicon (Si) metal-oxide-semiconductor (MOS) nanostructures that are fabricated using a process that facilitates essentially arbitrary gate geometries. Stable Coulomb blockade behavior free from the effects of parasitic dot formation is exhibited in several MOS quantum dots with an open lateral quantum dot geometry. Decreases in mobility and increases in charge defect densities (i.e. interface traps and fixed oxide charge) are measured for critical process steps, and we correlate low disorder behavior with a quantitative defect density. This work provides quantitative guidance that has not been previously established about defect densities for which Si quantum dots do not exhibit parasitic dot formation. These devices make use of a double-layer gate stack in which many regions, including the critical gate oxide, were fabricated in a fully-qualified CMOS facility., Comment: 11 pages, 6 figures, 3 tables, accepted for publication in Phys. Rev. B

By analyzing the temperature ($T$) and density ($n$) dependence of the measured conductivity ($\sigma$) of 2D electrons in the low density ($\sim10^{11}$cm$^{-2}$) and temperature (0.02 - 10 K) regime of high-mobility (1.0 and 1.5 $\times 10^4$ cm$^2$/Vs) Si MOSFETs, we establish that the putative 2D metal-insulator transition is a density-inhomogeneity driven percolation transition where the density-dependent conductivity vanishes as $\sigma (n) \propto (n - n_p)^p$, with the exponent $p \sim 1.2$ being consistent with a percolation transition. The `metallic' behavior of $\sigma (T)$ for $n > n_p$ is shown to be well-described by a semi-classical Boltzmann theory, and we observe the standard weak localization-induced negative magnetoresistance behavior, as expected in a normal Fermi liquid, in the metallic phase., Comment: 6 pages, 5 figures; extended version (accepted to Phys. Rev. B)