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Graphical abstract Abstract Despite great potential and extensive interest in developing biomolecule-based computing, the development of even basic molecular logic gates is still in its infancy. Digital comparator (DC) is the basic unit in traditional electronic computers, but it is difficult to construct a system for achieving large-scale integration. Here, we construct, for the first time, a novel logic computing system of DCs that can compare whether two or more numbers are equal. Our approach is by taking advantage of facile preparation and unique properties of graphene oxide and DNA. The DC system reported in this work is developed by the DNA hybridization and effective combination of GO and single-stranded DNA, which is regarded as the reacting platform. On the basis of this platform and reaction principle, we have developed 2-inputs, 3-inputs, and 4-inputs DCs to realize the comparison of two or more binary numbers. We predict that such a state-of-the-art logic system enables its functionality with large-scale input signals, providing a new direction toward prototypical DNA-based logic operations and promoting the development of advanced logic computing. Statement of Significance The overarching objective of this paper is to explore the construction of a novel DNA computing system of digital comparator driven by the interaction of DNA and graphene oxide (GO). GO can efficient bind the dye-labeled, single-stranded DNA probe and then quench its fluorescence. In the case of the target appearing, specific binding between the single-stranded probe and its target occurs, changing the conformation and relationship with GO, then restoring the fluorescence of the dye. We have developed the 2-inputs, 3-inputs, and 4-inputs digital comparator circuits, which are expected to realize the comparison of large-scale input signals and can avoid the problems of design complexity and manufacturing cost of integrated circuits in traditional computing. [ABSTRACT FROM AUTHOR]

Recently there has been remarkable advances in computer-aided diagnosis (CAD) system development for detection of the pathological brain through MR images. Feature extractors like wavelet and its variants, and classifiers like feed-forward neural network (FNN) and support vector machine (SVM) are very often used in these systems despite the fact that they suffer from many limitations. This paper presents an efficient and improved pathological brain detection system (PBDS) that overcomes the problems faced by other PBDSs in the recent literature. First, we support the use of contrast limited adaptive histogram equalization (CLAHE) to enhance the quality of the input MR images. Second, we use discrete ripplet-II transform (DR2T) with degree 2 as the feature extractor. Third, in order to reduce the huge number of coefficients obtained from DR2T, we employ PCA+LDA approach. Finally, an improved hybrid learning algorithm called MPSO-ELM has been proposed that combines modified particle swarm optimization (MPSO) and extreme learning machine (ELM) for segregation of MR images as pathological or healthy. In MPSO-ELM, MPSO is utilized to optimize the hidden node parameters (input weights and hidden biases) of single-hidden-layer feedforward neural networks (SLFN) and the output weights are determined analytically. The proposed method is contrasted with the current state-of-the-art methods on three benchmark datasets. Experimental results indicate that our proposed scheme brings potential improvements in terms of classification accuracy and number of features. Additionally, it is observed that the proposed MPSO-ELM algorithm achieves higher accuracy and obtains compact network architecture compared to conventional ELM and BPNN classifier. [ABSTRACT FROM AUTHOR]

Fast and accurate performance and power prediction is a key challenge in pre-silicon design evaluations during the early phases of hardware and software co-development. Performance evaluation using full-system simulation is prohibitively slow, especially with real world applications. By contrast, analytical models are not sufficiently accurate or still require target-specific execution statistics that may be slow or difficult to obtain. In this paper, we present LACross, a learning-based cross-platform prediction technique aimed at predicting the time-varying performance and power of a benchmark on a target platform using hardware counter statistics obtained while running natively on a host platform. We employ a fine-grained phase-based approach, where the learning algorithm synthesizes analytical proxy models that predict the performance and power of the workload in each program phase from performance statistics obtained on the host. Our learning approach relies on a one-time training phase using a target reference model or real hardware. We train our models on less than 160 programs from the ACM ICPC database, and demonstrate prediction accuracy and speed on 35 programs from SPEC CPU2006, MiBench and SD-VBS benchmark suites. Results show that with careful choice of phase granularity, we can achieve on average over 97% performance and power prediction accuracy at simulation speeds of over 500 MIPS. [ABSTRACT FROM AUTHOR]

Wireless Sensor Network is playing a crucial role in daily life because of its distributed sensing ability in combination with wireless communication techniques and self-organising deployment approaches. To satisfy requirements of easily matching diversified dynamic sensing applications and highly heterogeneous sensor platforms from perspective of logistics, a low budget but high-efficient wireless sensor network middleware is in dire need. To maximise commercial benefits, a WSN middleware is designed in order to increase efficacy and return on investment. This paper presents a design of an inventive mobile agent-based middleware, which could optimally achieve the intensive requirements of a WSN middleware. The middleware proposed in this paper has considered resources limitation issues that are commonly addressed on normal sensor nodes, meanwhile it provides a possibility of platform independence as well as programming language independence. In addition, a mobile agentbased system can reduce network payload and dynamically adapt to environmental changes. Therefore, the middleware presented in this paper has ability of perceiving changes in operating environment and ability to automatically response to these changes. [ABSTRACT FROM AUTHOR]

Morality is a fundamentally human trait that permeates all levels of human society, from basic etiquette and normative expectations of social groups, to formalized legal principles upheld by societies. Hence, future interactive AI systems, in particular, cognitive systems on robots deployed in human settings, will have to meet human normative expectations, for otherwise these system risk causing harm. While the interest in machine ethics has increased rapidly in recent years, there are only very few current efforts in the cognitive systems community to investigate moral and ethical reasoning. And there is currently no cognitive architecture that has even rudimentary moral or ethical competence, that is, the ability to judge situations based on moral principles such as norms and values and make morally and ethically sound decisions. We hence argue for the urgent need to instill moral and ethical competence in all cognitive system intended to be employed in human social contexts. [ABSTRACT FROM AUTHOR]

The Companion cognitive architecture is aimed at reaching human-level AI by creating software social organisms -- systems that interact with people using natural modalities, working and learning over extended periods of time as collaborators rather than tools. Our two central hypotheses about how to achieve this are (1) analogical reasoning and learning are central to cognition, and (2) qualitative representations provide a level of description that facilitates reasoning, learning, and communication. This article discusses the evidence we have gathered supporting these hypotheses from our experiments with the Companion architecture. Although we are far from our ultimate goals, these experiments provide strong evidence for the utility of analogy and qualitative representation across a range of tasks. We also discuss three lessons learned and highlight three important open problems for cognitive systems research more broadly. [ABSTRACT FROM AUTHOR]

This paper addresses the methodological problem of analysing what it is to explain observed behaviours of engineered computing systems (BECS), focusing on the crucial role that abstraction and idealization play in explanations of both correct and incorrect BECS. First, it is argued that an understanding of explanatory requests about observed miscomputations crucially involves reference to the rich background afforded by hierarchies of functional specifications. Second, many explanations concerning incorrect BECS are found to abstract away (and profitably so on account of both relevance and intelligibility of the explanans) from descriptions of physical components and processes of computing systems that one finds below the logic circuit and gate layer of functional specification hierarchies. Third, model-based explanations of both correct and incorrect BECS that are provided in the framework of formal verification methods often involve idealizations. Moreover, a distinction between restrictive and permissive idealizations is introduced and their roles in BECS explanations are analysed. [ABSTRACT FROM AUTHOR]

Purpose This paper attempts to apply complex theory in futures studies and addresses prediction challenges when the system is complex. The purpose of the research is to design a framework to engineer the futures in complex systems where components are divers and inter-related. Relations cannot be interpreted by cause and effect concept.Design/methodology/approach First, the authors shaped a conceptual framework based on engineering, complex theory and uncertainty. To extract tacit knowledge of experts, an online questionnaire was developed. To validate the proposed framework, a workshop method was adapted with NetLogo simulation.Findings Opinion of participants in the workshop which is collected through quantitative questionnaire shows that the framework helps us in understanding and shaping scenarios. Harnessing the complexity in developing the futures was the main objective of this paper with the proposed framework which has been realized based on the experience gained from the workshop.Originality/value Iterative processes are very important to harness the complexity in systems with uncertainty. The novelty of the research is a combination of engineering achievements in terms of computation, simulation and applying tools with futures studies methods. [ABSTRACT FROM AUTHOR]

The article discusses the newly developed online web interface to make lymphatic filariasis transmission model TRANSFIL accessible to end-users. Topics include the challenges facing the development of user-friendly interfaces to complex transmission models, the aims of the interface, and the technical advancements used in the model and interface such as JavaScript, HTML5 and CSS3.

The shift to the in-memory data processing paradigm has had a major influence on the development of cluster data processing frameworks. Numerous frameworks from the industry, open source community and academia are adopting the in-memory paradigm to achieve functionalities and performance breakthroughs. However, despite the advantages of these in-memory frameworks, in practice they are susceptible to memory-pressure related performance collapse and failures. The contributions of this paper are two-fold. First, we conduct a detailed diagnosis of the memory pressure problem and identify three preconditions for the performance collapse. These preconditions not only explain the problem but also shed light on the possible solution strategies. Second, we propose a novel programming abstraction called the leaky buffer that eliminates one of the preconditions, thereby addressing the underlying problem. We have implemented a leaky buffer enabled hashtable in Spark, and we believe it is also able to substitute the hashtable that performs similar hash aggregation operations in any other programs or data processing frameworks. Experiments on a range of memory intensive aggregation operations show that the leaky buffer abstraction can drastically reduce the occurrence of memory-related failures, improve performance by up to 507 percent and reduce memory usage by up to 87.5 percent. [ABSTRACT FROM PUBLISHER]

This article proposes Hefestos, an intelligent system applied to ubiquitous accessibility. This model uses ubiquitous computing concepts to manage accessibility resources for people with disabilities. Among the concepts employed, context awareness, user profiles and trails management can be highlighted. The paper proposes an ontology for accessibility and delineates scenarios of its application in everyday life of people with disabilities. Moreover, the implementation of a smart wheelchair prototype and its application in a practical experiment is described. Ten users with a range of disability degrees tried the system and filled out a survey based on the technology acceptance model. This experiment demonstrated the main functionalities and the acceptance of the system. The results showed 96 % of acceptance regarding perceived easy of use and 98 % in perceived usefulness. These results were encouraging and show the potential for implementing Hefestos in real life situations. [ABSTRACT FROM AUTHOR]

This paper reviews objective measurement of usage in user acceptance studies using the technology acceptance model (TAM). The use of objective measurement is quite uncommon in TAM. In addition to its low frequency, another striking phenomenon is the way objective measurement is used. Namely, only a minor potential of the information available is typically used, and, for example, the temporal aspect (changes in time) is almost always neglected. The paper describes the TAM studies where objective measurement of usage has been utilized and ponders the way objective measurements are taken. The ultimate goal of the paper is to improve objective measures used in TAM studies. To this end, several suggestions are given. [ABSTRACT FROM AUTHOR]

Upcoming reconfigurable Multiprocessor Systems-on-Chip (MPSoCs) present new challenges for the design and early estimation of technology requirements due to their runtime adaptive hardware architecture. The usage of simulators offers capabilities to overcome these issues. In this article, MPSoCSim, a SystemC simulator for Network-on-Chip (NoC) based MPSoCs is extended to support the simulation of reconfigurable MPSoCs. Processors, such as ARM and MicroBlaze, and peripheral models used within the virtual platform are provided by Imperas/OVP and attached to the NoC. Moreover, traffic generators are available to analyze the system. The virtual platform currently supports mesh topology with wormhole switching and several routing algorithms such as XY-, a minimal West-First algorithm, and an adaptive West-First algorithm. Amongst the impact of routing algorithms regarding performance, reconfiguration processes can be examined using the presented simulator. A mechanism for dynamic partial reconfiguration is implemented that is oriented towards the reconfiguration scheme on real FPGA platforms. It includes the simulation of the undefined behavior of the hardware region during reconfiguration and allows the adjustment of parameters. During runtime, dynamic partial reconfiguration interfaces are used to connect the Network-on-Chip infrastructure with reconfigurable regions. The configuration access ports can be modeled by the controller for the dynamic partial reconfiguration in form of an application programming interface. An additional SystemC component enables the readout of simulation time from within the application. For evaluation of the simulator timing and power consumption of the simulated hardware are estimated and compared with a real hardware implementation on a Xilinx Zynq FPGA. The comparison shows that the simulator improves the development of reconfigurable MPSoCs by early estimation of system requirements. The power estimations show a maximum deviation of 9mW at 1.9W total power consumption. [ABSTRACT FROM AUTHOR]

Architectural heterogeneity has proven to be an effective design paradigm to cope with an ever-increasing demand for computational power within tight energy budgets, in virtually every computing domain. Programmable manycore accelerators are currently widely used not only in high-performance computing systems, but also in embedded devices, in which they operate as coprocessors under the control of a general-purpose CPU (the host processor). Clearly, such powerful hardware architectures are paired with sophisticated and complex software ecosystems, composed of operating systems, programming models plus associated runtime engines, and increasingly complex user applications with related libraries. System modeling has always played a key role in early architectural exploration or software development when the real hardware is not available. The necessity of efficiently coping with the huge HW/SW design space provided by the described heterogeneous Systems on Chip (SoCs) calls for advanced full-system simulation methodologies and tools, capable of assessing variousmetrics for the functional and nonfunctional properties of the target system. In this article, we describe VirtualSoC, a simulation tool targeting the full-system simulation of massively parallel heterogeneous SoCs. We also describe how VirtualSoC has been successfully adopted in several research projects. [ABSTRACT FROM AUTHOR]

Design and control of computer systems that operate in uncertain, competitive or adversarial, environments can be facilitated by formal modelling and analysis. In this paper, we focus on analysis of complex computer systems modelled as turn-based 2 1 2 -player games, or stochastic games for short, that are able to express both stochastic and non-stochastic uncertainties. We offer a systematic overview of the body of knowledge and algorithmic techniques for verification and strategy synthesis for stochastic games with respect to a broad class of quantitative properties expressible in temporal logic. These include probabilistic linear-time properties, expected total, discounted and average reward properties, and their branching-time extensions and multi-objective combinations. To demonstrate applicability of the framework as well as its practical implementation in a tool called PRISM-games, we describe several case studies that rely on analysis of stochastic games, from areas such as robotics, and networked and distributed systems. [ABSTRACT FROM AUTHOR]

Control charting cyber vulnerabilities is challenging because the same vulnerabilities can remain from period to period. Also, hosts (personal computers, servers, printers, etc.) are often scanned infrequently and can be unavailable during scanning. To address these challenges, control charting of the period-to-period demerits per host using a hybrid moving centerline residual-based and adjusted demerit (MCRAD) chart is proposed. The intent is to direct limited administrator resources to unusual cases when automatic patching is insufficient. The proposed chart is shown to offer superior average run length performance compared with three alternative methods from the literature. The methods are illustrated using three datasets. [ABSTRACT FROM PUBLISHER]

Dynamic memory management is an important and essential part of computer systems design. Efficient memory allocation, garbage collection, and compaction are becoming critical in parallel and distributed applications using object oriented languages like C++ and Java. In addition to achieving fast allocation/de-allocation of memory objects and fragmentation, memory management techniques should strive to improve the overall execution performance of object oriented applications. In this paper, we introduce Address Ordered and Segregated Binary Trees, two memory management techniques particularly efficient for object oriented applications. Our empirical results manifest that both ABT and SBT, when accompanied by coalescing, outperform the existing allocators such as Segregated free lists in terms of storage utilization and execution performance. We also show that these new allocators perform well in terms of storage utilization, even without coalescing. This is in particular suitable for web-applications. [ABSTRACT FROM AUTHOR]

The CADE ATP System Competition (CASC) is an annual evaluation of fully automatic, classical logic Automated Theorem Proving (ATP) systems. CASC-25 was the twentieth competition in the CASC series. Twenty-seven ATP systems and system variants competed in the various competition divisions. An outline of the competition design, and a commentated summary of the results, are presented. [ABSTRACT FROM AUTHOR]

The article presents a speech by Sheng Li of the Harbin Institute of Technology delivered at the Association for Computational Linguistics (ACL) conference held in Beijing, China in 2015. Topics of the speech included the history and emergence of machine translation (MT) in China, the development of the DEAR computer-aided translation system, and the release of the Language Technology Platform (LTP) open-source natural language processing (NLP) system.

The information is important in every decision area. The Big Data philosophy lead to collect every possible data. Nowadays these applications are more and more successful in the following agricultural areas: different parts of food industry, extension services, precision agriculture. While studying the use of these new ICT technologies can be concluded that different types of services offer different possibilities. Firstly we compared the possible mainboards and sensors. General information about the existing mobile main boards. We compared the Atmel AVR, the Raspberry PI and the LEGO Mindstorms NXT. We choosed the Arduino system board. We described the main system architecture and connection possibilites. We found the temperature sensor widely useable. The software was also briefly mentioned. We can say there are several advantages of the Arduino. The whole system can be upgradeable, and there are several Arduino based mainboards and sensors too. Nowadays the block programming support are increasing (etc. MIT Appinventor), but there are disadvantages too. The system has several limitation: the number of the connected sensor, the connection type, the system energy supply, the data loss, the creation of user friendly interface and the system failure tolerability. [ABSTRACT FROM AUTHOR]

This manuscript proposes a novel viewpoint on computing systems’ modelling. The classical approach is to consider fully functional systems and model them, aiming at closing some external loops to optimize their behaviour. On the contrary, we only model strictly physical phenomena, and realize the rest of the system as a set of controllers. Such an approach permits rigorous assessment of the obtained behaviour in mathematical terms, which is hardly possible with the heuristic design techniques, that were mainly adopted to date. The proposed approach is shown at work with three relevant case studies, so that a significant generality can be inferred from it. [ABSTRACT FROM PUBLISHER]

The process algebras Timed Mobility ( TiMo) and its extension Permissions, Timers and Mobility ( PerTiMo) were recently proposed to support engineering applications in distributed system design. TiMo provides a formal framework in which process migration between distinct locations and timing constraints linked to local clocks can be modelled and analysed. This is extended in PerTiMo by associating access permissions to communication to model security aspects of a distributed system. In this paper we develop a new semantic model for TiMo using Rewriting Logic (RL) and strategies, with the aim of providing a foundation for tool support; in particular, strategies are used to capture the locally maximal concurrent step of a TiMo specification which previously required the use of action rules based on negative premises. This RL model is then extended with access permissions in order to develop a new semantic model for PerTiMo. These RL semantical models are formally proved to be sound and complete with respect to the original operational semantics on which they were based. We present examples of how the developed RL models for TiMo and PerTiMo can be implemented within the strategy-based rewriting system Elan and illustrate the range of (behavioural) properties that can be analysed using such a tool. [ABSTRACT FROM AUTHOR]

Recently, a two-factor authenticated key agreement scheme for session initiation protocol is published by Lu et al. in Multimedia Tools and Applications [doi:10.1007/s11042-015-3166-4]. I have examined this scheme and found some design flaws in it. Due to flaw in registration phase, the scheme is vulnerable to guessing attacks. However, flaws during key agreement phase hinder the functionality of the scheme in such a way that mutual authentication process between the user and the server is not viable. [ABSTRACT FROM AUTHOR]