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The number of Internet-of-Things (IoT) devices has been increasing rapidly every year. Most of these devices have access to important personal data such as health, daily activities, location, and finance. However, these devices have security problems since they have limited processing power and memory to implement complex security measures. Therefore, they possess weak authentication mechanisms and a lack of encryption. Additionally, there are no widely accepted standards for IoT security. Device Identifier Composition Engine (DICE) was proposed as a standard that enables adding a security layer to low-cost microcontrollers with minimal silicon overhead. However, previous studies show that DICE-based attestation is vulnerable to some remote attacks. In this study, we present a novel method called DICEguard to address the security problems of DICE. One of the key innovations of DICEguard is its incorporation of periodic memory forensics (PMF) technique, leveraging a hardware-based hash engine to detect and mitigate potential security breaches resulting from firmware vulnerabilities. DICEguard enhances the overall resilience of IoT devices against attacks by swiftly detecting alterations indicative of malicious activity through periodic calculation and comparison of firmware digests. Furthermore, DICEguard introduces a one-time programmable (OTP) memory component to safeguard critical security parameters, such as public keys used for signature verification, against tampering by adversaries. This ensures the integrity of essential security measures even in the face of sophisticated attacks. We implemented the enhanced DICE architecture using the open-source RISC-V platform Ibex and the mbedTLS library for cryptographic operations. We performed the hash operations required by DICE in a hardware-based manner on a commercial Field Programmable Gate Array (FPGA) platform rather than firmware, which is more vulnerable to attacks. Our test results show that with negligible area overhead to a standard microcontroller system, the proposed method can detect the simulated attacks. [ABSTRACT FROM AUTHOR]

A complete low-power, low-cost and wireless solution for bridge structural health monitoring is presented. This work includes monitoring nodes with modular hardware design and low power consumption based on a control and resource management board called CoreBoard, and a specific board for sensorization called SensorBoard is presented. The firmware is presented as a design of FreeRTOS parallelised tasks that carry out the management of the hardware resources and implement the Random Decrement Technique to minimize the amount of data to be transmitted over the NB-IoT network in a secure way. The presented solution is validated through the characterization of its energy consumption, which guarantees an autonomy higher than 10 years with a daily 8 min monitoring periodicity, and two deployments in a pilot laboratory structure and the Eduardo Torroja bridge in Posadas (Córdoba, Spain). The results are compared with two different calibrated commercial systems, obtaining an error lower than 1.72% in modal analysis frequencies. The architecture and the results obtained place the presented design as a new solution in the state of the art and, thanks to its autonomy, low cost and the graphical device management interface presented, allow its deployment and integration in the current IoT paradigm. [ABSTRACT FROM AUTHOR]

Projections for future air mobility envisage intensely utilized airspace that does not simply scale up from existing systems with centralized air traffic control. This paper considers the implementation and test of a software and hardware framework for decentralized control of aerial vehicles within intensely used airspace. Up to 10 rotary wing vehicles of maximum all up mass of 1 kg are flown in an outdoor volume with length scale of 100 m with GPS and WiFi connectivity. Flight control is implemented using a Pixhawk 4 flight controller running the PX4 firmware with guidance algorithms run on a separate onboard companion computer. Deconfliction is implemented using a simple elastic repulsion model with a guidance update rate of 10 Hz . Traffic structures are constructed from a path of directed waypoints and associated cross sectional geometry. Junctions are implemented when two paths converge into one or when one path diverges into two. Agents engage with structures through execution of flow, merge and swirl velocity rules. Calibration experiments showed that the worst case latency in agents sharing position information was of the order of 0.5 s made up from delays due to finite guidance update rate, WiFi processing and centralized message processing. A choice of vehicle cruise speed of 2 m∕s and conflict radius of 2.5 m provided an acceptable compromise between experiment time efficiency (speed) and spatial efficiency (resolution) within the test volume. Results from recirculating junction experiments show that peak deconfliction activity occurs at the junction node, however biased distribution of agents within a corridor means the peak intensity is pushed ahead of the node. Use of meshed helical junction structures significantly reduces the intensity of conflict at the expense of reduced junction time efficiency. [ABSTRACT FROM AUTHOR]

The rapid evolution of network communication technologies has led to the emergence of new forms of malware and cybercrimes, posing significant threats to user safety, network infrastructure integrity, and data privacy. Despite efforts to develop advanced algorithms for detecting malicious activity, constructing models that are both accurate and reliable remains a challenge, especially in handling vast and dynamically shifting data patterns. The prevalent bag-of-words (BOW) method, while widely used, falls short in capturing crucial spatial and sequence information vital for detecting malware patterns. To address this challenge, the work presented in this paper proposes hybrid convolution neural network-long short-term memory network (CNN-LSTM) combination models, leveraging CNN's spatial information extraction and LSTM's temporal modeling capabilities. Focused on predicting the infiltration of malicious software into personal computers, the proposed hybrid CNN-LSTM model considers factors such as location, firmware version, operating system, and anti-virus software. The proposed models undergo training and evaluation using Microsoft's malware dataset, demonstrating superior performance compared to traditional CNN and LSTM models. The CNN-LSTM model achieves an impressive accuracy of 95% on the Microsoft malware dataset, highlighting its effectiveness in malware detection. [ABSTRACT FROM AUTHOR]

Internet of Things (IoT) devices have become increasingly important within the smart home domain, making the security of the devices a critical aspect. The majority of IoT devices are black-box systems running closed and pre-installed firmware. This raises concerns about the trustworthiness of these devices, especially considering that some of them are shipped with a microphone or a camera. Remote attestation aims at validating the trustworthiness of these devices by verifying the integrity of the software. However, users cannot validate whether the attestation has actually taken place and has not been manipulated by an attacker, raising the need for HCI research on trust and understandability. We conducted a qualitative study with 35 participants, investigating trust in the attestation process and whether this trust can be improved by additional explanations in the application. We developed an application that allows users to attest a smart speaker using their smartphone over an audio channel to identify the attested device and observe the attestation process. In order to observe the differences between the applications with and without explanations, we performed A/B testing. We discovered that trust increases when additional explanations of the technical process are provided, improving the understanding of the attestation process. [ABSTRACT FROM AUTHOR]

Due to its plug-and-play functionality and wide device support, the universal serial bus (USB) protocol has become one of the most widely used protocols. However, this widespread adoption has introduced a significant security concern: the implicit trust provided to USB devices, which has created a vast array of attack vectors. Malicious USB devices exploit this trust by disguising themselves as benign peripherals and covertly implanting malicious commands into connected host devices. Existing research employs supervised learning models to identify such malicious devices, but our study reveals a weakness in these models when faced with sophisticated data poisoning attacks. We propose, design and implement a sophisticated adversarial data poisoning attack to demonstrate how these models can be manipulated to misclassify an attack device as a benign device. Our method entails generating keystroke data using a microprogrammable keystroke attack device. We develop adversarial attacker by meticulously analyzing the data distribution of data features generated via USB keyboards from benign users. The initial training data is modified by exploiting firmware-level modifications within the attack device. Upon evaluating the models, our findings reveal a significant decrease from 99 to 53% in detection accuracy when an adversarial attacker is employed. This work highlights the critical need to reevaluate the dependability of machine learning-based USB threat detection mechanisms in the face of increasingly sophisticated attack methods. The vulnerabilities demonstrated highlight the importance of developing more robust and resilient detection strategies to protect against the evolution of malicious USB devices. [ABSTRACT FROM AUTHOR]

With the increase of IoT devices generating large amounts of user-sensitive data, improper firmware harms users' security and privacy. Latest home appliances are integrated with features to assure compatibility with smart home IoT. However, applying complex security mechanisms to IoT is limited by device hardware capabilities, making them vulnerable to attacks. Such attacks have recently become frequent. To address this issue, we developed a secure verification mechanism for firmware released by the device's manufacturer. We proposed an IoT gateway for secure firmware verification and updating for smart home IoT devices utilizing the IOTA MAM (Masked Authenticated Messaging) protocol and a distributed file system with IPFS (Inter-Planetary File System) protocol. These two communication protocols ensure decentralized communication and firmware file distribution between the IoT device vendor and the IoT end device. The proposed scheme securely shares latest firmware content over IOTA and IPFS networks, performs a secure firmware update on IoT end devices and ensures authenticity and integrity of the firmware. Two types of validation methods were proposed for firmware updating and validation. We implemented the proposed scheme using three entities, Vendor, IoT gateway, and IoT end device. Our system yielded promising results in performing secure automated firmware updates on IoT end devices with very low computational power. The system's functionality was implemented using IOTA's MAM run on Raspberry Pi as an IoT gateway along with an ESP8266 Wi-Fi microcontroller, demonstrating the effectiveness of our approach. Our proposed methodology can be used for secure firmware distribution on home IoT applications. [ABSTRACT FROM AUTHOR]

The firmware developed for the readout and trigger processing of the information emerging from the BIS78-RPC Muon Spectrometer chambers in the ATLAS experiment at CERN is presented here, together with data processing techniques, data acquisition software, and tests of the readout chain system, which represent efforts to make these chambers operational in the ATLAS experiment. This work is performed in the context of the BIS78-RPC project, which deals with the pilot deployment of a new generation of sMDT+RPCs in the experiment. Such chambers are planned to be fully deployed in the whole barrel inner layer of the Muon Spectrometer during the Phase II upgrade of the ATLAS experiment. On-chamber front-ends include an amplifier, a discriminator ASIC, and an LVDS transmitter. The signal is digitized by CERN HPTDC chips and then processed by an FPGA, which is the heart of the readout and trigger processing, using various techniques. [ABSTRACT FROM AUTHOR]

In the evolving landscape of cybersecurity threats, permanent denial-of-service (PDoS) attacks have emerged as a particularly damaging form of cyber aggression. Unlike the more well-known denial-of-service (DoS) attacks, which disrupt services temporarily, PDoS attacks aim to inflict irreversible damage to systems, often resulting in significant system overhauls and requiring hardware replacement. To enable the development of effective security measures, but also to address the knowledge gaps, this paper presents an in-depth exploration of PDoS attacks, emphasizing their distinguishing characteristics, underlying mechanisms, and potential further development. Through a comprehensive case study, this research highlights diverse tactics and strategies employed by attackers, from targeting IoT devices to manipulating boot processes and exploiting firmware vulnerabilities. A novel classification of PDoS attack vectors is proposed that also explains the ways in which the systems can be compromised. The findings confirm the pressing need for adaptive and robust defense mechanisms to mitigate the threats posed by PDoS attacks in our interconnected digital world. [ABSTRACT FROM AUTHOR]

Smart home devices are becoming more popular over the years. A diverse range of appliances is being created, and Ambient Intelligence is growing in homes. However, there are various producers of these gadgets, different kinds of protocols, and diverse environments. The lack of interoperability reduces comfort of the user and turns into a barrier to smart home adoption. Matter is growing by constructing an open-source application layer protocol that can be compatible with all smart home ecosystems. In this article, a Matter overview is provided (namely, of the Commissioning stage), and a Matter Accessory using ESP32-S3 is developed referring to the manufacturer's SDKs and is inserted into an existent household ecosystem. Its behavior on the network is briefly analyzed, and interactions with the device are carried out. The simplicity of these tasks demonstrates accessibility for developers to create products, especially when it comes to firmware. Additionally, device commissioning and control are straightforward for the consumer. This capacity of gadget incorporation into diverse ecosystems using Matter is already on the market and might result in higher device production and enhanced smart home adoption. [ABSTRACT FROM AUTHOR]

In this brief, a real-time inversion of petrophysical information in downhole firmware for nuclear magnetic resonance logging while drilling (NMR-LWD) based on a field-programmable gate array (FPGA) is proposed. Firstly, the inverse problem is introduced, the nonnegative least-squares (NNLS) problem is modeled and solved by the accelerated projected gradient descent (APGD) algorithm. Secondly, the efficient architecture for the APGD accelerator based on look-up tables (LUTs) is used in Intel's 10M50 FPGA. Finally, a software cooling method based on a multi-core structure and periodic thermal management technology is deployed. The proposed scheme is applied to NMR-LWD, the effectiveness and feasibility of the proposed scheme are verified experimentally. [ABSTRACT FROM AUTHOR]

The widespread deployment of unattended LoRa networks poses a growing need to perform Firmware Updates Over-The-Air (FUOTA). However, the FUOTA specifications dedicated by LoRa Alliance fall short of several deficiencies with respect to energy efficiency, transmission reliability, multicast fairness, and security. This article proposes FLoRa+, energy-efficient, reliable, beamforming-assisted, and secure FUOTA for LoRa networks, which is featured with several techniques, including delta scripting, channel coding, beamforming, and securing mechanisms. Specifically, we first propose a joint differencing and compression algorithm to generate the delta script for processing gain, which unlocks the potential of incremental FUOTA in LoRa networks. Then, we design a concatenated channel coding scheme with outer rateless code and inner error detection to enable reliable transmission for coding gain. Afterward, we develop a beamforming strategy to avoid biased multicast and compromised throughput for power gain. Finally, we present a securing mechanism incorporating progressive hash chain and packet arrival time pattern verification to countermeasure firmware integrity and availability attacks for security gain. Experimental results on a 20-node testbed demonstrate that FLoRa+ improves transmission reliability and energy efficiency by up to 1.51× and 2.65× compared with LoRaWAN. Additionally, FLoRa+ can defend against 100% and 85.4% of spoofing and Denial-of-Service (DoS) attacks. [ABSTRACT FROM AUTHOR]

This article introduces a new MfEIT UDESC Mark I system, which consists of a 32-electrode setup featuring a modified Howland current source, low cost, portability, and non-radiation. The system is capable of reconstructing electrical conductivity tomographic images at a rate of 30.624 frames per second, taking about 5 min for imaging. The current source employs a 0.5 mA adjacent current application pattern with frequencies ranging from 10 kHz to 1 MHz. This article outlines the hardware, firmware, and software design specifications, which include the design of the current source, calibration procedures, and image reconstruction process. Tomographic images of conductivity were reconstructed in ex vivo healthy pig lungs and those with pneumonia, as a proof of concept for future applications in live pigs. The high spectral power density, combined with real-time system calibration provides clinical advantages in veterinary medicine. The goal is to identify lung areas affected by Mycoplasma hyopneumoniae in pigs through the analysis of electrical conductivity difference, offering a valuable tool to assist veterinarians to obtain images of respiratory diseases. The modified reconstruction method GREIT (EIDORS) was evaluated with experimental data and was compared with the Gauss–Newton and Total Variation methods, where GREIT 2D proved to be superior. [ABSTRACT FROM AUTHOR]

The main goal of the article is to present the concept of using a simulation environment when designing an advanced fibre-optic seismometer (FOS) using a field-programmable gate array (FPGA) computing system. The first part of the article presents the advanced requirements regarding the FOS principle of operation, as well as the measurement method using a closedloop operation. The closed-loop control algorithm is developed using the high-level language C++ and then it is synthesised into an FPGA. The following part of the article describes the simulation environment developed to test the operation of the control algorithm. The environment includes a model of components of the measurement system, delays, and distortions in the signal processing path, and some of the measurement system surroundings. The article ends with a comparison of simulation data with measurements. The obtained results are consistent and prove correctness of the methodology adopted by the authors. [ABSTRACT FROM AUTHOR]

This article presents a new firmware update paradigm for optimising the procedure in microcontrollers. The aim is to allow updating during program execution, without interruptions or restarts, replacing only specific code segments. The proposed method uses static and absolute addresses to locate and isolate the code segment to be updated. The work focuses on Microchip's PIC18F27K42 microcontroller and includes an example of updating functionality without affecting ongoing applications. This approach is ideal for band limited channels, reducing the amount of data transmitted during the update process. It also allows incremental changes to the program code, preserving network capacity, and reduces the costs associated with data transfer, especially in firmware update scenarios using cellular networks. This ability to update the normal operation of the device, avoiding service interruption and minimising downtime, is of remarkable value. [ABSTRACT FROM AUTHOR]

Vibration analysis is commonly used to assess machinery conditions, earthquake detection, and structural monitoring. Commercially available DAQs (Data Acquisition Systems) feature high costs and limited versatility in terms of end-user hardware/firmware customization, making it difficult to adapt them to the input signal features and add supplementary functionalities. Hence, this research aims to develop a custom acquisition board for detecting vibration signals via IEPE (Integrated Electronic Piezoelectric) sensors, considering the limitations of commercially available systems, and building upon solutions found in the literature. The DAQ board was intended for remote vibration monitoring of infrastructure and machinery for industrial applications, allowing the implementation of predictive maintenance strategies. The proposed DAQ board has two independent and fully configurable channels, which can be set for acquiring signals from IEPE sensors or generic voltage sources. The DAQ board relies on the STM32F401 microcontroller to manage the acquisition from high-speed ADCs, process data, and store them in mass memory (SD card). During acquisition, the DAQ implements a batch acquisition strategy based on a buffer flash memory for temporarily storing ADCs data, which are iteratively poured into mass memory. Also, the board has Bluetooth connectivity to transmit acquired data and receive commands remotely. A prototype of the DAQ board was developed and tested with several waveforms, including vibration signals. The tests showed that the board can acquire vibration signals and compute the FFT onboard. The DAQ demonstrated a good balance between performance, accuracy, flexibility, and cost, making it suitable for several industrial applications and allowing for scalability and integration potential. [ABSTRACT FROM AUTHOR]

As the Internet of Things (IoT) era arrives, the proliferation of IoT devices exposed to the Internet presents a significant challenge to device security. Firmware is software that operates within Internet of Things (IoT) devices, directly governing their behaviors and functionalities. Consequently, the security of firmware is critical to shielding IoT devices from potential threats. In order to enable users to operate a device intuitively, firmware commonly provides a web interface. Consequently, this interface frequently serves as the primary attack goal in Internet of Things (IoT) devices, rendering them susceptible to numerous cyber-attacks. Unfortunately, web services have complex data interactions and implicit dependencies, and it is not easy to balance efficiency and accuracy during the analysis process, leading to heavy overhead. This paper proposes a lightweight vulnerability scanning approach, WFinder, designed explicitly for embedded firmware web services to perform vulnerability checks on backend binary files in firmware. WFinder uses static analysis to focus on identifying vulnerabilities in boundary binary files related to web services in firmware. Initially, the approach identifies boundary binary files and external data entry points based on front-end and back-end associativity features. Subsequently, rules are formulated to filter hazardous functions to narrow the analysis targets. Finally, the method generates sensitive call paths from the external data input points to the hazardous functions and conducts a lightweight taint analysis along these paths to uncover potential vulnerabilities. We implemented a prototype of WFinder and evaluated it on the firmware of ten devices from five well-known manufacturers. We discovered thirteen potential vulnerabilities, eight of which were confirmed by the CNVD, and assigned them CNVD identification numbers. Compared with the most advanced tool, SATC, WFinder was more efficient at discovering more bugs on the test set. These results indicate that WFinder is effective at detecting bugs in embedded web services. [ABSTRACT FROM AUTHOR]

The escalating advancement in Software-Defined Vehicles (SDVs) necessitates a formidable strategy for firmware updates, where traditional methods often fall short of guaranteeing absolute integrity. Although decentralization has been explored in studies for firmware integrity verification using blockchain technology, it lacks comprehensive validation in the context of automotive over-the-air (OTA) updates. By recognizing the limitations of current practices and the partial validation of decentralized approaches, such as blockchain, in the automotive sector, our study introduces a novel mechanism for firmware over-the-air (FOTA) updates. This mechanism is grounded in the widely adopted message queuing telemetry transport (MQTT) protocol, integral to the Internet of Things (IoT) domain, and leverages Merkle tree-based blockchain verification to fortify the fidelity and efficiency of firmware updates. Our proposed solution not only prioritizes the stability crucial to automotive OTA updates but also ensures that performance is not compromised. This dual focus on reliability and efficiency represents a significant stride forward in the development of secure, scalable SDV firmware update protocols. [ABSTRACT FROM AUTHOR]

Reverse engineering is the process of understanding the inner working of a software system without having the source code. It is critical for firmware security validation, software vulnerability research, and malware analysis. However, it often requires a significant amount of manual effort. Recently, data-driven solutions were proposed to reduce manual effort by identifying the code clones on the assembly or the source level. However, security analysts still have to understand the matched assembly or source code to develop an understanding of the functionality, and it is assumed that such a matched candidate always exists. This research bridges the gap by introducing the problem of assembly code summarization. Given the assembly code as input, we propose a machine-learning-based system that can produce human-readable summarizations of the functionalities in the context of code vulnerability analysis. We generate the first assembly code to function summary dataset and propose to leverage the encoder-decoder architecture. With the attention mechanism, it is possible to understand what aspects of the assembly code had the largest impact on generating the summary. Our experiment shows that the proposed solution achieves high accuracy and the Bilingual Evaluation Understudy (BLEU) score. Finally, we have performed case studies on real-life CVE vulnerability cases to better understand the proposed method's performance and practical implications. [ABSTRACT FROM AUTHOR]

This paper aims to investigate the feasibility of using system power consumption as a factor to improve laptop heat dissipation. The problems due to the CPU overheating are addressed. Based on the Taguchi method, the laptop fan parameters can be optimized with firmware adjustments only. In the Taguchi analysis, the fan speed, system power, and debounce time are considered as control factors, while the Cinebench point is utilized to evaluate the CPU performance. Experimental results demonstrate that the proposed heat dissipation scheme effectively reduces the idle time of a laptop fan. The improvement in heat dissipation can reduce CPU performance degradation because of overheating. According to the best combination of control factors, there is approximately a 5% increase in CPU performance despite a 0.35% increment in power consumption. This paper highlights the effectiveness of optimizing laptop fan parameters through firmware adjustments to improve heat dissipation and mitigate CPU overheating issues. Moreover, the study highlights the delicate balance between power consumption and performance gains. While there may be a slight increase in power consumption associated with the optimized heat dissipation scheme, the observed improvements in CPU performance outweigh this incremental power usage. [ABSTRACT FROM AUTHOR]

This paper presents ReproRun, a flexible and extensible run-time framework for the reconfiguration of functions in field programmable gate array (FPGA) devices used in popular software-defined radio (SDR) platforms. The FPGA devices embed a hardwired or soft processing system (PS) which communicates with the programmable logic (PL) using a standard embedded bus interface. In order to apply a seamless run-time partial reconfiguration, we made use of all the related building blocks, design guidelines, and tools offered by AMD-Xilinx. In ReproRun, each partial bitstream targeting a reconfigurable region (RR) of the PL area comes with its respective firmware (i.e., software functions) that runs on the PS side. Our work guarantees run-time updates of the firmware without interrupting the functionality of other software processes running in the PS or PL, by employing a specialized controller, denoted as Run-timE firmWare reconfIguration contRollEr (REWIRE). The latter leverages the open asymmetric multiprocessing framework (OpenAMP). The partial bitstreams and respective firmware are fetched from a remote location using the trivial file transfer protocol (TFTP). ReproRun can be applied in different FPGA accelerators residing in disaggregated open radio access network (RAN) equipment, adaptive radio access technologies, and Edge servers hosting virtualized functions. [ABSTRACT FROM AUTHOR]

Third-party libraries (TPLs) are extensively utilized by developers to expedite the software development process and incorporate external functionalities. Nevertheless, insecure TPL reuse can lead to significant security risks. Existing methods, which involve extracting strings or conducting function matching, are employed to determine the presence of TPL code in the target binary. However, these methods often yield unsatisfactory results due to the recurrence of strings and the presence of numerous similar non-homologous functions. Furthermore, the variation in C/C++ binaries across different optimization options and architectures exacerbates the problem. Additionally, existing approaches struggle to identify specific pieces of reused code in the target binary, complicating the detection of complex reuse relationships and impeding downstream tasks. And, we call this issue the poor interpretability of TPL detection results. In this article, we observe that TPL reuse typically involves not just isolated functions but also areas encompassing several adjacent functions on the Function Call Graph (FCG). We introduce LibAM, a novel Area Matching framework that connects isolated functions into function areas on FCG and detects TPLs by comparing the similarity of these function areas, significantly mitigating the impact of different optimization options and architectures. Furthermore, LibAM is the first approach capable of detecting the exact reuse areas on FCG and offering substantial benefits for downstream tasks. To validate our approach, we compile the first TPL detection dataset for C/C++ binaries across various optimization options and architectures. Experimental results demonstrate that LibAM outperforms all existing TPL detection methods and provides interpretable evidence for TPL detection results by identifying exact reuse areas. We also evaluate LibAM's scalability on large-scale, real-world binaries in IoT firmware and generate a list of potential vulnerabilities for these devices. Our experiments indicate that the Area Matching framework performs exceptionally well in the TPL detection task and holds promise for other binary similarity analysis tasks. Last but not least, by analyzing the detection results of IoT firmware, we make several interesting findings, for instance, different target binaries always tend to reuse the same code area of TPL. The datasets and source code used in this article are available at https://github.com/Siyuan-Li201/LibAM. [ABSTRACT FROM AUTHOR]

This article discusses the process of establishing an experimental lab alongside computational research. It provides ten simple rules for researchers who are interested in moving into experimental studies, including the importance of collaborating with experimentalists, staying up to date with experimental techniques, finding lab space, keeping computational research ongoing, securing funding, organizing the lab, writing ethics applications, expecting a three-year timeline, documenting experiments, and publishing in experimental journals. The article emphasizes the benefits of combining computational and experimental research and offers practical advice for researchers considering this transition. [Extracted from the article]

In recent years, the Internet of Things (IoT) paradigm has been widely applied across a variety of industrial and consumer areas to facilitate greater automation and increase productivity. Higher dependability on connected devices led to a growing range of cyber security threats targeting IoT-enabled platforms, specifically device firmware vulnerabilities, often overlooked during development and deployment. A comprehensive security strategy aiming to mitigate IoT firmware vulnerabilities would entail auditing the IoT device firmware environment, from software components, storage, and configuration, to delivery, maintenance, and updating, as well as understanding the efficacy of tools and techniques available for this purpose. To this effect, this paper reviews the state-of-the-art technology in IoT firmware vulnerability assessment from a holistic perspective. To help with the process, the IoT ecosystem is divided into eight categories: system properties, access controls, hardware and software re-use, network interfacing, image management, user awareness, regulatory compliance, and adversarial vectors. Following the review of individual areas, the paper further investigates the efficiency and scalability of auditing techniques for detecting firmware vulnerabilities. Beyond the technical aspects, state-of-the-art IoT firmware architectures and respective evaluation platforms are also reviewed according to their technical, regulatory, and standardization challenges. The discussion is accompanied also by a review of the existing auditing tools, the vulnerabilities addressed, the analysis method used, and their abilities to scale and detect unknown attacks. The review also proposes a taxonomy of vulnerabilities and maps them with their exploitation vectors and with the auditing tools that could help in identifying them. Given the current interest in analysis automation, the paper explores the feasibility and impact of evolving machine learning and blockchain applications in securing IoT firmware. The paper concludes with a summary of ongoing and future research challenges in IoT firmware to facilitate and support secure IoT development. [ABSTRACT FROM AUTHOR]

Smart home environments, which consist of various Internet of Things (IoT) devices to support and improve our daily lives, are expected to be widely adopted in the near future. Owing to a lack of awareness regarding the risks associated with IoT devices and challenges in replacing or the updating their firmware, adequate security measures have not been implemented. Instead, IoT device identification methods based on traffic analysis have been proposed. Since conventional methods process and analyze traffic data simultaneously, bias in the occurrence rate of traffic patterns has a negative impact on the analysis results. Therefore, this paper proposes an IoT traffic analysis and device identification method based on two-stage clustering in smart home environments. In the first step, traffic patterns are extracted by clustering IoT traffic at a local gateway located in each smart home and subsequently sent to a cloud server. In the second step, the cloud server extracts common traffic units to represent IoT traffic by clustering the patterns obtained in the first step. Two-stage clustering can reduce the impact of data bias, because each cluster extracted in the first clustering is summarized as one value and used as a single data point in the second clustering, regardless of the occurrence rate of traffic patterns. Through the proposed two-stage clustering method, IoT traffic is transformed into time series vector data that consist of common unit patterns and can be identified based on time series representations. Experiments using public IoT traffic datasets indicated that the proposed method could identify 21 IoTs devices with an accuracy of 86.9%. Therefore, we can conclude that traffic analysis using two-stage clustering is effective for improving the clustering quality, device identification, and implementation in distributed environments. [ABSTRACT FROM AUTHOR]

This paper studies how to implement Flash data programming for AMOLED display module products through eDP interface. eDP interface is an internal digital interface based on DisplayPort architecture and protocol, which has the advantages of high transmission rate and low power consumption, but is not suitable for transmitting non‐image or video data. Therefore, AMOLED display modules usually need additional interfaces to write key data (such as Demura, Gamma and TCON firmware) into Flash chips, which brings some problems of data transmission interference, unreliability and inefficiency. To solve these problems, this paper proposes a new operation method, which repackages the data to be written, converts them into images, sends them to TCON through eDP interface, and then TCON analyzes the images, extracts the valid data, and starts programming for Flash. This paper divides the whole process into three steps, and verifies the feasibility and effectiveness of the method through experiments. This method effectively solves the problem of data programming, simplifies the production process, and improves the speed and reliability of programming. [ABSTRACT FROM AUTHOR]

This research paper deals with the enhancement of Internet of Things (IoT) security through federated ensemble learning (FEI) and adversarial machine learning (AMLI) algorithms. The proposed approach strives to enhance the security of IoT devices and networks against numerous cyber threats. To address the increasing threat of IoT, the study will utilize advanced machine learning techniques in order to build more resilient defenses for IoT networks. Using the IoT-23_Combined dataset, the study scrutinized an array of IoT attack types, revealing the distribution and frequency of different attack categories. The FEI and AMLI models were trained and tested to detect and mitigate these IoT attacks, with the evaluation metrics being accuracy, precision, recall, and F1 score. The FEI model surpassed the AMLI model, registering superior performance in all metrics, with an accuracy of 87.94% and an F1 score of 88.44%. Concurrently, the study recommends the adoption of system hardening strategies and real-time response measures, including robust authentication methods, secure firmware updates, and security awareness training programs. The assessment of these measures was based on their implementation complexity, potential impact on system performance, and adaptability to changing threats. Conclusively, the research findings illustrate the potential of machine learning to bolster IoT security, suggesting a path towards more proactive defense mechanisms and the creation of a resilient IoT ecosystem. This study holds relevance for entities seeking to fortify their IoT security systems against an evolving threat landscape. [ABSTRACT FROM AUTHOR]

The Internet of Things has a bootloader and applications responsible for initializing the device's hardware and loading the operating system or firmware. Ensuring the security of the bootloader is crucial to protect against malicious firmware or software being loaded onto the device. One way to increase the security of the bootloader is to use digital signature verification to ensure that only authorized firmware can be loaded onto the device. Additionally, implementing secure boot processes, such as a chain of trust, can prevent unauthorized access to the device's firmware and protect against tampering during the boot process. This research is based on the firmware bootloader and application dataflow taint analysis and security assessment of IoT devices as the most critical step in ensuring the security and integrity of these devices. This process helps identify vulnerabilities and potential attack vectors that attackers could exploit and provides a foundation for developing effective remediation strategies. [ABSTRACT FROM AUTHOR]

Embedded devices are pervasive nowadays with the rapid development of the Internet of Things (IoT). This brings significant security issues that make the security analysis of embedded devices important. This paper presents a survey on the security analysis research of embedded devices. First, we analyze the embedded device types and their operating systems. Then, we describe a major dynamic security analysis method for an embedded device, i.e., simulating the firmware of the embedded device and performing fuzzing on the web interface provided by the firmware. Third, we discuss some other issues in embedded security analysis, such as analyzing the attack surface, applying static analysis, and performing large-scale analysis. Based on these analyses, we finally conclude three challenges in the current research and present our insights for future research directions. [ABSTRACT FROM AUTHOR]

The article discusses the development of advanced fly scans using the Mamba software project at the High Energy Photon Source (HEPS) in Beijing, China. The Mamba software aims to provide a reliable and flexible framework for beamline experiments, with a focus on high framerates and data throughputs. The article explores the architectural essentials of fly scans and discusses issues related to motion control, triggering sequences, detectors, and other fields of interest in fly scans. The document discusses the challenges and potential solutions for conducting fly scans with framerates of 10 kHz or higher at HEPS, including limited motor encoder ports, performance limitations of detectors and readout software, and the unsuitability of stepping motors for high-frequency scans. It proposes solutions such as using DeltaTau PowerPMAC for encoder processing and implementing scan fragmentation to address clock drift. The document also discusses the potential for signal distortion in high-frequency data captures and the need for improved hardware/software system architecture for data processing. The source code for the Bubo software is available as part of the open-source edition of Mamba. [Extracted from the article]

NovAtel has recently leveraged its expertise in both receiver design and anti-jam technology to develop solutions for space- and weight-constrained applications in challenged GNSS environments. Robust Dual-Antenna Receiver (RoDAR), is based on a commercial dual-antenna receiver, originally designed for attitude determination, and employs special firmware to mitigate jammers and spoofers without an increase in size or power consumption. With RoDAR, the multi-frequency, multi-constellation dual-antenna receiver is capable of null-steering at two different frequency bands (e.g., L1 and L5). In September 2022, the Norwegian Public Roads Administration hosted JammerTest, a live, over-the-air broadcast jamming and spoofing test. This paper presents the jamming and spoofing detection and mitigation performance of RoDAR during this live broadcast test. The interference detection provides spectrum monitoring and jamming characterization on all GNSS bands. The mitigation is carried out by steering a null formed on-board the receiver towards a jamming/spoofing source at GPS L1 and L5 bands. The null steering performance is characterized as a function of signal and position availability compared to a non-protected NovAtel receiver. The effectiveness of the anti-jam and anti-spoofing technology is demonstrated using representative complex spoofing and jamming test cases during this event. [ABSTRACT FROM AUTHOR]

The European Spallation Source (ESS) is a neutron source powered by a 5 MW, 2 GeV superconducting proton linac which is currently being constructed in Lund. Due to high beam current, just a few microseconds of operation with a misaligned beam can melt the accelerating cavity wall. Therefore, a Beam Loss Monitor (BLM) system is necessary to protect hardware and personnel from the consequences of beam loss. The BLM's main function is to inhibit beam production when excessively high beam losses are detected. Besides protection functionality, the system is anticipated to provide the means to monitor the beam losses during all modes of operation with the objective of preventing excessive machine activation. This paper concentrates on implementation for ionization chamber Beam Loss Monitor (ICBLM) and Neutron Sensitive Beam Loss Monitor (nBLM) systems. The required microsecond reaction time has been achieved due to the application of an FPGA. A single detector module was installed and successfully tested at LINAC4 at CERN, in the section where conditions are similar to the ones expected in the ESS linac. The summary of these tests is also included. [ABSTRACT FROM AUTHOR]

The aim of the study is the development of a VTOL (Vertical Takeoff and Landing) bicopter, utilizing Autodesk Inventor and Ultimaker Cura software. Design models were inspired by the V22- Osprey and Samson SA-2 from the Avatar movie. Composite materials (carbon fiber and PLA for 3D printing) were chosen due to their high-performance capabilities, as aerospace technology is in an ongoing development and evolution. The construction of the bicopter employed the FAAT method, and for control, the MATEK F411-WSE was utilized to process data from sensors, with specific firmware and the BetaFLIGHT interface for optimizing drone performance. [ABSTRACT FROM AUTHOR]

The main objective of this paper is to present the design and implementation of an embedded controlling system for the Tunable Magnetograph (TuMag) instrument camera sensor and test-bench software application for camera laboratory characterization. The TuMag camera is based on a new scientific sensor GPIXEL SENSE400 device family equipped with an FPGA. The camera sensor has an active area of 2048 × 2048 pixels and reaches a frame rate of up to 48 frames per second. The embedded controlling system was implemented on an Artix 7 FPGA, which oversees controlling the image sensor through a configuration interface. It controls the read-out of the sensor data and the communication of commands with the host device. The camera has a standard CoaXPress communication interface of up to 3125 Gbps. The FPGA embedded control system allows bit, word, and serial channel calibration and the modification of several parameters, such as the region of interest (RoI) size, exposition time, hardware or software trigger, single or continuous acquisition modes, sensor gain, and adjustment of the black level offset and exposition time. In addition, the firmware has a temperature controller, voltage level monitoring, and an enable–disable power sensor. In addition, the test-bench software application is a library developed in Python 3.7. It is a wrapper for the standard GeniCan commercial frame grabber interpreter. This wrapper permits the improvement of the interaction and interface between the user and the hardware in the camera calibration. The test-bench software application permits the reduction of costs and the transport risk of the TuMag camera between different laboratories. All TuMag embedded control systems and test-bench software application functionalities were successfully tested according to scientific requirements. [ABSTRACT FROM AUTHOR]