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From the perspective of channel behaviors, we review several design techniques of resistive termination for wireline applications. Termination impedances strongly affect the channel behaviors. Their impacts vary a lot depending on the types of interconnects and the circuits. Therefore, termination impedances must be appropriately designed for the target applications. In this article, first, we explain an intuitive analytical transfer function model of wireline channels. The model allows designers to easily and intuitively understand the impacts of the termination resistances on the channel behaviors. Second, we review various resistive termination techniques for LC-dominant channels and discuss their design tradeoffs. Especially, we theoretically explain the relaxed impedance matching technique, which allows designers to violate impedance matching for design improvements at the cost of a negligible penalty in signal integrity. Third, we review various resistive termination techniques for RC-dominant channels and their design tradeoffs. We especially emphasize and theoretically explain why and how the design tradeoffs by resistive terminations in RC-dominant channels are different from the ones in LC-dominant channels.

We propose a visual programming framework that helps a designer easily convert an existing analog layout into the layout generator. Using a graphical user interface (GUI), designers can easily load an existing layout, convert it into the layout generator, and visually verify the generated layout result. A GUI-supported visual programming method enables intuitive and straightforward programming to significantly reduce the required programming skills and coding workload. Through program blocks, designers can easily describe and compile a layout generator. Layout-code synchronization updates the program blocks automatically when layout elements are created, edited, or deleted via GUI. Expression assistance semi-automatically completes parameterized expressions of layout geometry through simple GUI manipulation. These methods greatly reduce the time and workload for development of the analog layout generator. Using the framework, a complex 20 Gb/s high-speed wireline receiver was converted to the generator in 20 hours, which is just 45% of the time required for manual coding of the layout generator. Other high-speed analog blocks including DCDL, and DCC circuits were also converted to generators. The generators created hundreds of different layout designs, all of them passed design rule verification. The generated layouts achieved almost the same performance in post-layout simulation as the reference layouts.

This article presents the body channel communication technique that first adopts decision feedback equalisation. For the first time, we characterised post-cursor intersymbol interference of a single-bit pulse response of a human body channel for decision feedback equalisation achieving the first body channel communication faster than 100 Mb/s. In the proposed technique, an 8-tap decision feedback equaliser is utilised at the receiver to compensate for intersymbol interference of the body channel. The experimental results show that the proposed prototype transceiver achieved the highest data rates of 150 Mb/s and 10 Mb/s along 20-cm and about 100-cm body channels, respectively. Compared to the previous best result measured for the same body-channel distance of about 100 cm, the data rate is improved by ten times, showing that the proposed technique can significantly increase the speed of body channel communication.