Dubois, Emmanuel, Bhaskar, Arun, Boucaud, Jean-Marc, Alves, A., Belem-Gonçalves, Cybelle, Braud, Flavie, Okada, Etienne, Avramovic, Vanessa, Robillard, J.F., Durand, Cédric, Gianesello, Frédéric, Bucci, Davide, Broquin, Jean-Emmanuel, Gaquière, Christophe, Gloria, Daniel, Microélectronique Silicium - IEMN (MICROELEC SI - IEMN), Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 (IEMN), Centrale Lille-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-JUNIA (JUNIA), Université catholique de Lille (UCL)-Université catholique de Lille (UCL)-Centrale Lille-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-JUNIA (JUNIA), Université catholique de Lille (UCL)-Université catholique de Lille (UCL), STMicroelectronics [Crolles] (ST-CROLLES), Centrale de Micro Nano Fabrication - IEMN (CMNF - IEMN), Plateforme de Caractérisation Multi-Physiques - IEMN (PCMP - IEMN), Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC), Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), Puissance - IEMN (PUISSANCE - IEMN), Laboratoire commun STMicroelectronics-IEMN T1, Renatech Network, PCMP CHOP, and ANR-11-EQPX-0025,LEAF,Plateforme de traitement laser pour l'électronique flexible multifonctionnelle(2011)
International audience; The increasing difficulty to pursue the aggressive objectives of Moore's law (More-Moore) has in parallel favored the emergence of integration solutions grouped under the term More-than-Moore, allowing to enrich silicon technologies by heterogeneous co-integration with new functionalities such as mixed digital/analog/RF/mmW circuits, antennas, sensors, actuators, embedded memory and other various microsystems). Still, it is clear that the performance of electronic systems (SoB - Systemon-Board) is far from having followed the same progression, thus marking a gap with monolithic nanometric CMOS technologies. To bridge this gap, it is now a question of producing gains in functionality, performance and compactness at the system level by heterogeneous integration of components in elemental system building blocks. Sometimes referred to as ‘System Moore’, this approach thus conceives the package not only as a simple encapsulation function but more precisely integrates the package as a functional system block. The dimensional level of functional packaging typically covers the 1-1000 µm range for which the use of microelectronics fabrication techniques are oversized, expensive and unable to efficiently handle thicknesses of a few tens of microns. In this context, laser micromachining is an increasingly used tool for micro/nanostructuring of materials for the packaging of integrated functions in photonics, microelectronics, RF and mmW. In this paper, we will first provide an overview of laser machining techniques in microelectronics and we will detailthe main characteristics of this technique with respect to the laser source and beam conditioning. It will be shown that the use of ultrashort laser processing with pulse width in femtosecond range is advantageous because it can be applied to a virtually unlimited range of materials like metals,semiconductors, dielectrics, alloys, and ceramics. The range of surface processing is diverse varying from a small scale (a few nm2) to large scale (a few mm2). The unwanted heat affected zone is greatly reduced for ultrashort lasers which allows for enhanced machining quality with low thermal impact of laser radiation on material. In a second step, we detail a selection of laser micromachining applications allowing either to increase the performance of RF and mmW components, or to introduce an innovative and distinctive manufacturing method promoting compactness and cost reduction:i) The first illustrated application is the fabrication of ultra-thin free standing membranes of SOICMOS RF circuits/functions on Silicon-on-Insulator (SOI) wafers. It will be shown that tremendous performance improvements can be obtained on a range of RF components like integrated inductances and power switches as well as in terms of cross-talk reduction.ii) The second example describes the packaging of an electro-optical transceiver using a glass electrooptical interposer to connect a silicon photonic chip to a single mode optical fiber.iii) Finally, the third illustration covers the fabrication of structures integrating mmW waveguides in G and J band [140-220 GHz, 220-320 GHz] with silicon chips and transitions allowing the conversion from coplanar to a guided mode in rectangular waveguides (WR5.1 and WR3.1).