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3. Optimization of a 65 nm CMOS imaging process for monolithic CMOS sensors for high energy physics

6. Radiation-Induced Charge Trapping in Shallow Trench Isolations of FinFETs

7. Radiation-Induced Charge Trapping in Shallow Trench Isolations of FinFETs

10. Strategic R&D Programme on Technologies for Future Experiments - Annual Report 2020

12. Forward and Reverse Operation of Enclosed-Gate MOSFETs and Sensitivity to High Total Ionizing Dose

13. Investigation of Scaling and Temperature Effects in Total Ionizing Dose (TID) Experiments in 65 nm CMOS

14. Total ionizing dose effects on analog performance of 65 nm bulk CMOS with enclosed-gate and standard layout

21. Dose-Rate Sensitivity of 65-nm MOSFETs Exposed to Ultrahigh Doses

23. Influence of LDD Spacers and H+Transport on the Total-Ionizing-Dose Response of 65-nm MOSFETs Irradiated to Ultrahigh Doses

25. Influence of LDD Spacers and H+ Transport on the Total-Ionizing-Dose Response of 65-nm MOSFETs Irradiated to Ultrahigh Doses.

26. Extending a 65nm CMOS process design kit for high total ionizing dose effects

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