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188 results on '"Bolchini, C"'

1. Reliable System Specification for Self-Checking Data-Paths

Author

Bolchini, C., Salice, F., Sciuto, D., and Pomante, L.

Subjects
Computer Science - Hardware Architecture
Abstract

The design of reliable circuits has received a lot of attention in the past, leading to the definition of several design techniques introducing fault detection and fault tolerance properties in systems for critical applications/environments. Such design methodologies tackled the problem at different abstraction levels, from switch-level to logic, RT level, and more recently to system level. Aim of this paper is to introduce a novel system-level technique based on the redefinition of the operators functionality in the system specification. This technique provides reliability properties to the system data path, transparently with respect to the designer. Feasibility, fault coverage, performance degradation and overheads are investigated on a FIR circuit., Comment: Submitted on behalf of EDAA (http://www.edaa.com/)

Published
2007

2. SAVE: Towards Efficient Resource Management in Heterogeneous System Architectures

Author

Durelli, G., Coppola, M., Djafarian, K., Kornaros, G., Miele, A., Paolino, M., Pell, Oliver, Plessl, Christian, Santambrogio, M. D., Bolchini, C., Hutchison, David, editor, Kanade, Takeo, editor, Kittler, Josef, editor, Kleinberg, Jon M., editor, Kobsa, Alfred, editor, Mattern, Friedemann, editor, Mitchell, John C., editor, Naor, Moni, editor, Nierstrasz, Oscar, editor, Pandu Rangan, C., editor, Steffen, Bernhard, editor, Terzopoulos, Demetri, editor, Tygar, Doug, editor, Weikum, Gerhard, editor, Goehringer, Diana, editor, Santambrogio, Marco Domenico, editor, Cardoso, João M. P., editor, and Bertels, Koen, editor

Published
2014
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3. MEDTEC students against coronavirus: Investigating the role of hemostatic genes in the predisposition to COVID-19 severity

Author

Cappadona, C, Paraboschi, E, Ziliotto, N, Bottaro, S, Rimoldi, V, Gerussi, A, Azimonti, A, Brenna, D, Brunati, A, Cameroni, C, Campanaro, G, Carloni, F, Cavadini, G, Ciravegna, M, Composto, A, Converso, G, Corbella, P, D'Eugenio, D, Ri, G, Di Giorgio, S, Grondelli, M, Guerrera, L, Laffoucriere, G, Lando, B, Lopedote, L, Maizza, B, Marconi, E, Mariola, C, Matronola, G, Menga, L, Montorsi, G, Papatolo, A, Patti, R, Profeta, L, Rebasti, V, Smidili, A, Tarchi, S, Tartaglia, F, Tettamanzi, G, Tinelli, E, Stuani, R, Bolchini, C, Pattini, L, Invernizzi, P, Degenhardt, F, Franke, A, Duga, S, Asselta, R, Cappadona C., Paraboschi E. M., Ziliotto N., Bottaro S., Rimoldi V., Gerussi A., Azimonti A., Brenna D., Brunati A., Cameroni C., Campanaro G., Carloni F., Cavadini G., Ciravegna M., Composto A., Converso G., Corbella P., D'eugenio D., Ri G. D., Di Giorgio S. M., Grondelli M. C., Guerrera L., Laffoucriere G., Lando B., Lopedote L., Maizza B., Marconi E., Mariola C., Matronola G. M., Menga L. M., Montorsi G., Papatolo A., Patti R., Profeta L., Rebasti V., Smidili A., Tarchi S. M., Tartaglia F. C., Tettamanzi G., Tinelli E., Stuani R., Bolchini C., Pattini L., Invernizzi P., Degenhardt F., Franke A., Duga S., Asselta R., Cappadona, C, Paraboschi, E, Ziliotto, N, Bottaro, S, Rimoldi, V, Gerussi, A, Azimonti, A, Brenna, D, Brunati, A, Cameroni, C, Campanaro, G, Carloni, F, Cavadini, G, Ciravegna, M, Composto, A, Converso, G, Corbella, P, D'Eugenio, D, Ri, G, Di Giorgio, S, Grondelli, M, Guerrera, L, Laffoucriere, G, Lando, B, Lopedote, L, Maizza, B, Marconi, E, Mariola, C, Matronola, G, Menga, L, Montorsi, G, Papatolo, A, Patti, R, Profeta, L, Rebasti, V, Smidili, A, Tarchi, S, Tartaglia, F, Tettamanzi, G, Tinelli, E, Stuani, R, Bolchini, C, Pattini, L, Invernizzi, P, Degenhardt, F, Franke, A, Duga, S, Asselta, R, Cappadona C., Paraboschi E. M., Ziliotto N., Bottaro S., Rimoldi V., Gerussi A., Azimonti A., Brenna D., Brunati A., Cameroni C., Campanaro G., Carloni F., Cavadini G., Ciravegna M., Composto A., Converso G., Corbella P., D'eugenio D., Ri G. D., Di Giorgio S. M., Grondelli M. C., Guerrera L., Laffoucriere G., Lando B., Lopedote L., Maizza B., Marconi E., Mariola C., Matronola G. M., Menga L. M., Montorsi G., Papatolo A., Patti R., Profeta L., Rebasti V., Smidili A., Tarchi S. M., Tartaglia F. C., Tettamanzi G., Tinelli E., Stuani R., Bolchini C., Pattini L., Invernizzi P., Degenhardt F., Franke A., Duga S., and Asselta R.

Abstract

Severe acute respiratory syndrome coronavirus 2 (SARS-CoV-2) is the etiologic agent of the coronavirus disease 2019 (COVID-19) pandemic. Besides virus intrinsic characteristics, the host genetic makeup is predicted to account for the extreme clinical heterogeneity of the disease, which is characterized, among other manifestations, by a derangement of hemostasis associated with thromboembolic events. To date, large-scale studies confirmed that genetic predisposition plays a role in COVID-19 severity, pinpointing several susceptibility genes, often characterized by immunologic functions. With these premises, we performed an association study of common variants in 32 hemostatic genes with COVID-19 severity. We investigated 49,845 single-nucleotide polymorphism in a cohort of 332 Italian severe COVID-19 patients and 1668 controls from the general population. The study was conducted engaging a class of students attending the second year of the MEDTEC school (a six-year program, held in collaboration between Humanitas University and the Politecnico of Milan, allowing students to gain an MD in Medicine and a Bachelor’s Degree in Biomedical Engineering). Thanks to their willingness to participate in the fight against the pandemic, we evidenced several suggestive hits (p < 0.001), involving the PROC, MTHFR, MTR, ADAMTS13, and THBS2 genes (top signal in PROC: chr2:127192625:G:A, OR = 2.23, 95%CI = 1.50–3.34, p = 8.77 × 10−5). The top signals in PROC, MTHFR, MTR, ADAMTS13 were instrumental for the construction of a polygenic risk score, whose distribution was significantly different between cases and controls (p = 1.62 × 10−8 for difference in median levels). Finally, a meta-analysis performed using data from the Regeneron database confirmed the contribution of the MTHFR variant chr1:11753033:G:A to the predisposition to severe COVID-19 (pooled OR = 1.21, 95%CI = 1.09–1.33, p = 4.34 × 10−14 in the weighted analysis).

Published
2021

13. Context information for knowledge reshaping

Author

Bolchini, C., Curino, C.A., Quintarelli, E., Schreiber, F.A., and Tanca, L.

Subjects
Knowledge management, Technology application, Knowledge management -- Technology application
Published
2009

14. Dependable Multicore Architectures at Nanoscale: the view from Europe

Author

Ottavi, M., Pontarelli, S., Gizopoulos, D., Paschalis, A., Bolchini, C., Michael, Maria K., Anghel, L., Tahoori, M., Reviriego, P., Bringmann, O., Izosimov, V., Manhaeve, H., Strydis, C., Hamdioui, S., Michael, Maria K. [0000-0002-1943-6547], University of Rome (UNIVERSITY OF ROME), Università degli Studi di Roma Tor Vergata [Roma], Department of Informatics and Telecomunications [Kapodistrian Univ] (DI NKUA), National and Kapodistrian University of Athens (NKUA), Virginia Commonwealth University (VCU), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS), Karlsruhe Institute of Technology (KIT), Forschungszentrum Informatik, CS Dep, Linköping University (LIU), The Current Test Company (Q-Star Test), Q-Star Test, Delft University of Technology (TU Delft), Neurosciences, Department of Informatics and Telecommunications (Athens), National and Kapodistrian University of Athens = University of Athens (NKUA | UoA), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), and Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)

Subjects
010302 applied physics, Multi-core processor, Engineering, business.industry, 02 engineering and technology, Settore ING-INF/01 - Elettronica, 01 natural sciences, Electronic mail, 020202 computer hardware & architecture, law.invention, Instruction set, Microprocessor, Hardware and Architecture, law, Multicore, Dependablity, Embedded system, PACS 85.42, 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, Electrical and Electronic Engineering, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, business, Software
Abstract

International audience; This article presented a survey of dependability issues faced by multi-core architectures at nanoscale technology nodes. Existing solutions against these challenges were also discussed, describing their scope of application, from technology level methodologies, to design approaches to the metrics required to evaluate the overall dependability of a system. In the future, the constant reduction of the feature size of the devices will exacerbate the issues related to aging and soft errors. This will create further challenges and at design level, an integrated design approach that will cope with the occurrence of faults at any time of their occurrence i.e., at manufacturing (thus increasing yield) and in the field (thus increasing reliability) will become more and more important to obtain economically viable and dependable systems. Dependability assessment will also need an integrated approach for cross-layer, pre- and post-silicon techniques for “just right”dependability assessment in order to avoid “overdesign”for dependability using classic guard-banding methodologies.

Published
2015

15. Dependable multicore architectures at nanoscale: The view from Europe

Author

Ottavi, M. Pontarelli, S. Gizopoulos, D. Paschalis, A. Bolchini, C. Michael, M.K. Anghel, L. Tahoori, M. Reviriego, P. Bringmann, O. Izosimov, V. Manhaeve, H. Strydis, C. Hamdioui, S.

Abstract

The introduction of multicore chips allowed the constant increase in delivered performance otherwise impossible to achieve. Multiple microprocessor cores from different instruction set architectures stay at the epicenter of such chips and are surrounded by memory cores of different technologies, sizes and functionalities, as well as by peripheral controllers, special function cores, analog and mixed-signal cores, reconfigurable cores, etc. The functionality as well as the complexity of multicore chips is unprecedented. © 2015 IEEE.

Published
2015

16. And What Can Context Do For Data?

Author

BOLCHINI, C., CURINO, C. A., ORSI, G., QUINTARELLI, E., ROSSATO, R., SCHREIBER, F. A., and TANCA, L.

Subjects
*CONTEXT-aware computing, *INFORMATION network management, *DATA analysis, *INFORMATION overload, *INFORMATION resources management, *COMPUTER security
Abstract

The authors explore the notion of context for data given the data overload resulting from the evolution of business information systems, information sharing and legacy data. The authors describe the manner in which context modeling can distinguish context-specific data views across large information systems. They mention context-aware data tailoring as well as an ownership dimension to the model that considers privacy and security issues. Families of context models include those that are presentation-oriented, location-oriented, user-centered or community-based.

Published
2009
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21. Dependable Multicore Architectures at Nanoscale : The View From Europe

Author

Ottavi, Marco, Pontarelli, S., Gizopoulos, D., Bolchini, C., Michael, M. K., Anghel, L., Tahoori, M., Paschalis, A., Reviriego, P., Bringmann, O., Izosimov, Viacheslav, Manhaeve, H., Strydis, C., Hamdioui, S., Ottavi, Marco, Pontarelli, S., Gizopoulos, D., Bolchini, C., Michael, M. K., Anghel, L., Tahoori, M., Paschalis, A., Reviriego, P., Bringmann, O., Izosimov, Viacheslav, Manhaeve, H., Strydis, C., and Hamdioui, S.

Abstract

The introduction of multicore chips allowed the constant increase in delivered performance otherwise impossible to achieve. Multiple microprocessor cores from different instruction set architectures stay at the epicenter of such chips and are surrounded by memory cores of different technologies, sizes and functionalities, as well as by peripheral controllers, special function cores, analog and mixed-signal cores, reconfigurable cores, etc. The functionality as well as the complexity of multicore chips is unprecedented., QC 20151211

Published
2015
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25. Logical and physical data structures for Flash memories for lightweight, portable databases

Author

Bolchini C., Giusti A., Furfari F., and Lenzi S.

Subjects
Flash Eprom, Lightweight Database, Mobile Device
Abstract

This report presents the design and implementation of appropriate logical and physical data structures for Flash EEPROM memories, developed to increase access performance, reduce power consumption ad improve the device endurance. Such data structures have been exploited in the implementation of a driver for the physical data management layer of a lightweight DataBase Management System (DBMS), developed for devices with Flash memory storage. The DBMS has been designed from scratch to exploit the proposed logical and physical data structures, with the aim of supporting the use of context-aware applications, running on a portable device, working on a limited amount of data, which is opportunely selected based on the context.

Published
2007

26. Context−aware views for mobile users

Author

Bolchini, C, Curino, C, Orsi, G, Quintarelli, E, Rossato, R, Schreiber, F, and Tanca, L

Abstract

Independent, heterogeneous, distributed, sometimes transient and mobile data sources produce an enormous amount of information that should be semantically integrated and filtered, or, as we say, tailored, based on the users’ interests and context. We propose to exploit knowledge about the user, the adopted device, and the environment - altogether called context - to the end of information tailoring. This paper presents the Context Dimension Tree, a context model which is the basis for solving the information tailoring problem, along with its role in the framework of the Context-ADDICT architecture.

Published
2007

37. High-reliability fault tolerant digital systems in nanometric technologies: Characterization and design methodologies

Author

Bolchini, C., primary, Miele, A., additional, Sandionigi, C., additional, Ottavi, M., additional, Pontarelli, S., additional, Salsano, A., additional, Metra, C., additional, Omana, M., additional, Rossi, D., additional, Reorda, M. Sonza, additional, Sterpone, L., additional, Violante, M., additional, Gerardin, S., additional, Bagatin, M., additional, and Paccagnella, A., additional

Published
2012
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