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1. APEIRON: composing smart TDAQ systems for high energy physics experiments

2. RED-SEA Project: Towards a new-generation European interconnect

3. Event reconstruction for KM3NeT/ORCA using convolutional neural networks

4. gSeaGen: the KM3NeT GENIE-based code for neutrino telescopes

5. Real-time cortical simulations: energy and interconnect scaling on distributed systems

6. Large Scale Low Power Computing System - Status of Network Design in ExaNeSt and EuroExa Projects

7. The Brain on Low Power Architectures - Efficient Simulation of Cortical Slow Waves and Asynchronous States

8. Gaussian and exponential lateral connectivity on distributed spiking neural network simulation

9. Towards EXtreme scale technologies and accelerators for euROhpc hw/Sw supercomputing applications for exascale: The TEXTAROSSA approach

10. Outlines in hardware and software for new generations of exascale interconnects

11. APEIRON: A Framework for High Level Programming of Dataflow Applications on Multi-FPGA Systems

12. Impact of exponential long range and Gaussian short range lateral connectivity on the distributed simulation of neural networks including up to 30 billion synapses

13. Scaling to 1024 software processes and hardware cores of the distributed simulation of a spiking neural network including up to 20G synapses

14. Power, Energy and Speed of Embedded and Server Multi-Cores applied to Distributed Simulation of Spiking Neural Networks: ARM in NVIDIA Tegra vs Intel Xeon quad-cores

15. EURETILE D7.3 - Dynamic DAL benchmark coding, measurements on MPI version of DPSNN-STDP (distributed plastic spiking neural net) and improvements to other DAL codes

16. Architectural improvements and 28 nm FPGA implementation of the APEnet+ 3D Torus network for hybrid HPC systems

17. NaNet:a low-latency NIC enabling GPU-based, real-time low level trigger systems

18. Distributed simulation of polychronous and plastic spiking neural networks: strong and weak scaling of a representative mini-application benchmark executed on a small-scale commodity cluster

19. GPU peer-to-peer techniques applied to a cluster interconnect

20. A heterogeneous many-core platform for experiments on scalable custom interconnects and management of fault and critical events, applied to many-process applications: Vol. II, 2012 technical report

21. 'Mutual Watch-dog Networking': Distributed Awareness of Faults and Critical Events in Petascale/Exascale systems

22. The Distributed Network Processor: a novel off-chip and on-chip interconnection network architecture

23. APEnet+: high bandwidth 3D torus direct network for petaflops scale commodity clusters

24. APEnet+: a 3D toroidal network enabling Petaflops scale Lattice QCD simulations on commodity clusters

25. Next generation of Exascale-class systems: ExaNeSt project and the status of its interconnect and storage development

26. Dynamic many-process applications on many-tile embedded systems and HPC clusters: The EURETILE programming environment and execution platforms

27. Search for $K^+$ decays into the $\pi^+e^+e^-e^+e^-$ final state

30. A study of the $K^+ \to \pi^0 e^+ \nu \gamma$ decay

31. Improved calorimetric particle identification in NA62 using machine learning techniques

32. A search for the $K^+ \to \mu^- \nu e^+ e^+$ decay

33. A measurement of the $K^+ \to \pi^+ \mu^+ \mu^-$ decay

34. L0TP+: the Upgrade of the NA62 Level-0 Trigger Processor

35. EuroEXA Custom Switch: an innovative FPGA-based system for extreme scale computing in Europe

36. RED-SEA: Network Solution for Exascale Architectures

37. TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale

38. Search for lepton number and flavour violation in $K^+ $ and $\pi^0$ decays

39. An investigation of the very rare $K^+\rightarrow\pi^+\nu\bar{\nu}$ decay

40. Graphics Processors in HEP Low-Level Trigger Systems

41. Architecture and performance of the KM3NeT front-end firmware

42. Searches for lepton number violating $K^+$ decays

43. ExaNeSt - Holistic Evaluation

44. EuroEXA Custom Switch: an innovative FPGA-based system for extreme scale computing in Europe.

45. L0TP+: the Upgrade of the NA62 Level-0 Trigger Processor.

46. Search for heavy neutral lepton production in K+ decays

47. KM3NeT front-end and readout electronics system: hardware, firmware, and software

48. NaNet: a Reconfigurable PCIe Network Interface Card Architecture for Real-time Distributed Heterogeneous Stream Processing in the NA62 Low Level Trigger.

50. The INFN COSA Project: Low-Power Computing and Storage

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