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1. Implementation of Fast and Power Efficient SEC-DAEC and SEC-DAEC-TAEC Codecs on FPGA

5. An Improved (24, 16) OLS Code for Single Error Correction-Double Adjacent Error Correction-Triple Adjacent Error Correction

6. Efficient and Novel Architecture of Golay Encoder and Decoder for McEliece Cryptosystem

7. FPGA and ASIC-Based Design of Fast and Low Power SEC-DAEC and SEC-DAEC-TAEC Codecs

8. A Cost-Effective Tracking and Health Monitoring System for Suspected COVID-19 Patient in Quarantine

9. Design and Implementation of IoT-Based System for Tracking and Monitoring of Suspected COVID-19 Patient

12. Design of SEC-DED and SEC-DED-DAEC Codes of different lengths

15. Fast and Secure Video Encryption Using Divide-and-Conquer and Logistic Tent Infinite Collapse Chaotic Map

16. A New Image Encryption Based on Two Chaotic Maps and Affine Transform

17. Designing Robust Blind Color Image Watermarking-Based Authentication Scheme for Copyright Protection

18. Chaos-Based Uncompressed Frame Level Video Encryption

19. An Efficient Decoding of SEC-DED-DAEC Code with Odd-Column-Weight H-matrix

20. FPGA-Based Low Delay Adjacent Triple-Bit Error Correcting Codec

21. An Android-Application-Controlled Car for Human Safety Against COVID-19

24. Design of Power Efficient SEC Orthogonal Latin Square (OLS) Codes

25. An Approach to Reduce Power Consumption and Delay of Single Error Correction Codes in WSNs for IoT Applications

29. On Relative Performances and Decoding of CRC Concatenated Polar Codes with Different Lists for Solid-State Drives

30. New Compact SEC-DED-DAEC Code for Memory Applications

31. Performance Analysis of CRC-Aided Polar Codes with SCL Decoding Algorithm for the Binary Deletion Channel

34. Synthesis of all Maximum Length Cellular Automata of Cell Size up to 12

38. Hamming Code-Based Watermarking Scheme for Image Authentication and Tampered Detection

39. RS (255, 249) Codec Based on All Primitive Polynomials Over GF()

40. Binary Error Correcting Code for DNA Databank

41. Post-layout Power Supply Noise Suppression and Performance Analysis of Multi-core Processor Using 90 nm Process Technology

42. FPGA Implementation of OLS (32, 16) Code and OLS (36, 20) Code

43. DCT-Based Gray Image Watermarking Scheme

44. Improving Security of SPN-Type Block Cipher Against Fault Attack

48. Error‐rate analysis of polar code designs using genetic algorithm for additive white Gaussian noise channel.

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