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© Materials Research Society 2015. We introduce a novel approach to the synthesis of high-quality and highly uniform few-layer graphene on silicon wafers, based on solid source growth from epitaxial 3C-SiC films. Using a Ni/Cu catalytic alloy, we obtain a transfer-free bilayer graphene directly on Si(100) wafers, at temperatures potentially compatible with conventional semiconductor processing. The graphene covers uniformly a 2″ silicon wafer, with a Raman ID/IG band ratio as low as 0.5, indicative of a low defectivity material. The sheet resistance of the graphene is as low as 25 Ω/square, and its adhesion energy to the underlying substrate is substantially higher than transferred graphene. This work opens the avenue for the true wafer-level fabrication of microdevices comprising graphene functional layers. Specifically, we suggest that exceptional conduction qualifies this graphene as a metal replacement for MEMS and advanced on-chip interconnects with ultimate scalability.

We report a passively Q-switched 1.9 μm thulium ZBLAN waveguide laser based on an extended cavity containing a flake-graphene saturable absorber film. The 790nm diode-laserpumped laser produces up to 6 mW with ~1.4 μs pulses at ~25 kHz.

Currently proven methods that are used to obtain devices with high-quality graphene on silicon wafers involve the transfer of graphene flakes from a growth substrate, resulting in fundamental limitations for large-scale device fabrication. Moreover, the complex three-dimensional structures of interest for microelectromechanical and nanoelectromechanical systems are hardly compatible with such transfer processes. Here, we introduce a methodology for obtaining thousands of microbeams, made of graphitized silicon carbide on silicon, through a site-selective and wafer-scale approach. A Ni-Cu alloy catalyst mediates a self-aligned graphitization on prepatterned SiC microstructures at a temperature that is compatible with silicon technologies. The graphene nanocoating leads to a dramatically enhanced electrical conductivity, which elevates this approach to an ideal method for the replacement of conductive metal films in silicon carbide-based MEMS and NEMS devices. © 2014 IOP Publishing Ltd.

Residual stresses in epitaxial 3C-SiC films on silicon, for chosen growth conditions, appear determined by their growth orientation. Stress evaluation locally with Raman spectroscopy, and across a 150 mm wafer with curvature measurements, indicate that thin films can be grown on Si(100) with residual tensile stresses as low as 150 MPa. However, films on Si(111) retain a considerably higher stress, around 900 MPa, with only minor decrease versus film thickness. Stacking faults are indeed geometrically a less efficient relief mechanism for the biaxial strain of SiC films grown on Si(111) with 〈111〉 orientation. Residual stresses can be tuned by the epitaxial process temperatures. © 2013 American Institute of Physics.