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Voltage/Frequency Islands (VFIs) are practically used in multicore systems. VFIs cluster cores that share the same Voltage/Frequency (V/F) level for the entire application runtime. Using VFIs, switching V/F levels has less overhead per-core while saving more energy in exchange for tolerable execution delay. This paper targets the well-known K-means algorithm for clustering cores, where each cluster contains cores with similar computational workloads across applications phases. K-means produces sub-optimal clusters when cores workloads do not have the same variation across all phases. Furthermore, the workload variations require running a VFI with a different V/F level per-phase. This paper presents a fast heuristic that facilitates clustering by sorting computational workloads per-phase before applying K-means. The VFIs V/F levels are dynamically adjusted to meet energy budget constraints. This framework provides a guideline for users to choose a number of clusters that satisfies system configurations and energy efficiency preferences. Three parameters are evaluated to represent the computational workloads: utilization, Instruction-Per-Cycle (IPC), and execution time. For an application with highly varying workload, execution time achieves 52 and 65% more energy efficiency compared to utilization and IPC, respectively. Results show that the degree of workload variations for different applications impacts changing or fixing VFIs V/F levels.

Per-core Dynamic Voltage and Frequency (V/F) Scaling (DVFS) is a well-known methodology for achieving energy efficiency in multicore systems. Heuristic DVFS techniques provide fast, suboptimal V/F predictions while Dynamic Programming (DP) methods solve smaller sub-problems iteratively and use their outcomes to evaluate V/F levels globally, but at the cost of overhead delays. We propose an efficient DP framework using the Viterbi algorithm, which uses the Energy-Delay Product (EDP) as an objective function to predict the best V/F levels using applications’ profiled information, to minimize energy consumption and execution time. Experimental results show that our framework outperforms heuristics using the EDP criteria and provides near-optimal solutions when maximizing energy saving is as, or more, important than minimizing execution time penalty. In fact, across several benchmarks, our proposed algorithm provides from a 12 to 75 percent improvement in EDP compared to heuristic methods. Furthermore, using a Pareto frontier to evaluate solutions of the algorithms under study, we demonstrate that our framework's energy-time solution is on average only 9 percent worse than the optimal solution. In addition, we show that our dynamic programming solution is 3 to 18 percent closer to a theoretical lower-bound when compared to the studied heuristic methods.

Stochastic techniques are used in Dynamic Voltage and Frequency Scaling (DVFS). These techniques determine cores V/F levels based on the probability distributions of system parameters, which usually represent the computational characteristics of applications. The Hidden Markov Model (HMM) is a stochastic model, which learns the hidden states of systems based on observable events. Our previous work built an HMM for each core of a multicore system using a fixed number of states and V/F levels. The HMM parameters were used by the Viterbi algorithm to perform per-core DVFS by predicting the most likely state sequences. This paper aims at improving those state sequence predictions by examining different numbers of states. This examination impacts the size of HMM parameters that guide Viterbi for predicting the state sequences. In addition, for any number of states, the proposed model exhaustively assigns V/F levels to states to optimize Energy-Delay Product (EDP). Results show that the proposed model improves EDP, on average, by 30% compared to our previous work across multiple applications. Compared to two other predictive techniques, the proposed model obtains up to 30% more EDP improvement for applications with highly varying computations.

High performance computing centers need to keep up with the growing workload of varying computational characteristics. Due to their high computation rates, these computing systems consume vast amounts of energy with increasing electricity costs. As an approach to balancing computation demand with energy consumption, state-of-the-art dynamic voltage and frequency scaling (DVFS) methodologies are used for improving the energy efficiency of computing systems. However, these studies often do not explore the extent to which their solutions are close to theoretically optimal limits. This work formulates optimal boundaries for energy-time performance with a Linear Programming (LP) approach. The formulation utilizes per-core energy consumptions and execution times obtained during the profiling phase to optimize the voltage and frequency (V/F) level assignments at runtime. For each of the four benchmarks considered in this work, the optimized V/F assignments are used to bound Pareto frontiers, which trade off energy consumption and execution time. In particular, this work studies the impact of scaling the voltage and frequency of the cache subsystem in a multicore system on establishing the energy-time Pareto frontier. An unexpected result of our study is that when the frequencies of caches are not scaled with that of the cores (i.e., fixed at 2.0 GHz), the proposed LP-based technique improves the overall Energy-Delay-Product (EDP) as much as 35% compared to the traditional no-DVFS Pareto frontier. Furthermore, this work compares the performance of three heuristic-based energy-efficient DVFS algorithms to demonstrate the differences between heuristics performances and the LP-based optimal Pareto frontier.

High performance computing centers need to keep up with the growing applications of varying computational characteristics. High computation rates result in consuming vast amounts of energy with increasing electricity costs. To fulfill computational demands with reasonable energy consumption cost, dynamic voltage and frequency scaling (DVFS) technique is used for scaling voltage/frequency (V/F) levels of cores based on their time-varying workloads during application runtime. This book chapter investigates improving multicore system energy efficiency with DVFS, where optimization goal is to minimize application execution time while maintaining the energy consumption below a user-defined energy budget and vice versa. This optimization goal is achieved by performing DVFS at fine-grain level, which adjusts individual cores V/F levels, and at coarse-grain level, which divides the cores into multiple voltage/frequency islands (VFIs), where all the cores in each VFI share a common V/F level. Despite being very energy-efficient, the fine-grain VFIs have high implementation overheads. The coarse-grain VFIs provide acceptable energy efficiency with lower overheads. The fine-grain DVFS establishes energy efficiency optimality used for evaluating the coarse-grain VFIs performance. Factors considered for improving the coarse-grain VFIs energy efficiency include scheduling tasks among VFIs, clustering cores with similar workloads across application execution intervals, and fixing the VFIs V/F levels for the entire application runtime or adjusting them per application execution interval. The fine- and coarse-grain VFIs energy efficiency performances, optimized at compile-time, are evaluated on multiple applications that have varying computational characteristics. This book chapter also evaluates these optimization methodologies scalabilities for systems with different number of cores.

Greedy heuristic methodologies perform the dynamic voltage and frequency scaling (DVFS) on multicore systems based on the localized system performance data. The characteristics of applications such as their floating-point operations and memory loads can vary largely during the runtime. As such, the heuristic-based prediction of Voltage and Frequency (V/F) is suboptimal and leads to performance degradation in applications with widely varying computational demands. This work develops a new approach, Markov-based DVFS (MDVFS), which formulates a Hidden Markov Model (HMM) for predicting core utilizations (states) and V/F levels based on the observable execution times of cores across application time intervals. MDVFS uses the well-known K-means algorithm for defining states and observation levels of HMM. For solving the HMM problem, MDVFS uses the Viterbi algorithm to find a sequence of V/F levels that most likely generate the execution time sequence. This paper uses Energy-Delay2 Product (ED2 P) for measuring system energy efficiency and compares the performance of MDVFS to 2 predictive algorithms, history and feedback controller, on multiple applications. Experimental results show that for 5 out of 6 applications MDVFS, on the average, obtains up to 34% faster execution runtime and improves ED2 P by 24% compared to the history and the feedback controller.

Continuing progress and integration levels in silicon technologies make possible complete end-user systems on a single chip. This massive level of integration makes modern multi-core chips widely adoptable in multiple domains. In the design of high-performance massive multi-core chips, power and heat are dominant constraints. The increasing power consumption is of growing concern due to several reasons, e.g., cost, performance, reliability, scalability, and environmental impact. Increased power consumption not only raises chip temperature and cooling cost, but also decreases chip reliability and performance. Dynamic voltage and frequency scaling (DVFS) is a popular methodology to optimize the power usage/heat dissipation of electronic systems without significantly compromising overall system performance. The recent trend towards chip-multiprocessors (CMP) executing multi-threaded workloads with heterogeneous behavior motivates the need for per-core DVFS control mechanisms. In this paper, we propose a set of algorithms that use compile-time information to achieve DVFS control at run-time. By using compile-time information, we propose suitable heuristics, which make our power management mechanism more precise at run-time. We demonstrate that the proposed compiler-based DVFS mechanism performs better than the existing history- or profile-based methods that predict the future program behavior depending on the past statistics.

Wireless sensor networks (WSNs) can be used for a variety of tasks. The goal is to sustain such networks for as long as possible while still maintaining acceptable performance on the task. Evaluating WSNs for such diverse tasks precludes actual deployment and thus requires simulation. In this work, we compare simulators that can model power consumption and allow dynamic reconfiguration of network parameters based on feedback from the end application. The simulation results demonstrate some fundamental differences in out-of-the-box performance in terms of the way the simulators behave and calculate power consumption. With modifications to parameters and behavior, however the simulators’ outputs become more closely aligned. Overall, based on our selection criteria, ns-3 was the best WSN simulator of those evaluated for assessing the sustainability of a WSN in a variety of settings.

With a focus on static (compile-time) methods for V/F level assignments, we propose an efficient Dynamic programming (DP) technique using the Viterbi algorithm, which uses the Energy-Delay Product (EDP) as objective function to predict the best V/F levels. By using the profiled information of applications, this technique minimizes energy consumption and execution time. We evaluate and compare the performance of the proposed algorithm against three heuristic methods—a greedy version of our algorithm, a feedback controller method, and a simple heuristic that uses historical performance to make predictions for adjusting the V/F levels. Experimental results show that our algorithm outperforms the heuristics under the study by an average of 12 to 24% using the EDP performance criteria.

The millimeter wave small world network on a chip is an emerging paradigm to design low power and high-bandwidth massive multicore chips. By reducing the hop count between largely separated communicating cores, wireless shortcuts in mSWNoC have been shown to carry a significant amount of the overall traffic within the network. The amount of traffic detoured in this way is substantial and the low power wireless links enable energy savings [1]. The overall energy dissipation and thermal profile of the mSWNoC can be improved even further if the characteristics of the wireline links and associated switches are optimized according to the traffic patterns. Dynamic voltage and frequency scaling (DVFS) is a popularmethodology to optimize the power usage/heat dissipation of electronic systems without significantly compromising overall system performance.We have already demonstrated that DVFS enables improvement of power and thermal profiles of mSWNoC-enabled multicore chips.

Energy efficiency is considered a challenging problem in modern multicore systems. Partitioning the cores into multiple voltage and frequency islands (VFI) provides a compromise between simple global Dynamic Voltage Frequency Scaling (DVFS) and fine-grain per-core, per-task DVFS. This paper formulates the optimization problem of scheduling tasks statically on multiple VFIs as a Mixed Integer Linear Programming (MILP) such that for a given energy budget, the program execution time (makespan) is minimized. Our proposed solution consists of two steps. In the first step, we use an Integer Linear Programming (ILP)-based algorithm, from our previous work, to assign per-core fine-grain dynamic Voltage/Frequency (V/F) levels to each task in a task set (program) to minimize the makespan for a given energy budget. In the second step, which is the focus of this paper, we use the MILP framework to schedule this task set, with the given V/F levels provided in step one, on the islands of a VFI-enabled multicore system to again minimize the makespan subject to (1) the energy budget and (2) the task set's precedence (dependency) constraints. Together with the solutions obtained by MILP, a round-robin algorithm is used to compare these two methodologies to ILP that provides the best solution. Our experimental results show that across all the benchmarks considered, the MILP-based and round-robin makespan solutions are on average 1.2 and 2.28 times slower than the ILP-based makespan solutions, respectively.

In today's multicore systems, depending on an application's computational demand, cores are either operated individually at different Voltage/Frequency (V/F) levels or grouped into multiple Voltage-Frequency Islands (VFIs) to reduce system energy consumption. This paper formulates a task scheduling and VFI partitioning problem whose optimization goal is to minimize the task set (application) execution time (makespan) for a given energy budget. First, the combinatorial optimization problem is formulated with Integer Linear Programming (ILP) to obtain per-core, per-task dynamic V/F levels in a fine-grain VFI-based system with single-core islands. Next, static task scheduling on coarse-grain VFI-based systems, where an island can contain several cores operated at the same V/F level, is formulated with Mixed Integer Linear Programming (MILP), considering the energy budget and task set's precedence constraints. The experimental results show that under different energy budget constraints, fine-grain, dynamic task allocations provide on average 1.35x speedup over static coarse grain scheduling and partitioning methods.

The mm-wave small-world wireless NoC (mSWNoC) has emerged as an enabling interconnection infrastructure for designing high-bandwidth and energy-efficient multicore chips. In this mSWNoC architecture, long-range communication predominately takes place through the wireless shortcuts operating in the range of 10--100GHz, whereas short-range data exchange occurs through conventional metal wires. This results in performance advantages (lower latency and energy dissipation), mainly stemming from using the wireless links as long-range shortcuts between far-apart cores. The performance gain introduced by the wireless channels can be enhanced further if the wireline links of the mSWNoC are optimized according to the traffic patterns arising out of the application workloads. While there is significant energy savings, and hence temperature reduction, in the network due to the mSWNoC architecture, a load-imbalanced network is still susceptible to local temperature hotspots. In this work, we demonstrate that by incorporating congestion-avoidance routing with network-level dynamic voltage and frequency scaling (DVFS) in an mSWNoC, the power and thermal profiles can be improved without a significant impact on the overall network performance. In this work, we demonstrate how novel interconnect architectures enabled by the on-chip wireless links coupled with power management strategies can improve the energy and thermal characteristics of an mSWNoC significantly without introducing any performance degradation with respect to the conventional mesh-based NoC.

Wireless Network-on-Chip (WiNoC) has emerged as an enabling technology to design low power and high bandwidth massive multicore chips. WiNoCs based on small-world network architecture and designed with incorporating millimeter (mm)-wave on-chip wireless links offer significantly lower power and higher bandwidth compared to traditional mesh-based counterparts. In this mm-wave small-world WiNoC (mSWNoC), long distance communication predominately takes place through the wireless shortcuts whereas the short-range data exchange still occurs through the conventional metal wires. This results in performance advantages mainly stemming from using the wireless links as long-range shortcuts between far apart cores. This performance gain can be enhanced further if the wireline links and the processing cores of the WiNoC are optimized according to the traffic patterns and application workloads. In this work, we demonstrate that by incorporating both processor- and network-level dynamic voltage and frequency scaling (DVFS) in an mSWNoC, the power and thermal profiles can be improved without a significant impact on the overall execution time. We also show that depending on the applications, temperature hotspots can be formed either in the processing cores or in the network infrastructure. The proposed dual-level DVFS is capable of addressing both types of hotspots. In this work we will demonstrate how novel interconnect architectures enabled by the on-chip wireless links coupled with power management strategies can improve the energy and thermal characteristics of a NoC significantly.

In today’s multicore systems, depending on an application’s computational demand, cores are either operated individually at different Voltage/Frequency (V/F) levels or grouped into multiple Voltage-Frequency Islands (VFIs) to reduce system energy consumption. This paper formulates a task scheduling and VFI partitioning problem whose optimization goal is to minimize the task set (application) execution time (makespan) for a given energy budget. First, the constrained optimization problem is formulated with integer Linear Programming (ILP) to obtain per-core, per-task dynamic V/F levels in a fine-grain VFI-based system with single-core islands. Next, static task scheduling on coarse-grain VFI-based systems, where an island can contain several cores operated at the same V/F level, is formulated with Mixed integer Linear Programming (MILP), considering the energy budget and task set’s precedence constraints. As an extension of this work and to address varying computational workload of the applications at runtime, this paper proposes a DVFS-enabled VFI system, which forms the VFIs based on the cores’ workload similarities and dynamically adjusts the VFIs’ V/F levels over the applications’ execution phases. The experimental results show that under different energy budget constraints, fine-grain, dynamic task allocations provide on average 1.35x speedup over static coarse-grain scheduling and partitioning methods. Also, the results show that while our dynamically tuned VFI system’s performance is comparable to the fine-grain V/F assignment technique, compared to the static task scheduling/VFI partitioning method, it achieves on average 1.5x speedup across the applications considered in this study.

This paper presents the design, deployment, and evaluation of a real-world sensor network system in an active volcano - Mount St. Helens. In volcano monitoring, the maintenance is extremely hard and system robustness is one of the biggest concerns. However, most system research to date has focused more on performance improvement and less on system robustness. In our system design, to address this challenge, automatic fault detection and recovery mechanisms were designed to autonomously roll the system back to the initial state if exceptions occur. To enable remote management, we designed a configurable sensing and flexible remote command and control mechanism with the support of a reliable dissemination protocol. To maximize data quality, we designed event detection algorithms to identify volcanic events and prioritize the data, and then deliver higher priority data with higher delivery ratio with an adaptive data transmission protocol. Also, a light-weight adaptive linear predictive compression algorithm and localized TDMA MAC protocol were designed to improve network throughput. With these techniques and other improvements on intelligence and robustness based on a previous trial deployment, we air-dropped 13 stations into the crater and around the flanks of Mount St. Helens in July 2009. During the deployment, the nodes autonomously discovered each other even in-the-sky and formed a smart mesh network for data delivery immediately. We conducted rigorous system evaluations and discovered many interesting findings on data quality, radio connectivity, network performance, as well as the influence of environmental factors.

Wireless Sensor Networks (WSNs) face many challenges including reliability, flexibility and security. When WSNs deployed in remote locations need to be reprogrammed, environmental conditions often make it impossible to physically retrieve them. Over the Air Programming (OAP) plays an important role in achieving this task. Additionally remote management of the WSN is crucial as it allows the user to monitor the download process. Cybersecurity of the WSN helps to ensure that the communication is properly authenticated. Several platform dependent protocols have been developed for OAP including Deluge and MOAP. Due to the restrictions of these platform-dependent protocols, any modifications to the hardware require modifications to the underlying protocol. For example, using OAP for iMote2 sensors requires porting Deluge from an existing hardware. We present the many challenges that we faced in making OAP possible on an iMote2 sensor network platform, including changes and upgrades to: file system management, Java toolbase and GUI implementation, reboot mechanism, robustness and boot loader. The performance of our OAP on the iMote2 platform is evaluated using a real sensor network along the completion time, overhead, and robustness dimensions.

In response to NASA's announced requirement for Earth hazard monitoring sensor-web technology, a multidisciplinary team involving sensor-network experts (Washington State University), space scientists (JPL), and Earth scientists (USGS Cascade Volcano Observatory (CVO)), have developed a prototype of dynamic and scalable hazard monitoring sensor-web and applied it to volcano monitoring. The combined Optimized Autonomous Space - In-situ Sensor-web (OASIS) has two-way communication capability between ground and space assets, uses both space and ground data for optimal allocation of limited bandwidth resources on the ground, and uses smart management of competing demands for limited space assets. It also enables scalability and seamless infusion of future space and in-situ assets into the sensor-web. The space and in-situ control components of the system are integrated such that each element is capable of autonomously tasking the other. The ground in-situ was deployed into the craters and around the flanks of Mount St. Helens in July 2009, and linked to the command and control of the Earth Observing One (EO-1) satellite.

Earlier sensor network MAC protocols focus on energy conservation in low-duty cycle applications, while some recent applications involve real-time high-data-rate signals. This motivates us to design an innovative localized TDMA MAC protocol to achieve high throughput and low congestion in data collection sensor networks, besides energy conservation. TreeMAC divides a time cycle into frames and frame into slots. Parent determines children's frame assignment based on their relative bandwidth demand, and each node calculates its own slot assignment based on its hop-count to the sink. This innovative 2-dimensional frame-slot assignment algorithm has the following nice theory properties. Firstly, given any node, at any time slot, there is at most one active sender in its neighborhood (including itself). Secondly, the packet scheduling with TreeMAC is bufferless, which therefore minimizes the probability of network congestion. Thirdly, the data throughput to gateway is at least 1/3 of the optimum assuming reliable links. Our experiments on a 24 node test bed demonstrate that TreeMAC protocol significantly improves network throughput and energy efficiency, by comparing to the TinyOS's default CSMA MAC protocol and a recent TDMA MAC protocol Funneling-MAC [8].

In a volcano monitoring application, various geophysical and geochemical sensors generate continuous high-fidelity data, and there is a compelling need for real-time raw data for volcano eruption prediction research. It requires the network to support network synchronized sampling, online configurable sensing and situation awareness, which pose significant challenges on sensing component design. Ideally, the resource usages shall be driven by the environment and node situations, and the data quality is optimized under resource constraints. In this paper, we present our smart sensing component design, including hybrid time synchronization, configurable sensing, and situation awareness. Both design details and evaluation results are presented to show their efficiency. Although the presented design is for a volcano monitoring application, its design philosophy and framework can also apply to other similar applications and platforms.

Applications and services are increasingly dependent on networks of smart sensors embedded in the environment to constantly sense and react to events. In a typical sensor network application, information is collected from a large number of distributed and heterogeneous sensor nodes. Information fusion in such applications is a challenging research issue due to the dynamicity, heterogeneity, and resource limitations of sensor networks. We present MidFusion, an adaptive middleware architecture to facilitate information fusion in sensor network applications. MidFusion discovers and selects the best set of sensors or sensor agents on behalf of applications (transparently), depending on the quality of service (QoS) guarantees and the cost of information acquisition. We also provide the theoretical foundation for MidFusion to select the best set of sensors using the principles of Bayesian and Decision theories. A sensor selection algorithm (SSA) for selecting the best set of sensors is presented in this paper. Our theoretical findings are validated through simulation of the SSA algorithm on an example scenario.

Introducing long-range, low-power, and high-bandwidth, single-hop links between far apart cores can significantly enhance the performance of Network-on-Chip (NoC) fabrics. Design of a small-world network-based NoC architecture with on-chip wireless links is capable of improving the overall latency and energy dissipation characteristics compared to the conventional wireline-based counterpart. This chapter focuses on incorporating long-range wireless links on a small-world NoC topology through the use of either carbon nanotube or millimeter-wave antennas.

The small-world NoC (SWNoC) is an enabling interconnect architecture to design high-performance and low-power multicore chips. As the SWNoC has an overall irregular topology, it is extremely important to design suitable deadlock-free routing mechanisms for it. Latency, energy dissipation, and the thermal profile are affected by the adopted routing methodologies. This chapter focuses on the design of topology-agnostic routing strategies for the irregular SWNoC network architecture.

The performance advantages of millimeter-wave SWNoC (mSWNoC) mainly stem from using the wireless links as long-range shortcuts between far apart cores. This performance gain can be enhanced further if the characteristics of the wireline links and the processing cores of the mSWNoC are optimized according to traffic patterns and workloads. This chapter focuses on incorporating both processor- and network-level dynamic voltage and frequency scaling which can enhance the power and thermal profiles of the Network-on-Chip without a significant impact on the overall execution time. Also, depending on the benchmark application, temperature hotspots can be formed in either the processing cores or the network infrastructure. This chapter addresses both these types of hotspots.

Networks-on-Chip (NoCs) represent a capable solution to complex networks. NoC communication architectures currently are based on either completely regular or fully customized topologies. Complex networks are capable of having the performance of fully customizable network while having the general purpose use of a regular network. The performance of NoC fabrics can be significantly enhanced by introducing shortcuts between far apart cores. The performance improvement is achieved through efficient data routing and optimum placement of shortcuts. This chapter focuses on the small-world NoC (SWNoC) topology and discusses the components required to design a SWNoC.

To enhance the performance of conventional interconnect-based multicore chips, on-chip wireless interconnect has emerged as a radically different technology. However, this emerging interconnect paradigm imposes significant challenges pertaining to reliable integration and design. This chapter focuses on the performance evaluation of two types of wireless small-world NoC architectures. One uses carbon nanotube antennas, whereas the other uses with millimeter-wave antennas. Both are shown to outperform traditional wire-based NoCs by several orders of magnitude in power dissipation and latency. The wireless small-world NoC is also compared against a wireless hierarchical NoC for complete analysis.

The Network-on-Chip (NoC) paradigm has emerged as a scalable interconnection infrastructure for modern massive multicore chips. However, with growing levels of integration, traditional NoCs suffer from high latency and energy dissipation in on-chip data transfer due to conventional multihop metal-/dielectric-based interconnects. Three-dimensional integration, on-chip photonics, RF, and wireless links have been proposed as radical low-power and low-latency alternatives to the conventional planar wire-based designs. Wireless NoCs with carbon nanotube (CNT) or millimeter (mm)-wave metal antennas are shown to outperform traditional wire-based NoCs significantly in achievable data rate and energy dissipation. However, such emerging and transformative technologies can be prone to high levels of failures due to various issues related to manufacturing challenges and integration. On the other hand, several naturally occurring complex networks such as colonies of microbes and the World Wide Web are known to be inherently robust against high rates of failures and harsh environments. Adoption of such complex network-based architectures to design wireless NoCs enables wireless NoC architectures that have better achievable bandwidth, energy dissipation, thermal profiles, and fault tolerance over traditional wireline mesh architectures. This chapter focuses on current research in irregular NoC topologies, topology-agnostic routing, 3D, optical, and wireless NoC integration, and power- and temperature-aware design considerations.

While there is a significant temperature reduction in the network due to the millimeter-wave SWNoC (mSWNoC) architecture, a load-imbalanced network is still susceptible to local temperature hotspots. This chapter focuses on addressing the problem of network-induced temperature hotspots in the mSWNoC by incorporating a temperature-aware rerouting-based Dynamic Thermal Management (DTM) strategy with network-level Dynamic Voltage and Frequency Scaling (DVFS). This joint DTM and DVFS can further reduce the power, and hence reduce temperature hotspots without compromising the achievable performance benefits.

As we demand more from our computing systems, they will be limited by power, energy, and thermal constraints. Without new paradigms of energy-efficient designs, producing information and communication technology systems capable of meeting the computing, storage, and communication demands of emerging applications will be unlikely. Architectural innovation in conjunction with suitable power and thermal management strategies is the key for designing high-performance yet energy-efficient massive multicore chips. This chapter focuses on incorporating dynamic thermal management on a multicore chip designed with long-range wireless shortcuts. The chapter shows that this improves the thermal profile of the chip while simultaneously providing lower latency and reduced network energy compared to a conventional mesh-based counterpart.

This paper studies the wireless sensor networks (WSN) application scenario with periodical traffic from all sensors to a sink. We present a time-optimum and energy-efficient packet scheduling algorithm and its distributed implementation. We first give a general many-to-one packet scheduling algorithm for wireless networks, and then prove that it is time-optimum and costs [image omitted] , N(u0) - 1) time slots, assuming each node reports one unit of data in each round. Here [image omitted] is the total number of sensors, while [image omitted] denotes the number of sensors in a sink's largest branch subtree. With a few adjustments, we then show that our algorithm also achieves time-optimum scheduling in heterogeneous scenarios, where each sensor reports a heterogeneous amount of data in each round. Then we give a distributed implementation to let each node calculate its duty-cycle locally and maximize efficiency globally. In this packet-scheduling algorithm, each node goes to sleep whenever it is not transceiving, so that the energy waste of idle listening is also mitigated. Finally, simulations are conducted to evaluate network performance using the Qualnet simulator. Among other contributions, our study also identifies the maximum reporting frequency that a deployed sensor network can handle.

Service-oriented architectures (SOAs) promise to provide transparency to resource access by exposing the resources available as services. SOAs have been employed within pervasive computing systems to provide essential support to user tasks by creating services representing the available resources. The mechanism of combining two or more basic services into a possibly complex service is known as service composition. Existing solutions to service composition employ a template-matching approach, where the user needs are expressed as a request template, and through composition, a system would identify services to populate the entities within the request template. However, with the dynamism involved in pervasive environments, the user needs have to be met by exploiting available resources, even when an exact match does not exist. In this paper, we present a novel service composition mechanism for pervasive computing. We employ the service-oriented middleware platform called pervasive information communities organization (PICO) to model and represent resources as services. The proposed service composition mechanism models services as directed attributed graphs, maintains a repository of service graphs, and dynamically combines multiple basic services into complex services. Further, we present a hierarchical overlay structure created among the devices to exploit the resource unevenness, resulting in the capability of providing essential service-related support to resource-poor devices. Results of extensive simulation studies are presented to illustrate the suitability of the proposed mechanism in meeting the challenges of pervasive computing user mobility, heterogeneity, and the uncertain nature of involved resources.

In this paper we present an adaptive application-driven power management (AADPM) strategy with online idle period length distribution learning capability for the IEEE 802.11b WLAN. We discuss its design and evaluate the performance in comparison with other power management strategies using the network simulator NS2. We simulated both the single user and multiple user scenarios. Experimental results have shown that, compared with other power management methods examined in this paper, AADPM achieved the highest energy saving in all cases and it demonstrated strong adaptability to network congestion.

Dynamic voltage and frequency scaling (DVFS) is a well-known technique to optimize the power dissipation of electronic systems without significantly compromising overall system performance. DVFS exploits the periods of inter-core data exchange (memory-bound operations) to reduce the voltage and frequency (V/F) of the cores in order to reduce the power dissipation during the execution flow of an application running on the CMP. As the lengths of the idle and busy periods of the cores vary depending on the benchmarks, it is crucial for any DVFS technique to maximize the power saving without losing a significant performance. In this work we present two power optimization methodologies that are integrated into a full-system simulator to make online predictions about the voltage and frequency of the cores during the execution time of the benchmarks. We evaluate these methodologies in terms of the V/F predictions vs. the actual utilization of each core periodically. We also compare the overall execution time, energy dissipation, and energy-delay product (EDP) of the power optimization methodologies for various benchmarks.

With voltage frequency islanding (VFI) we are able to change the voltage and frequency of the processors to save power within a certain performance constraint. In this work we want to maximize potential power savings and minimize time penalty by means of efficient task scheduling in VFIs. A new scheduling algorithm is presented which schedules the tasks onto the processing cores in the VFI by ranking them based on the computation load and communication load among other tasks. The mapping of the tasks is relevant to the processing speed of the cores and the simulation results show improvements compared to the default task scheduler of Linux.

The millimeter-wave small-world wireless NoC (mSWNoC) is shown to be capable of improving the overall latency and energy dissipation characteristics compared to the conventional wireline mesh-based counterpart. The mSWNoC helps in improving the energy dissipation even further in presence of dynamic voltage and frequency scaling (DVFS). On-chip voltage regulators are required to tune the voltage depending on the workload. Though it is possible to have multiple voltage levels by designing suitable on-chip regulators, certain voltage levels are underutilized for specific applications. Hence, unnecessary voltage levels should be pruned, reducing the design complexity of the on-chip voltage regulators. In certain circumstances, the pruned DVFS method improves the energy-delay product (EDP) compared to the fine-grained DVFS while still remaining within an acceptable performance boundary.

We propose a service discovery architecture called VSD (Service Discovery based on Volunteers) for pervasive computing environments. The proposed architecture exploits stable and resourceful nodes, called volunteers, that perform directory services in the network. The VSD architecture recognizes node heterogeneity in terms of mobility and capability. We analyze the characteristics of VSD architecture and operations for optimal system performance. Additionally, trust management is incorporated for secure collaboration among nodes in open environments. By showing that VSD outperforms broadcast-based solutions in MANET scenarios prevalent in pervasive environments, we validate that VSD is a flexible and adaptable architecture appropriate for dynamic environments.

Summary Due to interesting physical properties and wide availability of thallium-201 as a SPECT radionuclide, the idea of incorporation of this nuclide into biologically active compounds was targeted. Thallium-201 (T 1/2 = 3.04 d) in Tl+ form was converted to Tl3+ cation in presence of O3 in 6 M HCl controlled by RTLC/gel electrophoresis methods. The final evaporated activity was reacted with bleomycin in normal saline to yield [201Tl]BLM at room temperature after 0.5 h (radiochemical yield > 99%) followed by HPLC analysis. The studies showed that thallic ion is mostly incorporated into bleomycin A2 while other species in the pharmaceutical sample almost remain unlabeled. Radiochemical purity of more than 99% was obtained using RTLC, HPLC with specific activity of about 7 Ci/mmol. The stability of the tracer was checked in the final product in presence of human serum at 37 °C up to 3 d. The tracer accumulated in tumors of fibrosarcoma-bearing mice after 72 h.

In pervasive and mobile computing environments, ''timely and reliable'' access to public data requires methods that allow quick, efficient, and low-power access to information to overcome technological limitations of wireless communication and access devices. The literature suggests broadcasting (one-way communication) as an effective way to disseminate the public data to mobile devices. Within the scope of broadcasting, the response time and energy consumption of retrieval methods have been used as the performance metrics for measuring the effectiveness of different access methods. The hardware and architecture of the mobile units offer different operational modes that consume different energy levels. Along with these architectural and hardware enhancements, techniques such as indexing, broadcasting along parallel channels, and efficient allocation and retrieval protocols can be used to minimize power consumption and access latency. In general, the retrieval methods attempt to determine the optimal access pattern for retrieving the requested data objects on parallel broadcast channels. The employment of heuristics provides a methodology for such ideal path planning solutions. Using informative heuristics and intelligent searches of an access forest can provide a prioritized cost evaluation of access patterns for requested data objects and, hence, an optimal path for the access of requested data on broadcast air channels. This paper examines two scheduling methods that along with a set of heuristics generate and facilitate the access patterns for retrieving data objects in the presence of conflicts in an indexed parallel broadcast channel environment. A simulation of the proposed schemes is presented for analyzing the relationship between response time and power consumption.

The pervasive information community organization is a framework for creating mission-oriented dynamic communities of autonomous software entities that perform tasks for users and devices. PICO's telemedicine example scenario demonstrates its potential as a simple, unique, and versatile middleware framework for pervasive computing.

We present adaptive resource management middleware techniques for periodic tasks in dynamic real-time distributed systems. The techniques continuously monitor the application at run-time for adherence to the desired real-time requirements, detect timing failures or trends for impending failures (due to workload fluctuations), and dynamically allocate resources by replicating subtasks of application tasks for load sharing. The objective of the techniques is to minimize (end-to-end) missed deadline ratios of the tasks. We present "predictive" resource allocation algorithms that determine the number of subtask replicas that are required for adapting the application to a given workload situation using statistical regression theory. The algorithms use regression equations that forecast subtask timeliness as a function of external load parameters such as number of sensor reports and internal resource load parameters such as CPU utilization. To evaluate the performance of the predictive algorithms, we consider algorithms that determine the number of subtask replicas using empirically determined heuristic functions. We implemented the resource management algorithms as part of a middleware infrastructure and measured the performance of the algorithms using a real-time benchmark. The experimental results indicate that the predictive algorithms outperform the heuristic strategies under the workload conditions that were studied.

Traditional multicore designs, based on the Network-on-Chip (NoC) paradigm, suffer from high latency, significant power consumption and temperature hotspots as the system size scales up due to the inherent multi-hop nature of the communication fabric. NoCs have been shown to achieve increased performance by inserting long-range wired links following the principles of small-world graphs [1]. Design and optimization of multi- and many-core systems on chip (SoCs) that exploit small-world effects have already been demonstrated [1]. Small-world graphs are characterized by many short-distance links between neighboring nodes as well as a few relatively long-distance direct shortcuts. These networks can be further improved by replacing the long-distance shortcuts with single-hop, energy-efficient, wireless links. Wireless NoCs (WiNoCs) with millimeter (mm)-wave wireless links working at 10–100 GHz is envisioned as an enabling technology to design low-power and high-bandwidth massive multicore architectures [2]. These mm-wave small-world NoC (mSWNoC) networks are used as the interconnection backbone in this work.

The following topics are dealt with: parallel processing; graphics processing units; learning (artificial intelligence); field programmable gate arrays; parallel programming; optimisation; multiprocessing systems; parallel algorithms; parallel architectures; graph theory.

In the design of high-performance massive multicore chips, power and temperature have become dominant constraints. Traditional multicore designs, based on the Network-on-Chip (NoC) paradigm, suffer from high latency and power dissipation as the system size scales up due to the inherent multi-hop nature of communication. Introducing long-range, low-power, and high-bandwidth wireless shortcuts between far apart cores can significantly enhance the performance of NoC fabrics. The millimeter-wave small-world NoC (mSWNoC) is shown to be capable of improving the overall latency and energy dissipation characteristics compared to the conventional mesh-based counterpart. While there is a significant temperature reduction in the network due to the mSWNoC architecture, a load-imbalanced network is still susceptible to local thermal hotspots. In this paper, we address the problem of network-induced temperature hotspots in mSWNoC by incorporating adaptive routing strategies, which can reduce temperatures even further without compromising the achievable performance benefits.

This paper presents resource management techniques that achieve the quality of service (QoS) requirements of dynamic real-time systems using open architectures and commercial off-the-shelf technologies (COTS). Dynamic real-time systems are subject to constant changes such as a varying external environment, overload of internal systems, component failure, and evolving operational requirements. Examples of such systems include the emerging generation of computer-based, command and control systems of the U.S. Navy. To enable the engineering of such systems, we present adaptive resource management middleware techniques that achieve the QoS requirements of the system. The middleware performs QoS monitoring and failure detection, QoS diagnosis, and reallocation of resources to adapt the system to achieve acceptable levels of QoS. Experimental characterizations of the middleware using a real-time benchmark illustrate its effectiveness for adapting the system for achieving the desired real-time and survivability QoS during overload situations.

Some classes of realhtime systems function in environments, which cannot be modeled with static approaches. In such environments, the arrival rates of events which drive transient computations may be unknown. Also, periodic computations may be required to process varying numbers of data elements per period, but the number of data elements to be processed in an arbitrary period cannot be known at the time of system engineering, nor can an upper bound be determined for the number of data items; thus, a worst case execution time cannot be obtained for such periodics. This paper presents middleware services that support such dynamic realhtime systems through load balancing. The middleware services have been implemented and employed for (1) the DynBench dynamic realhtime benchmark suite and (2) an experimental Navy system. Experimental results show the effectiveness of our load balancing techniques for consistently delivering realhtime qualityhofhservice, even in highly dynamic environments.