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In this work a cylindrical electrode array to be used for electrical stimulation of sacral nerve roots is studied in respect to its ability to achieve selective stimulation of various spatial regions of the nerve bundle. Simulation results achieved on a simplified model consisting of 6 electrodes evenly distributed along the sacral root perimeter indicate that this goal is feasible. A demonstrator of the proposed electrode array was designed and is implemented on an ultra-thin polyimide foil that is to be rolled around the sacral root bundle and then fixed adhesively. Multichannel steering electronics connected through the rigid silicon chip will be used to perform in vivo animal tests for the proof of concept

In RF-MEMS packaging, next to the protection of movable structures, optimization of package electrical performance plays a very important role. In this work, a wafer-level packaging process has been investigated and optimized in order to minimize electrical parasitic effects. The RF-MEMS package concept used is based on a wafer-level bonding of a capping silicon substrate to an RF-MEMS wafer. The capping silicon substrate resistivity, substrate thickness and the geometry of through-substrate electrical interconnect vias have been optimized using finite-element electromagnetic simulations (Ansoft HFSS). Test structures for electrical characterization have been designed and after their fabrication, measurement results will be compared with simulations., Comment: Submitted on behalf of TIMA Editions (http://irevues.inist.fr/tima-editions)

High-resistivity polycrystalline silicon (HRPS) wafers are explored as a novel low-cost and low-loss substrate in Wafer-Level Chip-Size Packaging (WLCSP) for RF applications. The WLCSP solution we demonstrate is based on adhesive bonding of a HRPS wafer to a silicon wafer with active devices. After bonding, the IC wafer is thinned below 50 µm and selectively removed to expose its front-side contact pads. The HRPS wafer serves as a mechanical carrier, thermal spreader and vertical spacer in which vias are etched by DRIE to reach desired pads on the IC wafer. Then after a seed layer sputtering, a 5-10 µm Cu layer is plated on both wafer sides and patterned providing a back-side ground plane and large, front-side RF passives. Due to HRPS electrical properties, no dielectric isolation layer is required inside vias, simplifying the front-side processing. Solder bumping on the substrate backside and singulation by dicing complete the processing. The presented concept enables integration of large RF passives with a spacing of >150 µm to the conductive silicon substrate containing the circuitry, while providing mechanical stability, reducing form factor and avoiding any additional RF loss. Antenna performance comparable to glass substrates and high quality factors for large spiral inductors (Q=11 at 1 GHz; 34 nH) are demonstrated. The HRPS substrates have high dielectric constant, low RF loss, high thermal conductivity, perfect thermal matching, and processing similar to the single-crystalline silicon., Fundação para a Ciência e a Tecnologia (FCT) – SFRH/BD/4717/2001, POCTI/ESSE/38469/2001, FEDER., Comunidade Europeia (CE) – (project Blue Whale IST – 2000 – 3006).

This paper reports on design and fabrication options of an integrated folded shorted-patch chip-size antenna for applications in short-range wireless microsystems. The antenna is built using a stack of two adhesively bonded wafers with patterned metallization and through-wafer electrical interconnects. Different fabrication options based on via formation in glass and/or high-resistivity silicon substrates using excimer laser ablation or powder blasting are analyzed., Fundação para a Ciência e Tecnologia (FCT) (SFRH/BD/4717/2001, POCTI/ESE/38468/2001, FEDER), and EC (project Blue Whale IST-2000-10036).

We report on design and fabrication of a folded-patch chip-size antenna for operation at 5.7 GHz and use in short-range wireless communications. Application of wafer-level chip-scale packaging (WLCSP) techniques like adhesive wafer bonding and through-wafer electrical via formation, combined with the selected antenna type allows on-chip integration and is the main novelty of our design work. This antenna, built on two stacked substrates, allows size reduction down to 4.5x4x1 mm3 and has projected efficiency of 66%., Fundação para a Ciência e Tecnologia (FCT) (SFRH/BD/4717/2001, POCTI/ESE/38468/2001, FEDER), and by EC (project Blue Whale IST-2000-10036).

This paper reports on fabrication and design considerations of an integrated folded shortedpatch chip-size antenna for applications in short-range wireless microsystems and operating frequency of 5.7 GHz. Antenna fabrication is based on wafer-level chip-scale packaging (WLCSP) techniques and consists of two adhesively bonded glass wafers with patterned metallization and through-wafer electrical interconnects. Two different fabrication options based on via formation in glass substrates using excimer laser ablation or powder blasting are presented., Fundação para a Ciência e Tecnologia (FCT) - (POCTI/ESE/38468/2001, SFRH/BD/4717/2001), EU (IST-2000-10036).

This work reports on the use of bulk-micromachining technology to increase the efficiency of a folded shorted-patch antenna. This antenna was designed on two stacked wafers (glass bonded on high-resistivity silicon). The analysis was carried out using the HFSS FEM tool. It was shown that bulk-micromachining technology could be used together with HRS to increase the antenna efficiency by ~20 %. Also, it can be used to allow the use of low-resistivity silicon for antenna substrate. Furthermore, bulk-micromachining technology can be used as an option to tune or to select the antenna operating frequency., Fundação para a Ciência e Tecnologia (FCT) -SFRH/BD/4717/2001, POCTI/ESE/38468/2001.

The measured S-parameters of a coplanar waveguide (CPW) propagating the dominant mode were used to obtain the electrical permittivity and the dielectric loss tangent of three different glass wafers: non-alkaline Schott AF45, Corning Pyrex #7740 and Hoya SD-2. These properties were obtained up to 10 GHz. The obtained values were used together with the CPW model in ADS to obtain the simulated S-parameters for the used CPW cell. The obtained results shows good agreement between simulated and measured data., Fundação para a Ciência e Tecnologia (FCT) - (POCTI/ESE/38468/2001).

We report on design, fabrication and characterization of chip-size antennas for operation at 5.7 GHz and use in wireless sensor networks. Application of wafer-level chipscale packaging (WLCSP) techniques like adhesive wafer bonding and through-wafer electrical via formation, combined with the selected antenna types (patch and folded patch) allows on-chip integration and is the main novelty of our work. A short-range wireless link between two systems both equipped with an 8x8 mm2 patch antenna (measured characteristics: 5.705 GHz central frequency, 90 MHz bandwidth @ -10 dB, 0.3 dB gain, 18% efficiency) realized on a high-resistivity silicon (HRS) substrate is demonstrated. A folded-patch antenna built on two stacked glass substrates allows size reduction down to 4.5x4x1 mm3 and has a projected efficiency of 60%., Fundação para a Ciência e Tecnologia (FCT), project (SFRH/BD/4717/2001 and POCTI/ESE/38468/2001).

This paper presents the design and characterization of a patch antenna built on lossy substrates compatible with integrated circuits fabrication. Two different substrates were used for antenna implementation: high-resistivity silicon (HRS) and Corning Pyrex #7740 glass. The antenna prototypes were built to operate close to the 5 GHz ISM band where applications like HIPERLAN and IEEE802.11a are standardized. They operate at a center frequency of 5.705 GHz (HRS) and 5.995 GHz (Pyrex). The studied parameters were: substrate thickness, substrate losses, oxide thickness, metal conductivity and thickness. The antenna on HRS uses an area of 8 mm2, providing a 90 MHz bandwidth and ~0.3 dBi of gain. On a glass substrate, the antenna uses 12 mm2, provides 100 MHz bandwidth and ~3 dBi of gain., Fundação para a Ciência e Tecnologia (FCT), project (SFRH/BD/4717/2001 and POCTI/ESE/38468/2001)

Microspectrometers, which read color and the results from analytical chemistry, are used for quality inspection in industry and agiculture. They read the chromatography results by measuring the infrared (IR) absorption of the chemical constituent between the IR source and the grating. Micromachining can implement the dispersion and detection elements in a silicon microspectrometer so that it can analyze the spectrum of incident light. The microspectrometer may either operate an array of detectors, each with a uniform spectral response, or scan the dispersion element using a single calibrated detector. Compared to bulky macroscopic devices, this microspectrometer has inferior spectral resolution but its small size and low cost more than compensates for this limitation in many applications., FCT

Thin-film Fabry-Perot (F-P) optical resonators are studied for application as wavelength-selecting elements in on-chip spectrometers. The interface roughness between the different resonator layers (Al /PECVD SiO2 / Ag) is identified to be the primary source of light scattering and energy losses. It is demonstrated that conventional IC fabrication yields layers with RMS interface roughness easily exceeding 10 nm. When applied to the visible spectral range, such a roughness causes significant degradation of the F-P filter quality factor. Moreover, the scattered light contributes to transmittance outside the narrow resonance band to which the F-P filter is tuned and overall device performance is decreased.

This paper describes a method for significantly improving the performance of integrated Fabry- Perot- based optical spectral analysers, in terms of spectral selectivity and/or requirements on the input light beam conditioning. The method is based on compensation of the stray-light components induced by the non-idealities of both the incident light beam and a Fabry-Perot (F-P) resonator. The compensation structure consists of the same layer stack as used in the active F-P filter. The difference is that the optical length of the cavity is decreased below λ/10 (, Dutch Technology Foundation - STW project DEL 55.3733., Fundação para a Ciência e a Tecnologia (FCT) - Praxis XXIBD/5181/95

A single-chip CMOS microspectrometer containing an array of 16 addressable fixed-cavity Fabry-Perot etalons, photodetectors and circuits for read-out, multiplexing and driving the ISS sensor bus has been fabricated. This resulted in a chip that can operate using only five external connections (including Vdd and Vss) covering the optical range of 400-500 nm with FWHM=18nm. Frequency output and serial bus interface allow easy multi-sensor, multi-chip interfacing using a microcontroller., STW - (project DEL 55.3733)., TUDelft, Fundação para a Ciência e a Tecnologia (FCT) - Praxis XXI-BD/5181/95.

MEMS are usually designed for measuring one parameter and on-chip co-integration of sensor (microstructure) and readout circuits is often pursued. In a multi-parameter measurement system, yield considerations and fabrication compatibility problems favor micro-instruments based on active Si-MCM techniques. The generic device is based on a stacked structure with a universally applicable active silicon MCM platform that contains all the infrastructural functions of a measurement system. Customizing the microsystem requires flip-chip attach of sensor dies and a commercially available microcontroller die, which is subsequently programmed for the intended application. The micro-instrument features a data pre processing capability to provide high-level data (e.g. spectral information rather than raw sensor data) and to communicate with a host processor intelligently., STW - project DEL 55.3733., TU Delft, Fundação para a Ciência e Tecnologia (FCT) - Program Praxis XXI-BD/5181/95.

A single-chip CMOS optical microspectrometer containing an array of 16 addressable Fabry-Perot etalons (each one with different resonance cavity length), photodetectors and circuits for readout, multiplexing and driving a serial bus interface has been fabricated in a standard 1.6 mm CMOS technology (chip area 3.9x4.2 mm2). The result is a chip that can operate using only four external connections (including Vdd and Vss) covering the optical range of 380-500 nm with FWHM=18 nm. Frequency output and serial bus interface allow easy multisensor, multichip interfacing using a microcontroller or a personal computer. Power consumption is 1250 mW for a clock frequency of 1 MHz, The authors thank the staff of Delft Institute of Microelectronics and Submicron Technology (DIMES) for device fabrication. This work is supported in part by STW (project DEL 55.3733), TU-Delft and FCT-Portugal (Program Praxis XXI-BD/5181/95).

The design, fabrication and measured characteristics of a bulk-micromachined tunable Fabry–Perot microinterferometer (FPMI) for the visible spectral range are presented. The FPMI is formed by two parallel 40 nm thick silver mirrors supported by a 300 nm low tensile stress silicon nitride membrane with a square aperture (side length of 2 mm) and initial cavity gap of 1.2 µm. One of the mirrors is fixed, the other is under tension on a movable Si frame, which is electrostatically deflected, using several distributed electrodes, to control cavity spacing and mirror parallelism. Performance achieved is: high flatness of the mirrors (λ/10 for the visible part of the spectrum), low control voltages (, Fundação para a Ciência e Tecnologia (FCT)

A micro-spectrometer has been realized based on an array of Fabry-Perot thin-film optical resonators. The 16 channel micro-spectrometer is IC fabrication compatible and operates in the visible spectral range with an inter-channel shift of 6 nm. Each of the channels is sensitive in a single peak with FWHM of 16 nm. A FWHM < 2 nm and finesse of 40 for narrowband operation is demonstrated., STW - Project DEL 55.3733. TUDelft. Fundação para a Ciência e Tecnologia - Praxis XXI-BD/5181/95.

Optical microsystems with high spectral selectivity and fabrication compatible with a standard CMOS process have been realized. PN junction photodiodes are used for photodetection. A multi-layer optical filter fabricated on top of the active photodiode forms a Fabry-Perot optical resonance cavity. The resonance wavelength can be designed within the entire visible spectrum. The filters are fabricated by depositing thin layers (SiO2, Al, Ag) with thickness and composition optimized for the required spectral response. Operation is demonstrated on a device with a 20nm Al/250nm SiO2/45nm Ag filter resulting in a narrow transmission peak (FWHM=18nm) with maximum responsivity of 14.8 mA/W at 420nm. IC-fabrication compatibility of this device allows the on-chip integration of A-to-D conversion based on a frequency or bitstream signal., STW - Project DEL.3733.

The design, fabrication and measured characteristics of micromachined Fabry- Perot (F-P) optical filters for the visible spectral range are presented. Silver films of 40-50 nm thickness, evaporated on a 300 nm thick low-stress silicon nitride membrane, are used as high-quality mirrors. Two parallel mirrors, with a square aperture of up to 2x2 mm2 and initial cavity gap of 1.2 µm, form a tunable Fabry- Perot optical filter. One of the mirrors is fixed the other is under tension on a movable Si frame, which is electrostatically deflected to control the mirror spacing and parallelism. Results are compared with non-tunable F-P filters that are composed of an Ag/SiN/Ag or Ag/SiO2/Al layer stack. The FWHM of 40 nm (tunable filter) and 16 nm (non-tunable filter) have been achieved., STW - Project DEL 55.3733. Junta Nacional de Investigação Científica e Tecnológica - PRAXIS XXI-BD/5181/95.

The design, fabrication and measured characteristics of a bulk-micromachined tunable Fabry-Perot MicroInterferometer (FPMI) for the visible spectral range are presented. The FPMI is formed by two parallel 40 nm thick silver mirrors supported by a 300 nm low-tensile stress silicon nitride membrane with a square aperture (side length of 2 mm) and initial cavity gap of 1.2 mm. One of the mirrors is fixed, the other is under tension on a movable Si frame, which is electrostatically deflected, using several distributed electrodes, to control cavity spacing and mirror parallelism. Performance achieved is: high flatness of the mirrors, low control voltages (, STW - Project DEL 55.3733. TUDelft. Junta Nacional de Investigação Científica e Tecnológica - Praxis XXI-BD/5181/95.

Comunicação apresentada no MME'98, Ulvik, Norway, 3-5 June 1998., Silver films of 40 nm thickness, evaporated on a 300 nm thick low-stress silicon nitride layer, are used as high-quality mirrors operating in the visible and near IR spectral range. Using a silicon nitride membrane under tension, within a square Si frame after bulk micromachining, improves the initial mirror flatness. Two parallel mirrors, with square aperture of up to 2x2 mm2 and an electrostatically controlled spacing, form a tunable Fabry-Perot optical filter. Investigation of the silver-based reflective coatings, and mirror characterisation, including influence of bulk micromachining, are presented., STW - Project DEL 55.3733. Junta Nacional de Investigação Científica e Tecnológica - PRAXIS XXIBD/5181/95.

A local smart bus is described which is designed for use in muti-chip-composed microinstrumentation system. The bus is able to transmit a digital code, bitstream, analog voltage, frquency, duty-cycle and also provides calibration facilities, service request and interrupt request modes., FCT

This paper reports on the use of Finite-Element-Methods (FEM) to model and simulate a non-planar composite diaphragm, which is to be used in silicon microinterferometers. Geometrical form, bending distances, deflection, stress, fatigue and flatness of a diaphragm based on a low stress silicon nitride membrane/Si frame are simulated and compared with experimental results. The ability to accurately simulate in detail the diaphragm mechanical behavior through FEM was demonstrated., STW - Project DEL55.3733. TU Delft. Junta Nacional de Investigação Científica e Tecnológica - PRAXIS XXI-BD/5181/95.