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An analysis of NanoSheet (NS) transistor parasitic resistance components is presented and correlated to the resistance readout on Si wafers. With this model, it is possible to identify which components cause the parasitic resistance increases as CPP (contacted poly-Si pitch) further scales from 48 nm to 44 nm pitch. In this study, an alternative MOL (middle of line) metallization scheme is implemented to reduce circuit RC delay. This model helps to further reduce the transistor parasitic resistance from NFET/PFET S/D (source/drain) epitaxy or silicide. As CPP scales, NS PFET parasitic resistance reduction is more challenging and requires optimization in S/D epitaxy, silicide and metallization. Based on parasitic resistance modeling, we present a new wrap-around contact structure which eliminates the vertical epi resistance component, hence reducing overall device resistance.

Feasibility of single damascene Cu BEOL nanowires with TaN/Ta barrier (i.e. omitting a CVD-Co liner) was studied. Successful Cu gap-fill in 36 nm pitch trenches demonstrated 30% line resistance (Line-R) reduction vs. leading-edge Cu with conventional TaN/Co liner. This was attributed to larger Cu volume fraction and 15% lower intrinsic Cu resistivity. In order to assess the Line-R crossover point, comparable Ru nanowires were estimated through analysis of electron scattering components, based on Rs of blanket Ru films. The calculation predicts Line-R of subtractive-etched Ru lines (larger grains) crosses conventional Cu with TaN/Co liner at 12 nm linewidth, but never crosses Cu with TaN/Ta liner. Analysis of electron scattering components shows the resistivity of Ru lines will be dominated by grain boundary scattering, suggesting that the key for subtractive-etched Ru wires crossing over Cu would be innovations that enhance grain growth of blanket Ru films.

We report an improved air spacer that is successfully co-integrated on FinFET transistors with Self-Aligned Contacts (SAC) and Contacts Over Active Gate (COAG). The new integration scheme enables air spacer formation agnostic to the underlying transistor architecture, thus paving the way for a seamless adoption of air spacer in FinFET and Gate-All-Around (GAA) technologies. A reduction in effective capacitance $(C_{\mathrm{eff}})$ by 15% is experimentally demonstrated. The power/performance benefits achieved by the new air spacer exceeds the benefits of scaling FinFET from 7nm node to 5nm node.

Horizontally stacked nanosheet gate-all-around devices enable area scaling of transistor technology, while providing improved electrostatic control over FinFETs for a wide range of channel widths within a single chip for simultaneous low power applications and high-performance computing. Fabrication of inner spacers and Si channels is challenging, but essential to device performance, yield, and reliability. We elucidate these challenges and detail their impact to the device. We overcome these challenges with novel, highly selective, isotropic SiGe dry etch techniques which enable precise, robust inner spacer and channel formation. Finally, we demonstrate substantial improvements to relevant device parameters: resistance, drive current, transconductance, threshold voltage, breakdown voltage, bias temperature instability and overall variability.

We demonstrate a novel self-aligned gate contact (SAGC) scheme with conventional oxide/nitride materials that allows superior process integration for scaling while simplifying the SRAM cross-couple wiring. We show that the key feature to avoid both gate-contact (CB) to source-drain local interconnect (LI) shorts and the LI-contact (CA) to gate shorts is the shape of the LI cap. A trapezoid-shaped oxide (SiO 2 ) LI cap with an appropriate taper angle eliminates shorting between the contacts in the gate and source-drain region. We further demonstrate that this oxide LI cap is fully compatible with Cobalt (Co) metallization with a novel selective tungsten (W) growth process. Additionally, this process enables the SRAM cross-couple (XC) in the same metallization level, eliminating the need for an upper level wiring and greatly simplifying routing in the SRAM cell.

In this paper, we present for the first time a “Gate-Cut-Last” integration scheme completed within the Replacement Metal Gate (RMG) module. This novel gate cut (CT) technique allows the scaling of gate extension length past the end fin which reduces parasitic capacitance, leakage and performance variation. In addition, we demonstrate that CT-in-RMG is a promising alternative integration process that can enable scaling for future logic technology nodes. Device, circuit and reliability results are shown to compare this novel CT-in-RMG process to the conventional gate cut method.

We report record low $8.4\times 10^{-10}~\Omega $ -cm2 n-type S/D contact resistivity with laser-induced solid/liquid phase epitaxy of Si:P inside nano-scale contact trenches. Significant reduction of device resistance and resultant great gain of drain current has been demonstrated in scaled n-FinFETs with a contact length of 20 nm.

Self-aligned contact (SAC) is required for 7 nm node to reduce susceptibility of contact-to-gate short failures. This requires forming a SAC cap on metal-recessed gate. The SAC cap formation is usually achieved by removing nitride on the field by planarization techniques such CMP (chemical mechanical polishing) or GCIB (gas cluster ion beam) processes. Significant gate stack height variation can be observed lot-to-lot and wafer-to-wafer due to accumulated variations from multiple steps, including several CMP steps, before the SAC cap module, especially during early research and development prior to full optimization of the steps before the SAC cap module. GCIB potentially offers a method by which the early development stage variation due to CMP steps can be reduced, allowing integration and device learning during the early stages of a program. This study shows a comparison of SAC cap formation by CMP only vs. GCIB with integrated metrology enabled location specific processing. By using GCIB with feed-forward scatterometry measurements taken from a 2D measurement pad we have been able to significantly improve both lot-to-lot and wafer-to-wafer variation on early development wafers. This has led to improvement in within wafer SAC cap thickness non-uniformity, wafer to wafer and lot to lot device yield for gate-contact over a CMP-only process flow.

We present a fully integrated 7nm CMOS platform featuring a 3rd generation finFET architecture, SAQP for fin formation, and SADP for BEOL metallization. This technology reflects an improvement of 2.8X routed logic density and >40% performance over the 14nm reference technology described in [1-3]. A full range of Vts is enabled on-chip through a unique multi-workfunction process. This enables both excellent low voltage SRAM response and highly scaled memory area simultaneously. The HD 6-T bitcell size is 0.0269um2. This 7nm technology is fully enabled by immersion lithography and advanced optical patterning techniques (like SAQP and SADP). However, the technology platform is also designed to leverage EUV insertion for specific multi-patterned (MP) levels for cycle time benefit and manufacturing efficiency. A complete set of foundation and complex IP is available in this advanced CMOS platform to enable both High Performance Compute (HPC) and mobile applications.

In this paper, we discuss a technique for selective GeO x -scavenging which creates a GeO x -free interfacial layer (IL) on Si 1−x Ge x substrates. This process reduces interface trap density (N it ) and increases high-field hole mobility in Si 1−x Ge x pFETs. In addition, we identify the existence of electronic defect levels close to the Si 1−x Ge x band edges associated with the Ge surface concentration at the Si 1−x Ge x /IL interface. These electronic defects act as carrier scattering centers severely degrading the channel mobility and modulate the device threshold voltage. By successfully eliminating the GeO x component in the IL and electronic defects states at the Si 1−x Ge x /IL interface, high channel carrier mobility over a wide range of inversion carrier density in compressively-strained Si 1−x Ge x channel pFETs is demonstrated.

We report fully-depleted UTBB devices with a gate length (LG) of 25nm and BOX thickness (TBOX) at 25nm, fabricated with a 22nm technology ground rule, featuring conventional gate first high-K/metal and raised source/drain (RSD) process. Competitive drive currents are achieved. Effective Vt modulation is observed with back bias (Vbb) and different ground plane (GP) polarity. Excellent local Vt variation is demonstrated. A functional UTBB 0.108μm2 6-T SRAM is reported with Vdd down to 0.4V. We also present simulation studies that suggest UTBB device has superior scalability compared with thick BOX ETSOI device, thanks to better short channel effect (SCE) control.

Polypyrrole/Co0.2CrOx, (PPy/Co0.2CrOx) composites were synthesized by polymerizing pyrrole onto the surface of cobalt chromium oxide (CrOx) in acidic media. The PPy/Co0.2CrOx composites increase the reversible capacity of the electrochemically active material up to 20%. At C/10 rate, a reversible capacity of 215 mAh/g was obtained for PPy/Co0.2CrOx composite, compared to 178 mAh/g for the virgin material, an increase of over 21%. Conductivity experiments corroborated the galvanostatic cycling tests, with the composite cathode material showing high electronic conductivity than bare material. Fitting the impedance results to an equivalent circuit reveals that addition of polypyrrole reduces the ohmic resistance due to the better conductivity and the inclusion of electrochemically active polypyrrole in the composite. Finally, the composite electrodes also showed very good rate capability and better cycling behavior compared to that of the bare material. © 2003 Elsevier B.V. All rights reserved.

A capacity fade prediction model has been developed for Li-ion cells based on a semi-empirical approach. Correlations for variation of capacity fade parameters with cycling were obtained with two different approaches. The first approach takes into account only the active material loss, while the second approach includes rate capability losses too. Both methods use correlations for variation of the film resistance with cycling. The state of charge (SOC) of the limiting electrode accounts for the active material loss. The diffusion coefficient of the limiting electrode was the parameter to account for the rate capability losses during cycling.

Capacity fade of Sony US 18650 Li-ion batteries cycled using different discharge rates was studied at ambient temperature. The capacity losses were estimated after 300 cycles at 2C and 3C discharge rates and were found to be 13.2 and 16.9% of the initial capacity, respectively. At 1C discharge rate the capacity lost was only 9.5%. The cell cycled at high discharge rate (3C) showed the largest internal resistance increase of 27.7% relative to the resistance of the fresh cells. The rate capability losses were proportional with the increase of discharge rates. Half-cell study and material and charge balances were used to quantify the capacity fade due to the losses of primary active material (Li+), the secondary active material (LiCoO2/C)) and rate capability losses. It was found that carbon with 10.6% capacity loss after 300 cycles dominates the capacity fade of the whole cell at high discharge rates (3C). A mechanism is proposed which explains the capacity fade at high discharge rates.

A novel method for protecting zinc substrates using silicates has been explored as a promising alternative for the chrome passivation process. The silicate layer was deposited cathodically from a bath containing PQ solution and water. A post-treatment drying process was found to increase the Si content in the coating and improve the corrosion characteristics of the silicate layer. Deposition parameters such as concentration of the bath, applied voltage and deposition time have been optimized using corrosion characteristics and surface morphology. Stability of the coating has been improved by varying the drying temperature and the duration of drying. Finally, stability studies show that the silicate coatings obtained using this method exhibit a higher barrier resistance and better stability as compared to chrome passivates.

La0.8Sr0.2CoO3 was coated on NiO (LSC–NiO) cathodes using a sol–gel method. Dissolution studies in molten Li2CO3 and K2CO3 (62:38 mol%) at 650 °C showed lower Ni dissolution than that of the conventional nickel oxide cathode. Impedance analysis showed that the behavior of the developed cathode is similar to that of nickel oxide. The LSC coated Ni cathode has an over potential of 109 mV at an applied current density of 160 mA/cm2. The LSC–NiO shows promise as an alternate cathode in molten carbonate fuel cells (MCFCs).

The capacity fade of Sony 18650 Li-ion cells increases with increase in temperature. After 800 cycles, the cells cycled at RT and 45 °C showed a capacity fade of 30 and 36%, respectively. The cell cycled at 55 °C showed a capacity loss of about 70% after 490 cycles. The rate capability of the cells continues to decrease with cycling. Impedance measurements showed an overall increase in the cell resistance with cycling and temperature. Impedance studies of the electrode materials showed an increased positive electrode resistance when compared to that of the negative electrode for cells cycled at RT and 45 °C. However, cells cycled at 50 and 55 °C exhibit higher negative electrode resistance. The increased capacity fade for the cells cycled at high temperatures can be explained by taking into account the repeated film formation over the surface of anode, which results in increased rate of lithium loss and also in a drastic increase in the negative electrode resistance with cycling.

The performance of Cell-Batt® Li-ion cells and Sony 18650 cells using non-stoichiometric spinel and LiCoO2, respectively, as positive electrode material has been studied under several modes of charging. During cycling, the cells were opened at intermittent cycles and extensive material and electrochemical characterization was done on the active material at both electrodes. Capacity fade of spinel-based Li-ion cells was attributed to structural degradation at the cathode and loss of active material at both electrodes due to electrolyte oxidation. For the Sony cells both primary (Li+) and secondary active material (LiCoO2)/C) are lost during cycling.

Cobalt substituted lithium–nickel oxides were synthesized by a solid-state reaction procedure using lithium nitrate, nickel hydroxide and cobalt oxalate precursor and were characterized as cathodes for molten carbonate fuel cell (MCFC). LiNi0.8Co0.2O2 cathodes were prepared using non-aqueous tape casting technique followed by sintering in air. The X-ray diffraction (XRD) analysis of sintered LiNi1� xCoxO2 indicated that lithium evaporation occurs during heating. The lithium loss decreases with an increase of the cobalt content in the mixed oxides. The stability studies showed that dissolution of nickel into the molten carbonate melt is smaller in the case of LiNi1� xCoxO2 cathodes compared to the dissolution values reported in the literature for state-of-the-art NiO. Pore volume analysis of the sintered electrode indicated a mean pore size of 3 mm and a porosity of 40%. A current density of 160 mA/cm 2 was observed when LiNi0.8Co0.2O2 cathodes were polarized at 140 mV. The electrochemical impedance spectroscopy (EIS) studies done on LiNi0.8Co0.2O2 cathodes under different gas conditions indicated that the rate of the cathodic discharge reaction depends on the O2 and CO2 partial pressures. # 2002 Published by Elsevier Science B.V.

Pyrrole was polymerized onto commercial SFG10 graphite by in situ polymerization technique. Polymerization decreases the initial irreversible capacity loss of the graphite anode. The decrease in the irreversible capacity loss is due to the reduction in the thickness of the solid electrolyte interface (SEI) layer formed. PPy/C (7.8%) gives the optimum performance based on the irreversible capacity loss and the discharge capacity of the composite. The composite material has been studied for specific discharge capacity, coulombic efficiency, rate capability and cycle life using a variety of electrochemical methods. The composite SFG10 graphite possess good reversibility, higher coulombic efficiency, good rate capability and better cycle life than the bare SFG10 graphite.

The stability of the NiO cathodes in molten carbonate fuel cell (MCFC) has been improved through microencapsulation of the NiO cathode with nanostructured Co. Cobalt was deposited on the NiO cathode using an electroless deposition process. The electrochemical oxidation behavior of the Co-coated electrodes is similar to that of the bare NiO cathode. The cobalt-coated electrodes have a lower solubility in the molten carbonate melt when compared to bare nickel oxide electrodes in the presence of cathode gas. The solubility decreased more than 50% due to microencapsulation with cobalt. The thermal oxidation rate was also lower in case of the cobalt-encapsulated electrode. Impedance data from the modified electrode indicate that the oxygen reduction reaction depended inversely on the CO 2 and directly on the oxygen partial pressures respectively suggesting a similar reaction mechanism to that of nickel oxide. The results indicated that cobalt-encapsulated NiO is a viable solution in the development of alternate cathodes for MCFC applications.

A first time rigorous experimental study of effective current (Ieff) variability in high-volume manufacturable (HVM) 14nm Silicon-On-Insulator (SOI) FINFETs is reported which identifies, threshold voltage (Vtlin), external resistance (Rext), and channel trans-conductance (Gm) as three independent sources of variation. The variability in Gm, Vtlin (AVT=1.4(n)/0.7(p) mV-μm), and Ieff exhibit a linear Pelgrom fit indicating local variations, along with non-zero intercept which suggests the presence of global variations at the wafer level. Relative contribution of Gm to Ieff variability is dominant in FINFETs with small number of fins (Nfin); however, both Gm and Rext variations dominate in large Nfin devices. Relative contribution of Vtlin remains almost independent of Nfin. Both n and p FINFETs show the above mentioned trends.

A mathematical model is presented for the chloride induced corrosion of reinforcing steel bars (rebars) in concrete. The time for the chloride concentration level to exceed the threshold limit to initiate corrosion on the rebars was calculated using first principles. The model is characterized by the time dependent surface concentration due to adsorption at the surface of the concrete. Although the entire adsorption and diffusion process is complicated, the predictions of the model are consistent with experimental results. The simplifying assumption of a constant diffusion coefficient does not affect the model predictions. A finite difference model was used to study the effect of water and oxygen on chloride diffusivity in concrete.

This work demonstrates the building of a 56 nm pitch copper dual damascene interconnects which connects to the local interconnect level. This M1/V0 dual-damascene used a triple pitch split bi-directional M1 and a double pitch split contact (V0) scheme where the local interconnects are with double pitch split in each direction, respectively. This scheme will provide great design flexibility for the advanced logic circuits. The patterning scheme is multiple negative tone development lithography-etch. A memorization layer is utilized in the triple patterned M1 and the double patterned V0 levels, respectively. After transferring the two via levels into the metal memorization layer, a self-aligned-via (SAV) RIE scheme was used to create vias confined by line trenches such that via to line spacing is maximized for better reliability. Seven litho/etch steps (LIP1/LIP2/V0C1/V0C2/M1P1/M1P2/M1P3) were employed to present this revolutionary interconnects.

We are evaluating the readiness of extreme ultraviolet (EUV) lithography for insertion into production at the 15 nm technology node by integrating it into standard semiconductor process flows because we believe that device integration exercises provide the truest test of technology readiness and, at the same time, highlight the remaining critical issues. In this paper, we describe the use of EUV lithography with the 0.25 NA Alpha Demo Tool (ADT) to pattern the contact and first interconnect levels of a large (~24 mm x 32 mm) 22 nm node test chip using EUV masks with state-of-the-art defectivity (~0.3 defects/cm2). We have found that: 1) the quality of EUVL printing at the 22 nm node is considerably higher than the printing produced with 193 nm immersion lithography; 2) printing at the 22 nm node with EUV lithography results in higher yield than double exposure double-etch 193i lithography; and 3) EUV lithography with the 0.25 NA ADT is capable of supporting some early device development work at the 15 nm technology node.

We used Cu contact metallization to solve one of the critical challenges for 22 nm node technology. Cu contact metallization allowed us to demonstrate world's smallest and fully functional 22 nm node 6T-SRAM [1]. Cu contact metallization was executed using CVD Ru-containing liner. We obtained early reliability data by thermally stressing bulk device. Bulk device parameters such as junction and gate leakage currents and overlap capacitance were stable after BEOL anneal stress. We also demonstrated the extendibility of Cu contact metallization using 15 nm contacts.

This project focused on addressing the two main problems associated with state of art Molten Carbonate Fuel Cells, namely loss of cathode active material and stainless steel current collector deterioration due to corrosion. We followed a dual approach where in the first case we developed novel materials to replace the cathode and current collector currently used in molten carbonate fuel cells. In the second case we improved the performance of conventional cathode and current collectors through surface modification. States of art NiO cathode in MCFC undergo dissolution in the cathode melt thereby limiting the lifetime of the cell. To prevent this we deposited cobalt using an electroless deposition process. We also coated perovskite (La{sub 0.8}Sr{sub 0.2}CoO{sub 3}) in NiO thorough a sol-gel process. The electrochemical oxidation behavior of Co and perovskites coated electrodes is similar to that of the bare NiO cathode. Co and perovskite coatings on the surface decrease the dissolution of Ni into the melt and thereby stabilize the cathode. Both, cobalt and provskites coated nickel oxide, show a higher polarization compared to that of nickel oxide, which could be due to the reduced surface area. Cobalt substituted lithium nickel oxide (LiNi{sub 0.8}Co{sub 0.2}O{sub 2}) and lithium cobalt oxide were also studied. LiNi{sub x}Co{sub 1-x}O{sub 2} was synthesized by solid-state reaction procedure using lithium nitrate, nickel hydroxide and cobalt oxalate precursor. LiNi{sub x}Co{sub 1-x}O{sub 2} showed smaller dissolution of nickel than state of art nickel oxide cathode. The performance was comparable to that of nickel oxide. The corrosion of the current collector in the cathode side was also studied. The corrosion characteristics of both SS304 and SS304 coated with Co-Ni alloy were studied. This study confirms that surface modification of SS304 leads to the formation of complex scales with better barrier properties and better electronic conductivity at 650 C. A three phase homogeneous model was developed to simulate the performance of the molten carbonate fuel cell cathode and the complete fuel cell. The homogeneous model is based on volume averaging of different variables in the three phases over a small volume element. This approach can be used to model porous electrodes as it represents the real system much better than the conventional agglomerate model. Using the homogeneous model the polarization characteristics of the MCFC cathode and fuel cell were studied under different operating conditions. Both the cathode and the full cell model give good fits to the experimental data.

The cathode materials for molten carbonate fuel cells (MCFCs) must have low dissolution rate, high structural strength and good electrical conductivity. Currently available cathodes are made of lithiated NiO which have acceptable structural strength and conductivity. However a study carried out by Orfeld et al. and Shores et al. indicated that the nickel cathodes dissolved, then precipitated and reformed as dendrites across the electrolyte matrix. This results in a decrease in cell utilization and eventually leads to shorting of the cell. The solubility of NiO was found to depend upon the acidity/basicity of the melt (basicity is directly proportional to log P{sub CO2}), carbonate composition, H{sub 2}O partial pressure and temperature. Urushibata et al. found that the dissolution of the cathode is a primary life limiting constraint of MCFCs, particularly in pressurized operation. With currently available NiO cathodes, the goal of 40,000 hours for the lifetime of MCFC appears achievable with cell operation at atmospheric pressure. However, the cell life at 10 atm and higher cell pressures is in the range between 5,000 to 10,000 hours. The overall objective of this research is to develop a superior cathode for MCFC's with improved catalytic ability, enhanced corrosion resistance with low ohmic losses, improved electronic conductivity. We also plan to understand the corrosion processes occurring at the cathode/molten carbonate interface. The following cathode materials will be subjected to detailed electrochemical, performance, structural and corrosion studies. (i) Passivated NiO alloys using chemical treatment with yttrium ion implantation and anodic yttrium molybdate treatment; (ii) Novel composite materials based on NiO and nanosized Ce, Yt, Mo; (iii) Co doped LiNiO{sub 2} LiNiO{sub 2} doped with 10 to 20% Co (LiCo{sub 0.2}NiO{sub 2}) and NiO cathodes; and (iv) CoO as a replacement for NiO. Passivation treatments will inhibit corrosion and increase the stability of the cathode at high temperatures. Deposition of refractory metals (Mo, W, Li{sub 2}NiCrO{sub 4}) will impart stability to the cathode at high temperatures. Further it will also increase the electrocatalytic activity and corrosion resistance of the cathode. Doping with Co will decrease the alloy dissolution and increase the cycle life of the cathode. In the reporting period the oxidation behavior of Ni and Co in Li + Na carbonate eutectic was investigated under oxidizing environment using cyclic voltammetry, electrochemical impedance spectroscopy and potentiodynamic technique. The open circuit potential was monitored as a function of time in order to evaluate the material's reactivity in the melt.

A first principles-based model has been developed to simulate the capacity fade of Li-ion batteries. Incorporation of a continuous occurrence of the solvent reduction reaction during constant current and constant voltage (CC-CV) charging explains the capacity fade of the battery. The effect of parameters such as end of charge voltage and depth of discharge, the film resistance, the exchange current density, and the over voltage of the parasitic reaction on the capacity fade and battery performance were studied qualitatively. The parameters that were updated for every cycle as a result of the side reaction were state-of-charge of the electrode materials and the film resistance, both estimated at the end of CC-CV charging. The effect of rate of solvent reduction reaction and the conductivity of the film formed were also studied. © 2004 The Electrochemical Society. All rights reserved.

A novel technique for obtaining nonanomalous Ni-Zn-P coatings with high Ni content ~74 wt % as compared to 15-20 wt % in the conventional plating method! has been developed. These coatings show promise as a replacement for Cd in sacrificially protecting steel. Ni-Zn-P coatings were deposited using an electroless method from a solution containing NiSO4 , complexing agent and ammonium chloride. Varying the concentration of ZnSO4 in the bath controls the final amount of Zn in the deposit. The Zn content in the coating was optimized based on the corrosion resistance of the final deposit. Coatings with 16.2 wt % Zn were found to display a potential of 20.652 V vs. SCE that is more electronegative to steel and hence can be used as a sacrificial coating for the protection of steel. Deposition parameters like pH and temperature have been optimized based on composition of the coating and the surface morphology. Corrosion studies in corroding media show that Ni-Zn-P coatings obtained using the electroless method show a higher barrier resistance and better stability as compared to cadmium coatings. © 2003 The Electrochemical Society. @DOI: 10.1149/1.1556015# All rights reserved.

A novel method for electrodepositing silicates on metallic substrates from aqueous solutions has been developed. The technique is demonstrated by forming a passive film on galvanized steel. The silicate layer was deposited cathodically from a bath containing PQ Corporation N sodium silicate solution ~3.22 weight ratio sodium silicate, 37.5% solution in water!. A post-treatment drying process increased the Si content in the coating and improved the corrosion characteristics of the silicate layer. Deposition parameters like bath concentration and temperature have been optimized using corrosion characteristics and surface morphology of the final coating. Finally, stability studies show that the silicate coatings obtained using this method have higher barrier resistance and better stability as compared to chrome passivates. The technique developed here shows promise as an alternative to chrome passivation for corrosion protection of metals.

Tin-graphite composites have been developed as an alternate anode material for Li-ion batteries using an autocatalytic deposition technique. The specific discharge capacity, coulombic efficiency, rate capability behavior, and cycle life of Sn-C composites has been studied using a variety of electrochemical methods. The amount of tin loading and the heating temperature have a significant effect on the composite performance. The synthesis conditions and Sn loading on graphite have been optimized to obtain the maximum reversible capacity for the composite electrode. Heating the composite converts it from amorphous to crystalline form. Apart from higher capacity, Sn-graphite composites possesses higher coulombic efficiency, better rate capability, and longer cycle life than the bare synthetic graphite. Current studies are focused on reducing the first cycle irreversible capacity loss of this material.

Over the last three decades, there has been a growing interest for the use of titanium and its alloys in various branches of chemical industry, specifically in transport and stocking of aggressive fluids, electrosynthesis, photoelectrochemical activity, and solar energy conversion. The use of Ti in such wide range of applications arises due to its excellent corrosion resistance. Ti instantaneously forms a surface oxide film when exposed to the atmosphere. The excellent corrosion resistance of Ti is attributed to this spontaneous natural surface oxide film. While the film is highly resistive and is extremely stable to a wide range of contaminants, it has been shown that the natural oxide film dissolves slowly in dilute acid and alkaline solutions. The decrease in corrosion resistivity after exposure to dilute acid solutions has been attributed to the uniform dissolution of the surface oxide. 1 However, the stability of the metal in such environments can be easily restored by anodic oxidation. This attribute of Ti favors it as the material of choice for use in highly corrosive environments. Through anodic oxidation and formation of passive films, it is easily possible to prevent rapid dissolution of the underlying metal and continuously replenish the surface oxide. Further, this method is highly attractive since Ti possesses a wide potential window during which the metal remains in the passive range. Also, the large range of the passivation potentials are observed in most environments. Anodic oxidation is a well-established procedure in the case of

It is well known that the capacity of a lithium-ion battery de- creases during cycling and most of the loss can be associated with some unwanted side reactions that occur in these batteries during overcharge and over discharge conditions. 1 These reactions may cause electrolyte decomposition, passive film formation, active ma- terial dissolution, phase changes in the insertion electrode, and sev- eral other phenomena. Carbonaceous anode materials in lithium-ion rechargeable cells exhibit irreversible capacity loss in the first cycle, mainly due to reaction of lithium during the formation of passive surface films. 2 Passivation of the carbon electrode during the formation period and subsequent capacity loss are highly dependent on specific properties of carbon in use, such as degree of crystallinity, surface area, and so on. Positive electrode dissolution phenomena are both electrode and electrolyte specific and the factors that determine the positive elec- trode dissolution are structural defects in the positive active mate- rial, high charging potentials, and several other phenomena. 1 Oxy- gen defects in the electrode material may weaken the bonding force between the transition metal and oxygen resulting in the metal dis- solution. Previously, capacity fade studies were done on commercially available lithium-ion cells with LiCoO2 as the positive material. 3 These studies revealed that the positive electrode contributes more to the capacity fade of the lithium ion cells, when compared to the negative electrode and the increase in impedance of LiCoO2 elec- trode with cycling is the dominant factor for loss in capacity of the battery. In this paper an attempt was made to study the capacity fade of commercially available spinel-based lithium-ion batteries and also to optimize the charging current based on charging time and capacity fade. Commercially produced Li-ion cells include several features for safe operation under different conditions. During charging, to pre- vent electrolyte oxidation a potential limit ~charging to ultimate volt- age! is used with internal electrical circuitry ~cell voltage control and equalization circuit!. 4 However, different charging protocols lead to different charging times. Further, varying the charge protocol also affects the capacity fade during cycling. 1 One of the commonly used charging protocol for Li-ion cells is charging at constant cur- rent to a particular voltage and subsequently holding the potential constant. In this case, the total time for charging is held constant. One of the drawbacks of this process is that, since the total charging time is constant, the battery is held at a high constant voltage for longer than essential. In this case, holding the cell potential at high voltage can contribute to oxidation of the cathode leading to capac- ity decay during cycling. Optimization of charging protocol is essential to achieve superior performance for the Li-ion batteries. Objectives of this paper were to study the performance of lithium-ion batteries with spinel-based cathodes. First, we want to optimize the discharge capacity of the cell based on the charge current, end potential, and total charging time. Next, we compare the capacity fade of cells charged at differ- ent rates to a common end potential and discharged at the same current. The goal here is to minimize the capacity loss with cycling by choosing an optimum charging current. Finally, we study the causes for the capacity fade in spinel based Li-ion batteries.