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In this work, three atomic layer deposition (ALD) approaches are used to deposit an Al2O3 gate insulator on n-GaN for application in vertical GaN power switches: thermal ALD (ThALD), plasma-enhanced ALD (PEALD), and their stacked combination. The latter is a novel method to yield the most ideal insulating layer. Also, the influence of an in situ NH3 or H2 plasma pre-treatment is studied. Planar MIS capacitors are used to investigate the electrical properties and robustness of the gate insulators. In vacuo x-ray photoelectron spectroscopy (XPS) is used to study the changes in chemical composition after every surface treatment. XPS shows that all plasma pre-treatments efficiently remove all carbon contamination from the surface, but only NH3 plasma is observed to additionally remove the native oxide from the n-GaN surface. The water precursor step in the ThALD process does not completely remove the CH3 ligands of the trimethylaluminum precursor step, which might electrically be associated with a reduced forward bias robustness. The O2 plasma step in the PEALD process is associated with the removal of carbon and a tremendous increase of the O content in the GaN surface region. Electrically, this strongly correlates to an enhanced forward bias robustness and an increased forward bias hysteresis, respectively. The ThALD/PEALD stack method mitigates the shortcomings of both ALD processes while maintaining its advantages. Electrical measurements indicate that the stack method alongside NH3 plasma pretreatment provides the best characteristics in terms of hysteresis, threshold voltage, forward bias robustness, and interface trap density of states. [ABSTRACT FROM AUTHOR]

The development of processes for epitaxial growth of vertical gallium nitride (GaN) drift layers enabling 1.2 kV breakdown voltage on low‐cost sapphire substrates is presented in comparison to GaN bulk substrates. The targeted blocking capability demands drift layers with a thickness of 10 μm and low but controllable n‐type doping. Using a growth rate of 2.5 μm h−1 the concentration of unintentionally incorporated carbon is sufficiently low to adjust the n‐type carrier concentration to ≈1 × 1016 cm−3 for all types of substrates. To assess GaN drift region properties in terms of forward bias conductivity and reverse bias blocking strength, a quasi‐vertical p‐n‐diode structure is utilized. Bow reduction of GaN‐on‐sapphire structures is achieved using a stealth laser scribing process. Breakdown voltages higher than 1600 V and a specific on‐state resistance as low as 0.7 mΩ cm2 are obtained with diodes fabricated on GaN substrates. Similar structures grown on sapphire show breakdown voltages of about 1300 V due to higher levels of current leakage. Comparing different types of substrates, a direct correlation between dislocation density in the drift layer with the leakage current in p‐n diodes is deduced. [ABSTRACT FROM AUTHOR]

An effective method is described for improving the linearity of GaN/AlGaN high-electron mobility transistors (HEMTs) by optimizing barrier (AlGaN Layer) thickness or implementing doped GaN cap or a combination of both. Third-order intermodulation distortion and adjacent channel power ratio measurements are performed and a significant improvement is observed in linearity for an optimized architecture.

An enhancement of punchthrough voltage in AlGaN/GaN high-electron-mobility-transistor devices by increasing the electron confinement in the transistor channel is described by using an AlGaN buffer-layer structure. The beneficial properties are pronounced if gate-recess technology is applied for device fabrication and physical-based device simulations have given insight in the respective electronic mechanisms.

The fringing-field broadening of a phase-step profile and its dependence on the thickness of a liquid-crystal (LC) cell were studied in a simple, three-electrode LC cell structure consisting of two lateral electrodes biased with a differential voltage and a third, grounded, electrode placed on the opposite substrate. The results were compared both with an approximate analytical model developed earlier for a fringe-field-broadening kernel and with computer simulations. Good agreement between the experiment and the theoretical as well as the simulation results is shown. OCIS codes: 230.2090, 230.3720, 160.3710, 160.1190.

A detailed simulation of the fringing-field effect in liquid-crystal (LC)-based blazed-grating structures has been carried out. These studies are aimed at clarifying the relationship between the width of the fringing-field-broadened phase profile of the blazed grating and the LC cell thickness. This fringing-field broadening of the blazed grating's phase profile is shown to affect mostly the 2[pie] phase-step zone (fly-back zone) of the blazed grating. The results of the simulations carried out on the blazed-grating structure indicate two main effects of the fringing field: (1) reduction in the attainable diffraction efficiency and (2) limitation of the maximum deflection angle of the device. Both effects are shown to be directly linked to the broadening of the fly-back zone, which is shown to be proportional to the LC cell thickness. OCIS codes: 230.2090, 230.3720, 160.3710, 160.1190, 050.1950.

In this study, we report on the application of multiple energy nitrogen ion implantation for the electrical isolation of electronic devices on monoclinic β-Ga2O3. By the introduction of uniformly distributed midgap damage-related levels in the Ga2O3 crystal lattice, we are able to increase the sheet resistances by more than 9 orders of magnitude to ≥1013 Ω/sq which remains stable up to annealing temperatures of 600 °C carried out for 60 s under a nitrogen atmosphere. At higher annealing temperatures, the damage-related trap levels are being removed causing a significant drop of the sheet resistance down to 4 × 105 Ω/sq for annealing temperatures of 800 °C. This effect is preceded by a structural recovery of the implantation damages via the recrystallization of the crystal lattice at already 400 °C as verified by x-ray diffraction measurements. The extracted activation energies of the deep states controlling the high resistivity of Ga2O3 after implantation are in the range of 0.7 eV, showing a strong correlation with the annealing temperature dependence of the sheet resistance and thus supporting the theory of a damage-induced isolation mechanism. [ABSTRACT FROM AUTHOR]

Approaches towards fast switching GaN devices for applications in power electronics are presented. First, an overview on breakdown mechanisms in GaN power devices is given. Suitable techniques towards devices with high breakdown strength are then discussed and set into relation to their specific dynamic switching properties. It has been found that dynamic switching properties of GaN power devices may be significantly compromised at high drain bias levels. The dynamic effects depend on technological parameters such as epitaxial layer design and crystalline quality of the buffer layer, passivation layers and the lateral device designs (e.g. field plate arrangements). GaN high voltage switching devices therefore require a balanced trade-off between all these influencing quantities. This paper concentrates on dependencies related to the epitaxial design of the buffer layer(s). (© 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim) [ABSTRACT FROM AUTHOR]

A systematic study of GaN-based heterostructure field-effect transistors with an insulating carbon-doped GaN back barrier for high-voltage operation is presented. The impact of variations of carbon doping concentration, GaN channel thickness, and substrates is evaluated. Tradeoff considerations in on -state resistance versus current collapse are addressed. Suppression of the off-state subthreshold drain-leakage currents enables a breakdown voltage enhancement of over 1000 V with a low on-state resistance. Devices with a 5-\mu\m gate–drain separation on semi-insulating SiC and a 7-\mu\m gate–drain separation on n-SiC exhibit 938 V and 0.39 \m\Omega \cdot \cm^2 and 942 V and 0.39 \m \Omega \cdot \cm^2, respectively. A power device figure of merit of \sim\!\!\2.3 \times \10^9\ \V^2/\Omega \cdot \cm^2 was calculated for these devices. [ABSTRACT FROM PUBLISHER]

We present an AIGaN/GaN high-electron mobility transistor (HEMT) with an integrated recessed protection diode on the drain side of the transistor channel. Results from our Schottky-drain HEMT demonstrate an excellent reverse blocking with minor tradeoff in the ON-state resistance for the complete device. The excellent quality of the forward diode characteristics indicates high robustness of the recess process. The reverse blocking capability of the diode is better than -110 V. Physical-based device simulations give an insight in the respective electronic mechanisms. This is the first time that a recessed Schottky-drain diode integrated in a HEMT device is presented. [ABSTRACT FROM AUTHOR]