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Nowadays energy conserving has become one of the most important approaches that concern governments, companies, universities, and even individuals. This rising concern is coming from the fact that the world currently suffers from rising fuel costs. This requires us humans and especially engineers to come up with solutions in which we can either find a way to reduce fuel costs, such as finding a replacement to provide us with the needed energy, or we can optimize the usage of the energy and fuels we have right now. This paper focuses on the second approach, in which we are trying to make lighting as energy-efficient as possible. This requires us to optimize lighting systems by using modern and energy-efficient technologies. Lighting systems being the subject of this paper comes as one of the best systems to apply solutions in which we reduce the energy consumption while keeping the performance as good as it is, if not better. And this is because lighting systems exist everywhere, offices, houses, companies, schools and universities, which make the benefits coming from the system we are proposing being folded multiple times, thus the effect will be way larger than any ordinary approach that targets system not as spread as lighting systems. In our proposed technique, we are applying lighting control system, which controls the intensity of lights in a class room. The results were as expected, applying such technology in a university for example will make the university a lot more energy-efficient than it is currently, in addition the university will witness a large cost reduction in terms of bills, and also will have a more advanced and healthier environment.

Amplifiers are widely used in signal receiving circuits, such as antennas, medical imaging, wireless devices and many other applications. However, one of the most challenging problems when building an amplifier circuit is the noise, since it affects the quality of the intended received signal in most wireless applications. Therefore, a preamplifier is usually placed close to the main sensor to reduce the effects of interferences and to amplify the received signal without degrading the signal-to-noise ratio. Although different designs have been optimized and tested in the literature, all of them are using larger than 100 nm technologies which have led to a modest performance in terms of equivalent noise charge (ENC), gain, power consumption, and response time. In contrast, we consider in this paper a new amplifier design technology trend and move towards sub 100 nm to enhance its performance. In this work, we use a pre-well-known design of a preamplifier circuit and rebuild it using 45 nm CMOS technology, which is made for the first time in such circuits. Performance evaluation shows that our proposed scaling technology, compared with other scaling technology, extremely reduces ENC of the circuit by more than 95%. The noise spectral density and time resolution are also reduced by 25% and 95% respectively. In addition, power consumption is decreased due to the reduced channel length by 90%. As a result, all of those enhancements make our proposed circuit more suitable for medical and wireless devices.

In the current cloud business environment, the cloud provider (CP) can provide a means for offering the required quality of service (QoS) for multiple classes of clients. We consider the cloud market where various resources such as CPUs, memory, and storage in the form of Virtual Machine (VM) instances can be provisioned and then leased to clients with QoS guarantees. Unlike existing works, we propose a novel Service Level Agreement (SLA) framework for cloud computing, in which a price control parameter is used to meet QoS demands for all classes in the market. The framework uses reinforcement learning (RL) to derive a VM hiring policy that can adapt to changes in the system to guarantee the QoS for all client classes. These changes include: service cost, system capacity, and the demand for service. In exhibiting solutions, when the CP leases more VMs to a class of clients, the QoS is degraded for other classes due to an inadequate number of VMs. However, our approach integrates computing resources adaptation with service admission control based on the RL model. To the best of our knowledge, this study is the first attempt that facilitates this integration to enhance the CP's profit and avoid SLA violation. Numerical analysis stresses the ability of our approach to avoid SLA violation while maximizing the CP's profit under varying cloud environment conditions.

Thermodynamic modelling of Mn–Sn and Mn–Sr binary systems is carried out using the reliable data from the literature. Thermodynamic properties of the binary liquid solutions are described using the modified quasi-chemical model. The calculated phase diagrams and the thermodynamic properties are found to be in good agreement with the experimental data from the literature. A self-consistent thermodynamic database for the Mg–Mn–{Sn, Sr} systems is constructed by combining the thermodynamic descriptions of their constituent binaries. The constructed database is used to calculate and predict liquidus projection and invariant reactions of these ternary systems. The Mg–Mn–Sr system has nine ternary eutectic reactions, two saddle points and eleven crystallisation fields. Mg–Mn–Sn has four saddle points, two quasi-peritectic and six ternary eutectic reactions.

[EN] This paper presents a curriculum design approach for a Masters Programme in Telecommunications Management based on demand data obtained from surveying the needs of potential students of the proposed programme. Through online surveys disseminated at telecom companies in Jordan, it was possible to measure the demand for such a programme and to determine the required programme contents and specifications. The curriculum design is based on definition of programme outcomes and on using a house of quality approach (HOQ) to determine the list of courses required in the programme. Surveyed competencies are mapped to a long list of proposed courses in a HOQ in order to determine the importance of each of these courses. A final list of core and elective courses is then developed considering the contribution to programme outcomes and the academic standards., This work has been funded with support from the European Commission through Tempus Program, Project Number 511074. This publication reflects only the views of the authors, and the Commission cannot be held responsible for any use which may be made of the information contained therein.

Firewalls are an essential part of any information security system being the rst defense line against security attacks. The sea-saw eect between rewalls and network performance is most concerning to network users; where strict security settings result in weak network performance and permeant security settings allow for a stronger one. Hence, evaluating rewall platforms and their impact on network performance is important when assessing the eectiveness of network security. In this paper, we present an assessment methodol- ogy to analyze the performance of dierent rewalls platforms. The analysis considers the following metrics: delay, jitter, throughput, and packet loss. Moreover, the information security of the rewalls is also tested by applying a set of attacks and observing the reaction of the rewalls. The proposed assessment methodology is tested by performing real exper- iments on dierent types of rewalls including those that are personal and network-based. Moreover, a quantitative study is conducted to explore the level of knowledge among the educated category in the community, represented by a sample of college students, on the importance of rewall and their use.

This paper presents a technique for the minimization of the delay and sampling rate in the architectural synthesis of cyclic data flow graphs (DFGs) representing DSP algorithms taking into consideration the interconnect communication delays. In this paper, the question of optimizing the I/O delay without scarifying the iteration period (sampling rate) with non-negligible interconnects communication overhead is addressed. The proposed technique operating on the cyclic DFG of a DSP algorithm is designed to evaluate the relative firing times of the nodes by using Floyd-Warshallpsilas longest path algorithm so that the communication overhead is taken into consideration to provide an optimized time and processor schedule. Moreover, the proposed scheme is applied to well-know DSP benchmarks and the obtained synthesis results reveal that the proposed scheme is efficient in minimizing the I/O delay without scarifying the sampling rate.

This paper presents a new technique for the minimization of I/O delay in the architectural synthesis of cyclic data flow graphs (DFG) representing DSP algorithms taking into consideration the inter-processor communication delays. In this paper, the question of optimizing the I/O delay without scarifying the iteration period (throughput) with non-negligible inter-processor communication overhead is addressed. The proposed technique operating on the cyclic DFG of a DSP algorithm is designed to evaluate the relative firing times of the nodes by using Floyd-Warshall's longest path algorithm so that the inter-processor communication overhead is taken into consideration to provide an optimized time and processor schedule. Moreover, the proposed scheme is applied to well- know DSP benchmarks and seen that it is efficient in minimizing the I/O delay without scarifying the iteration period.

A great deal of research has been conducted in the area of scheduling DSP data flow graphs (DFG) onto multiprocessor systems. This paper introduces a new scheduling and allocation algorithm for the synthesis of DSP applications. The proposed technique provides the designer with a greater flexibility to explore the design space using a hybrid arithmetic functional unit library composed of both fixed operation-specific units and reconfigurable functional units capable of executing multiple operations. A novel reconfigurable multiplier called morphable multiplier is incorporated in the proposed synthesis technique. We show that moving from a fully homogenous multiprocessor design using fixed multiple-operation units (i.e., ALUs) to a fully heterogeneous design using fixed operation-specific units (i.e., adders or multipliers) results in decreasing the area of the design, but increasing the inter-processor communication overhead. However, a hybrid multiprocessor architecture that uses a hybrid arithmetic functional unit library composed of both fixed operation-specific units and run-time reconfigurable multiple-operation units brings about a trade-off between the area and the inter-processor communication overhead

In recent years a great deal of research has been conducted in the area of scheduling of DSP data flow graphs (DFG) onto multiprocessing systems. In this paper, a new processor allocation technique is proposed. Both heterogeneous and general-purpose functional units are used during the resource allocation process. The proposed technique provides the designer with more flexibility to explore the design space by using different types of processing modules for the same task. The proposed allocation technique leads to different multiprocessor architectures for a given rate-optimal schedule of a DSP data flow graph. A satisfactory function is used to infer the quality of the obtained architectures in terms of the area and utilization of each of them. The proposed algorithm is applied to a well-known benchmark problem of DSP filter. It is seen that moving from a fully-homogenous to a fully-heterogeneous multiprocessor architecture results in decreasing the area of the design. However, a hybrid multiprocessor architecture brings about a trade off between the area and the utilization.

Most of architectural synthesis techniques target DSP algorithms onto multiprocessor architectures using basic functional units such as adders or multipliers. In this paper, a scheme for the partitioning of the data flow graph of a DSP application for a high-level synthesis aimed at a design using multi-modules is proposed. In the propose scheme, the regularity characteristics of DSP application are exploited. Moreover, in order to reduce the number of distinct modules, the near-isomorphism sub-graphs represents the modules are merged together by multiplexing them in time to produce a single adaptable module. This merging process enables the reuse of the adaptable modules by partially reconfiguring them at run time to realize different modules during the running of the DSP data flow graph. It is seen that a small overhead in terms of the architecture's controller is needed by the modules in order for them to be adapted to perform different computations (multi-modes).

This paper presents a novel technique to obtain time schedules for cyclic DFGs representing DSP algorithms mapped onto multiprocessor systems with non-negligible inter-processor communication delays. In this paper, the question of optimizing the input/output delay in the presence of inter-processor communication overhead is addressed. The proposed technique operating on the cyclic DFG of a DSP algorithm is designed to evaluate the relative firing times of the nodes by using Floyd-Warshall's longest path algorithm so that the inter-processor communication overhead is taken into consideration to provide an optimal schedule

In recent years a great deal of research has been conducted in the area of scheduling DSP data flow graphs (DFG) onto heterogeneous multiprocessing systems. However, there is not yet much research conducted for designing the scheduling algorithms that consider the inter-processor communication delays. This paper presents a novel technique to obtain time and processor schedules for cyclic DFGs representing DSP algorithms onto a heterogeneous multiprocessor systems by taking into consideration the inter-processor communication delays. In the proposed technique the communication delay between a pair of nodes of the different type is treated as a non-computing node, whereas that between a pair of nodes of the same type is taken into account by re-adjusting the firing times of the appropriate nodes of DFG. A simulation is carried to illustrate the proposed technique by applying it to a second-order digital filter. The results show the proposed technique can produce optimal time and processor-allocation schedules.

This paper proposes a novel technique for the scheduling of DSP applications onto a nonfully-connected heterogeneous multiprocessor system by incorporating the concept of reservation stations. In this technique, a rate optimal schedule and a processor optimal assignment of DSP data flow graphs (DFG) are obtained at the compile time, the firing times of the nodes in the DFG are then discarded, and only the processor assignment and the sequence of the nodes assigned to a certain processor are retained. At the run-time a processor begins the execution of the node only after the data needed by that node becomes available in its reservation stations. Every processor in the multiprocessor system has its own reservation stations which are employed at the run-time to hold the token data and also to store control flags used for the task of synchronization between the processors. The proposed technique can not only efficiently consider variable inter-processor communication delays but also can provide time and processor optimal schedules as well

In recent years a great deal of research has been conducted in the area of scheduling DSP data flow graphs onto multiprocessing systems. Most of the static scheduling techniques assume the worst case or the best case computational delay of the functional units used in the target architecture. This assumption is not realistic, since some of the computational times of the DSP tasks may be imprecise due to the fact that during early design phases, the characteristics of the final implementation of the functional units are not be known. In this paper, the impreciseness of the processing times of the functional units is taken into consideration by considering them as fuzzy sets, and then using fuzzy arithmetic to build the time schedule. The range of control steps (mobility) which represents the possible firing times of a task is determined, and a fuzzy rule base is employed to infer the degree of acceptability in selecting a certain control step within this range.

Cognitive networks CNs enable providing service to unlicensed users secondary users, SUs by trading the unused spectrum. In our work, SUs compete with each other for accessing the unused spectrum. PUs rent the surplus spectrum to get some reward. The paper proposes a path discovery based on the cost of spectrum. Minimising the cost of spectrum renting is the key objective for SUs. In our work, the proposed adaptive trading approach for the PU is based on the gain maximising. In this spectrum market, the PU has to decide what price it should charge SUs. The PU changes the price of the spectrum over time based on the demand of spectrum and the competition with other service providers. On the other hand, SUs rent spectrum based on the cost of spectrum. The effectiveness of our routing algorithm in terms of cost minimisation is verified through extensive simulations.

In cognitive radio networks CRNs, unlicensed users secondary users - SUs lease free spectrum with quality of service QoS guarantees from a multitude of spectrum owners primary users, PUs based on service level agreements SLA. Free spectrum is used to establish the links of secondary network. The amount of leased spectrum influences the admitted number of SU's requests, PUs' profits, and the cost of renting spectrum. Hence, the PU can maximise its profit by adapting its resources to the changes in the traffic load and SLA costs conditions. We propose a novel approach that maximises PU's profit using economic model. Our economic model integrates the network routing with the adaptation of the capacity of secondary network links. For SUs, QoS should be maintained while adapting the secondary network capacity. Our adaptation scheme is based on the profit maximisation. The Markov decision process MDP is used to derive the adaption scheme. Numerical results show the ability of the proposed scheme to attain the optimal profit under different conditions and constraints.