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This work covers integration of advanced III-V semiconductors on silicon substrate for RF-sensor integration up to very high frequencies of 300 GHz and 670 GHz, respectively, including improved active device performance through intelligent engineering of the co-integrated buffer layers. Several Terahertz Monolithically-Integrated Circuits are presented, which demonstrate good gain performance, low-noise, and improve large-signal behavior through the application of the back-gate.

This letter presents a 67-116-GHz low-noise amplifier (LNA) module with state-of-the-art cryogenic noise performance. The LNA is based on a monolithic microwave integrated circuit (MMIC) that is fabricated in a 50-nm metamorphic high-electron-mobility transistor (mHEMT) technology. The MMIC is packaged in a WR10 waveguide split-block housing and uses fused silica E-plane microstrip-to-waveguide transitions. For a 67-116-GHz bandwidth, the amplifier exhibits average noise temperatures (Te) at 15 and 300 K of 21.4 and 194 K, respectively. A minimum Te of 13.6 K is achieved at 72.2 GHz. To the best of the authors' knowledge, this LNA demonstrates a new low-noise benchmark for room temperature and cryogenic noise temperatures in the extended W-band frequency range.

The modeling, design, and experimental evaluation of both a 400-GHz transmitter and receiver submillimeter-wave monolithic integrated circuit (S-MMIC) is presented in this article. These S-MMICs are intended for a radar-based system in the aforementioned operating frequency. The transmitter occupies a total chip area of $750\times 2750\,{\mu {\rm m}^2}$ . It consists of a multiplier-by-four, generating the fourth-harmonic of the WR-10 input signal, which drives the integrated WR-2.2 power amplifier. The latter has an output-gate width of 128 $\mu$ m. The receiver S-MMIC, $750\times 2750\,{\mu {\rm m}^2}$ , consists of a multiplier-by-two, providing the second harmonic of the WR-10 input signal for the local-oscillator port of the subsequent integrated subharmonic mixer. The radio-frequency port of the latter, connects via a Lange coupler to a WR-2.2 low-noise amplifier (LNA). All the components included, are processed on a 35-nm ${\text{InAlAs}}/{\text{InGaAs}}$ metamorphic high-electron-mobility transistor integrated-circuit technology, utilizing two-finger transistors and thin-film microstrip lines (TFMSLs). The modeling approach of the amplifier cores and the respective design decisions taken are listed and elaborated-on in this work. Accompanying measurements and simulations of the transmitter and receiver are presented. The individual components of the aforementioned S-MMICs, are characterized and the results are included in this article. The state-of-the-art, for S-MMIC based circuits operating in the WR-2.2 band, is set by the LNA, on one side, spanning an operational 3-dB bandwidth (BW) of 310 to 475 GHz, with a peak gain of 23 dB and, on the other side, by the final transmitter design, which covers an operating range of 335 to 425 GHz with a peak-output power of 9.0 dBm and accompanying transducer gain of 11 dB. The included transmitter- and receiver-designs represent a first-time implementation in the mentioned technological process, utilizing solely TFMSLs, boasting the integration level, operating in the WR-2.2 frequency band, and setting the state of the art—to the authors’ best knowledge—for all S-MMIC based solutions in the respective frequency band, in terms of output power and gain over the operating 3-dB BW.

This letter presents the design, performance, and analysis of four low-noise amplifier (LNA) monolithic microwave integrated circuits (MMICs) operating in ${W}$ -band. Two LNA designs were fabricated in two variations of a 20-nm gate-length metal–oxide–semiconductor high-electron-mobility transistor (MOSHEMT) technology each. While for the first technology version the heterostructure is directly grown on the final gallium arsenide (GaAs) wafer, the second version uses direct wafer bonding to transfer the III–V heterostructure after the epitaxial growth to a silicon (Si) substrate. Based on the measured noise figure (NF) of the four MMICs over a comprehensive set of bias conditions, the impact of short-channel effects on the RF performance and possible improvements are analyzed. The first LNA covers an octave bandwidth with more than 15 dB of gain and an average NF (75–105 GHz) of 3.5 dB on a Si substrate. At 80 GHz, the second amplifier exhibits minimal NFs of 2.3 and 2.5 dB on GaAs and Si substrates, respectively. Compared to previously reported MOS- or Si-based technologies, the presented LNAs demonstrate state-of-the-art noise performance emphasizing the importance of electron confinement for highly scaled transistor technologies.

The demonstration of a 75–305-GHz power amplifier (PA) monolithic microwave integrated circuit (MMIC) is presented in this letter. The PA is based on an eight-cell traveling-wave unit amplifier (UA). Each cell contains an RF cascode with two two-finger transistors with a gate width of 20 $\mu \text{m}$ each. In the output stage, a balanced configuration combines two UAs with Lange couplers. In front, a third UA is used as a driver amplifier. The PA MMIC is fabricated in a 35-nm gate-length metamorphic high-electron-mobility transistor technology. From 75 to 305 GHz, the PA yields a minimum output power of 10 dBm with an average value of 12.8 dBm. At 200 GHz, a peak output power and PAE of 14.9 dBm and 6.6% is achieved, respectively. To the best of the authors’ knowledge, this is the first PA MMIC with an octave-bandwidth that provides an output power of 10 dBm at 300 GHz.

This article reports on a scalable, temperature-dependent small-signal and noise model of a 50-nm metamorphic high-electron-mobility transistor (HEMT) technology. The model is valid for temperatures ranging from 5 to 297 K. The highest scalability is achieved by using a distributed model topology. The model is able to predict the small-signal and noise performance of 2–8 finger transistors with absolute gate widths ranging from 10 to 480 μm . Short gate width transistor fingers (5 μm ) and wide transistor fingers (100 μm ) are covered by the model. The model is valid over a very broad bandwidth from 0.1 to at least 150 GHz. Furthermore, the model covers all reasonable bias points of the given transistor technology. To the best of the authors’ knowledge, this is the first scalable HEMT model that is able to predict the small-signal and noise performance at arbitrary cryogenic temperatures. The scaling ratio related to the absolute gate width of the model is the highest among small-signal models reported in the literature.

In this letter, we report on the development of highgain WR-1.5 amplifier circuits, utilizing a transferred-substrate InGaAs-on-insulator (InGaAs-OI) high-electron-mobility transistor (HEMT) technology on Si with 20-nm gate length. A six-stage and a nine-stage amplifier circuit are described, which are based on gain cells in cascode configuration. With more than 30 dB of measured gain in the frequency band of 660-700 GHz, the highest frequency of operation of transferred-substrate THz amplifiers is reported. These gain levels in excess of 30 dB, furthermore, correspond to the highest reported gain values and state-of-theart performance around the targeted 670-GHz frequency band.

This article reports the development of high-gain cascode amplifier circuits in the frequency range around 670 GHz. The cascode circuits are based on a 35-nm metamorphic high-electron-mobility transistor (HEMT) technology. Till date, only common-source transistors have been used in HEMT-based amplifier circuits above 600 GHz. For this reason, prospects and design considerations of cascode devices operating at this terahertz frequency band are evaluated. The design and implementation of high-gain six-stage cascode amplifier circuits is described, achieving up to 30 dB of measured gain at 670 GHz and a small-signal gain of at least 25 dB over the frequency range from 630 to 690 GHz. The gain benefit of cascode devices is demonstrated with up to 5 dB of gain per cascode stage at 670 GHz. This corresponds to the highest reported gain per stage for HEMT-based WR-1.5 circuits.

This letter demonstrates two distributed downconverter monolithic microwave integrated circuits (MMICs). MMIC1 contains a distributed down-conversion mixer and MMIC2 expands MMIC1 by an eight-cell distributed local oscillator (LO) driver amplifier. The letter includes an investigation of the optimal gate width for each of the transistors in the stack of the source-feedback mixer cells. The MMICs are fabricated in the Fraunhofer Institute for Applied Solid State Physics (IAF), Freiburg im Breisgau, Germany, 35-nm gate-length metamorphic high-electron-mobility transistor technology. MMIC2 achieves a conversion gain (CG) of better than -4.2 dB over a 1-170 GHz radio frequency (RF) bandwidth (BW) at a fixed intermediate frequency (IF) of 0.1 GHz. The LO power (PLO) of MMIC2 is only -1 dBm. Furthermore, the mixer has a variable gain feature. By adjusting PLO, the CG can be controlled without affecting the RF-input-power-related 1-dB CG compression of -1.7 dBm.To the best of the authors’ knowledge, this work demonstrates the largest BW for distributed down-conversion mixers and for distributed mixers (DMs) with a sliding LO.

The analysis, modeling, design, simulation, and experimental evaluation of a 400 GHz on-chip antenna is presented, with a novel combination of metastructures, a microstrip patch, a quartz-based dielectric resonator, and a diamond-based antireflex layer—all integrated on a 35 nm InGaAs metamorphic high-electron-mobility transistor (mHEMT) technology. The said combination represents a first-time implementation for all submillimeter-wave-capable semiconductor technologies. Circumventing a substrate-thickness limitation of 4.98μm , a state-of-the-art broadband, efficient, and to-the-broadside radiating on-chip antenna solution is realized. It achieves a measured impedance bandwidth of 100 GHz, 25.6%, spanning from 340 to 440 GHz. A consistent pattern bandwidth of 75 GHz is recorded, with an efficiency of 50%–66% and a directivity of up to 10.4 dBi—or 27 dBi, with the utilization of a polypropylene-based dielectric lens. The theoretical analysis of the proposed on-chip antenna is presented, and two modeling approaches are shown and compared. Between the analytical and the 3-D electromagnetic (EM) model, the latter is chosen as it offers greater precision in defining the metastructure unit cell and enables the inclusion of the remaining components of the proposed antenna setup. The measured reflection coefficient and far-field patterns are compared to simulations via the utilized model, and a strong agreement is observed. These far-field patterns are acquired with the on-chip antenna inserted within a broadband 400 GHz transmitter submillimeter-wave monolithic integrated circuit, processed on the 35 nm mHEMT technology.

International audience; Intermodulation effects play a decisive role in any system relying on the linear transmission of signals, such as highspeed wireless communication. For the first time, this paper presents measured third-order and fifth-order intermodulation performance of a 300GHz monolithic integrated circuit with a new photonic approach. Conventional amplifier characterization in this frequency range showed a small-signal gain of more than 15dB, operating frequency range from 279 to 313GHz, and a 1dB compression point and saturated output power of 1.6dBm and 6dBm, respectively, from a one-tone power sweep. Using a novel photonic-based measurement setup, the amplifiers' output-related IP3 and IP5 are measured to 13dBm and 11dBm, respectively. The two-tone measurement uses the photonic mixing of three laser lines to generate the two-beat frequencies at 299 and 301GHz.

This paper presents a 20-nm gate length InGaAs HEMT MMIC technology on 100-mm Silicon substrates with nanostructured backside field-plate. Direct wafer bonding and wafer thinning is used to realize a 100 nm thick III/V device heterostructure on top of a SiO 2 layer. The transistors offer an on-state and off-state breakdown voltage of 2.7 and 5.0 V, respectively together with a reduced output conductance of 83 mS/mm. Both parameters demonstrate an improvement by a factor of 2 compared to the IAF standard 20-nm mHEMT devices fabricated on GaAs substrates. For a prematched single-stage amplifier a transistor MSG/MAG of 7 dB was achieved at 300 GHz. Finally, the functionality of the backside field-plate was successfully demonstrated by a 300-GHz amplifier using a field-plate transistor in the output stage.

This article reports on the investigation and optimization of cryogenic noise mechanisms in InGaAs metamorphic high-electron-mobility transistors (mHEMTs). HEMT technologies with a gate length of 100, 50, and 35 nm are characterized both under room temperature and cryogenic conditions. Furthermore, two additional technology variations with 50-nm gate length are investigated to decompose different noise mechanisms in HEMTs. Therefore, cryogenic extended $Ku$ -band low-noise amplifiers of the investigated technologies are presented to benchmark their noise performance. Technology C with a 50-nm gate length exhibits an average effective noise temperature of 4.2 K between 8 and 18 GHz with a minimum of 3.3 K when the amplifier is cooled to 10 K. The amplifier provides an average gain of 39.4 dB at optimal noise bias. The improved noise performance has been achieved by optimization of the epitaxial structure of the 50-nm technology, which leads to low gate leakage currents and high gain at low drain current bias. To the best of the authors’ knowledge, this is the first time that an average noise temperature of 4.2 K has been demonstrated in the $Ku$ -band.

Thanks to the large bandwidth availability, millimeter and sub-millimeter wave systems are getting more attractive to be used in a wide range of applications, such as high-resolution radar or high-speed communications. In this contribution, a new lens antenna in-package solution is presented for the H-band (220320 GHz), including a wideband quartz-cavity leaky-wave feed combined with an air-bridge chip interconnect technology, based on spray coating and laser lithography. This interconnection acts as a wideband, low-loss transition between the GaAs front-end and the quartz antenna, avoiding the use of expensive waveguide split-blocks. An antenna prototype including the interconnect has been manufactured and characterized, validating the full-wave simulated results for the integrated H-band leaky-wave with aperture efficiency higher than 74% over 34% bandwidth, and radiation efficiency higher than 70% over 37% of bandwidth.

This paper reports the small-signal and noise modeling of InGaAs metamorphic high-electron-mobility transistors at room temperature. Three technologies with gate length of 100 nm, 50 nm, and 35 nm are investigated and the mechanisms causing noise in the different devices are modeled. Technologies that have been scaled and processed in one foundry are modeled with the same model topology which allows for maximal comparability. In this way, a consistent comparison of the effects causing noise in sub-100 nm HEMTs is possible. It is shown that an increase of the channel noise in combination with increased gate leakage currents causes the noise figure to not improve as expected when scaling to ultra short gate length.

In this paper, the design and performance of a medium-power amplifier (MPA) submillimeter-wave monolithic integrated circuit (S-MMIC) is presented. The MPA demonstrates a flat small-signal gain of approximately 20 dB, measured over a frequency span from 290 to 410 GHz, and a respective 3-dB bandwidth from 280 to 430 GHz. The measured output power ranges from 1.5 to 3.3 dBm, over a large-signal drive from 355 to 395 GHz-limited by the measurement set-up-at a peak input power of -13 dBm. The power-added efficiency varies from 1 to 1.5 %. The amplifier utilizes four cascode stages, each realized via two 8-µm finger-width InAIAs/InGaAs metamorphic high-electron-mobility transistors in parallel for the common-source part and respectively two devices for the common-gate part of the cascode. Each transistor consists of two gate fingers. The total gate width (TGW) of the output stage is 32 µm. The total chip size, without RF- and DC-pads, is 200 × 800 µm2. The respective matching networks are implemented via miniaturized thin-film microstrip lines in tandem with metal-insulator-metal capacitors. A maximum output power per TGW of 66.2mW/mm is achieved with a transducer gain of 16 dB, representing a state-of-the-art performance for MMIC-based amplifiers between 355 and 395 GHz.

This paper reports on the first stacked field-effect transistor (stacked-FET) submillimeter-wave monolithic integrated circuit (S-MMIC) power amplifier cell operating at 0.3 THz and the first stacked-FET medium power amplifier (MPA) at 240 GHz. Both circuits are fabricated using a 35-nm InGaAs-on-GaAs metamorphic high electron mobility transistor (mHEMT) technology with grounded coplanar waveguide lines. In both cases, compactness and performance are enhanced thanks to the use of an in-house process, based on three-metallization layers, instead of the usual two-layer process. The single-stacked cell exhibits an ultrawide small-signal 3-dB relative bandwidth (RBW) of $\hbox{47.3}{\%}$ , with output power levels higher than 4.3 dBm from 280 to 308 GHz (9.5%). The MPA MMIC combining four triple-stacked mHEMT cells in parallel achieves a small-signal 3-dB RBW of 24.2%, 10.8 dBm of output power, and a power-added efficiency of 5.02%. These values outperform the state-of-the-art results of MPAs published within a comparable technology.

This paper reports on a broadband high-power amplifier (HPA) millimeter-wave integrated circuit (MMIC) covering the extended W-band (65–125 GHz). The MMIC is based on the Fraunhofer IAF 50-nm gate-length metamorphic high-electron-mobility transistor (mHEMT) technology. The HPA consists of two parallelized unit amplifiers. Each unit amplifier (UA) utilizes four stacked-HEMT unit power cells (UPCs) and four-way power combiners at the input and output. The UPCs stack four transistors with a gate width of $4\times 40~\mu \text{m}$ per HEMT. The UA achieves an average small-signal gain of 19.4 dB and an average saturated output power of 21.6 dBm at least from 70 to 110 GHz. The HPA yields an average small-signal gain of 16.8 dB and an average saturated output power of 22.5 dBm at least from 68 to 110 GHz. A peak output power of 24.1 dBm is achieved at an operating frequency of 75 GHz.

This letter presents a broadband power amplifier (PA) millimeter-wave integrated circuit (MMIC) demonstrating 6.7–8.3-dBm measured output power from 280 to 310 GHz at −5-dBm input power. The measured small-signal gain is 15–20 dB for 266–330 GHz, which is the maximum frequency that could be measured. A dc power of 521 mW is required for this four-stage amplifier circuit using four cascode amplifier cells in parallel. The cascode PA cell is implemented with thin-film microstrip lines on the wafer front side using two two-finger devices with 10- $\mu \text{m}$ finger width in parallel. Due to the compact cascode cell topology, the total gate width of 160 $\mu \text{m}$ is realized requiring only 400 $\mu \text{m}\,\,\times $ 800 $\mu \text{m}$ chipsize for the four-stage amplifier without pads. The reported output power represents the state of the art for mHEMT-based PA MMICs between 280 and 310 GHz.

This paper revises the efficiency optimization equations for magnetic-transformer-based power combiner/ divider impedance transformation networks (e.g., distributed active transformer). It evaluates their usability for high millimeter-wave frequencies, where the distributed behavior of a transformer and its loss become relevant. As is demonstrated, the standard optimization equations do not lead to an optimum result. To enable the optimization of distributed transformers, an extended lumped equivalent circuit model is proposed and used for the derivation of new optimization equations. The novel equations enable the design of magnetic transformers with maximum efficiency. To demonstrate the performance that can be achieved with optimized distributed magnetic transformer networks at millimeter-wave frequencies, measurement results of an R-band (i.e., 170–260 GHz)/H-band (i.e., 220–325 GHz) power amplifier (PA) are presented. With an output power of approximately 6.2 dBm at 260 GHz, the amplifier is among the state of the art for mHEMT PAs operating in this frequency range. With its relative 3-dB bandwidth of 29%, however, it surpasses all those reported mHEMT PAs to date.