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Pairing cryptosystems are powerful mathematical tools for the development of cryptographic protocols that provide end-to-end security for applications like Internet-of-Things (IoT), cloud services and cyber-physical systems (CPS). However, these applications require light-weight implementations but still real-time and flexible. The flexibility can come from different choices of underlying algorithms along with suitable parameters. A software implementation offers better flexibility but lacks in timing performance, whereas custom hardware delivers better timing performance but has poor flexibility. Furthermore, the designs over small characteristic curves are now insecure against recent attacks. Existing designs do not address the drawback of less flexibility and massive resource consumption collectively. We present a micro-program controlled hardware design which has the least resource consumption among the comparable existing designs on FPGA. This redundant number arithmetic-based architecture consumes only 2,506 slices on Xilinx Virtex-7 FPGA. It can be migrated to other device families or updated for different algorithms without data-path or control path modification. To enhance the flexibility, we developed a custom assembly-like finite state machine (FSM) description, called Prism, and necessary tool to generate the micro-program states. To illustrate the functionality of Prism, we present designs for Tate and Optimal-Ate pairing with micro-program states generated using this tool.

In this paper, we present the first Hardware (HW) / Software (SW) co-design based generic discrete Gaussian sampler architecture on the Xilinx Zynq platform. The area optimized and secure sampler can produce a distribution based on an arbitrary standard deviation and center given as input. We use multi-level logic optimization on Knuth-Yao algorithm's Discrete Distribution Generating (DDG) tree travel-based Boolean mapping of random bits and samples instead of the previous two-level logic optimization to reduce the resource utilization. This method results in nearly 60% lesser LUT utilization compared to the previous designs on Xilinx FPGAs. Further, we introduce improvements in the shuffling algorithm leveraging the HW/SW co-design methodology compared to the existing shuffling architectures for randomizing Gaussian samples to protect against timing-based side-channel attacks.

Fault injection-based cryptanalysis is one of the most powerful practical threats to modern cryptographic primitives. Popular countermeasures to such fault-based attacks generally use some form of redundant computation to detect and react/correct the injected faults. However, such countermeasures are shown to be vulnerable to selective fault injections. In this article, we aim to develop a cryptographic primitive that is fault tolerant by its construction and does not require to compute the same value multiple times. We utilize the effectiveness of Neural Networks (NNs), which show “some degree” of robustness by functioning correctly even after the occurrence of faults in any of its parameters. We also propose a novel strategy that enhances the fault tolerance of the implementation to “high degree” (close to 100%) by incorporating selective constraints in the NN parameters during the training phase. We evaluated the performance of revised NN considering both software and FPGA implementations for standard cryptographic primitives like 8×8 AES SBox and 4×4 PRESENT SBox. The results show that the fault tolerance of such implementations can be significantly increased with the proposed methodology. Such NN-based cryptographic primitives will provide inherent resistance against fault injections without requiring any redundancy countermeasures.

Most of the faults in circuits or systems occur due to the unintentional but natural phenomenon (e.g. imperfection in manufacturing process or significant change in the working environment), and thus, these faults are often follow a pattern and comparatively easier detect than the intentional faults. In the context of secure design/system, the adversary (intentionally) injects some faults in the system to bypass the security protection or reveal secret information. Since the adversaries’ fault injection objectives are often very subjective, it is difficult to find a pattern among the faults in a system, and this makes the fault detection and fault recovery difficult in a secure system. In this chapter, we discuss possible intentional faults in an emerging hardware security primitive, known as Physically Unclonable Functions (PUFs). We show how the faults vary over the PUF designs and its applications. In addition, we explain different fault detection circuits and fault recovery techniques which are specific to PUF designs and their implementations on FPGA platforms.

Searchable symmetric encryption (SSE) allows a client to outsource the storage of her data to an (untrusted) server in a private manner, while maintaining the ability to selectively search over it. A key feature of all existing SSE schemes is the tradeoff between security (in terms of the information leakage to the server) and efficiency (in terms of the operational and storage overhead on the server and client sides). The premise of this work is that SSE schemes typically offer scope for massively parallel implementations with improved efficiency without compromising security. Based on this idea, we propose a highly scalable framework for parallelized SSE implementations using hardware-based crypto-accelerators, interfaced with a software-based control unit and a memory controller unit. We choose field programmable gate arrays (FPGAs) as the platform for the crypto-accelerators due to their flexibility, reconfigurability, low time-to-market and low maintenance overheads. As a case study, we illustrate how the recently proposed SSE scheme of Lai et al. (CCS'18) may be implemented as per our framework, and the benefits thereof, including shorter preprocessing time and reduced query-response latency as compared to a software implementation.

Emotion recognition or affect detection from speech is an old and challenging problem in the field of artificial intelligence. Many significant research works have been done on emotion recognition. In this paper, the recent works on affect detection using speech and different issues related to affect detection has been presented. The primary challenges of emotion recognition are choosing the emotion recognition corpora (speech database), identification of different features related to speech and an appropriate choice of a classification model. Different types of methods to collect emotional speech data and issues related to them are covered by this presentation along with the previous works review. Literature survey on different features used for recognizing emotion from human speech has been discussed. The significance of various classification models has been presented along with some recent research works review. A detailed description of a prime feature extraction technique named Mel Frequency Cepstral Coefficient (MFCC) and brief description of the working principle of some classification models are also discussed here. In this paper terms like affect detection and emotion recognition are used interchangeably.

Emotions and affect are universal means of expressing the physiological state of an individual. Most of our daily interactions with other individuals involve emotions as an integral part. It has become highly prominent in technological research, as new technologies related to human-machine interaction or medical applications are developed. Detecting and analyzing emotions have become quite an important area of research. In this paper, we took the effort to find the effect of different emotions on physiological signals. We used International Affective Picture System (IAPS) database images as stimuli. We have considered five different types of emotions — High Valence High Arousal (HVHA), High Valence Low Arousal (HVLA), Low Valence High Arousal (LVHA), Low Valence Low Arousal (LVLA), and Neutral (Blank), and we have used six different physiological signals — Skin Conductance (SC), Electro CardioGram (ECG), Electro MyoGram (EMG), Skin Temperature (ST), Respiration Rate (RR), and Arterial Pulse Rate (PR). Our experiment shows that there are enough variations in different parameters of physiological signals for different emotional stimuli.

This paper considers two dimensional valence-arousal model. Pictorial stimuli of International Affective Picture Systems were chosen for emotion elicitation. Physiological signals like, Galvanic Skin Response, Heart Rate, Respiration Rate and Skin Temperature were measured for accessing emotional responses. The experimental procedure uses non-invasive sensors for signal collection. A group of healthy volunteers was shown four types of emotional stimuli categorized as High Valence High Arousal, High Valence Low Arousal, Low Valence High Arousal and Low Valence Low Arousal for around thirty minutes for emotion elicitation. Linear and Quadratic Discriminant Analysis are used and compared to the emotional class classification. Classification of stimuli into one of the four classes has been attempted on the basis of measurements on responses of experimental subjects. If classification is restricted within the responses of a specific individual, the classification results show high accuracy. However, if the problem is extended to entire population, the accuracy drops significantly.

Emotion Recognition always has been one of the key areas in human machine interaction, machine learning or affective computing. Two dimensional valence arousal model has been used here. In this paper, we present how simple emotion recognition can be done by measuring nine basic non-invasive Biological markers or physiological signals including BR [BReathing], ECG [ElectroCardioGram], EMG [ElectroMyoGram], GSR [Galvanic Skin Response], HR [Heart Rate], PR [Pulse Rate], RR [Respiration Rate], and ST [Skin Temperature] on thirty healthy subjects. Pictorial emotional stimuli categorized as High Valence High Arousal [HVHA], High Valence Low Arousal [HVLA], Low Valence High Arousal [LVHA] and Low Valence Low Arousal [LVLA] were shown using International Affective Picture System (IAPS) for approximately thirty minutes. Six features from each signal were extracted for analysis. Different types of classification algorithms like QDC [Quadratic Discriminant Classifier], kNN [k Nearest Neighbour], Naive Bayes and LDA [Linear Discriminant Analysis] were used in classification of data. Maximum accuracy around 75% for each classifier was obtained. Further improvements are required to make this more robust and to deploy commercially.