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The Segment Routing (SR) architecture is based on loose source routing. A list of instructions, called segments can be added to the packet headers, to influence the forwarding and the processing of the packets in an SR enabled network. In SRv6 (Segment Routing over IPv6 data plane) the segments are represented with IPv6 addresses, which are 16 bytes long. There are some SRv6 service scenarios that may require to carry a large number of segments in the IPv6 packet headers. This can be inefficient due to the overheads of the segment list, or can even cause processing issues in the crossed nodes due to the very large header to be processed. In this paper we present the Micro SID solution for the efficient representation of segment identifiers. With this solution, the length of the segment list can be drastically reduced., Comment: Extended version (v1) of submitted paper - October 2020

In-network computation based on programmable data plane hardware provides a tremendous opportunity to improve throughput, latency and reduce congestion in data center scenarios. However, a judicious use of these network devices must be done based on their limited resources and the specific features of the application to be offloaded. This paper promotes FlowBlaze, a stateful hardware programmable data plane, as a candidate for offloading online MapReduce tasks. Above all, tasks with strict time requirements can benefit from in-network computing since it can significantly lower their latency. Given that MapReduce is a generic programming paradigm, in this paper we first try to identify which subset of MapReduce operations can be transparently offloaded to a specific hardware architecture and which are the limitations of this offloading in terms of memory and computational resources. After, we show how the FlowBlaze architecture can match the partition/aggregation paradigm and we discuss a set of primitives exposed by the FlowBlaze abstraction to perform mapping and aggregation. Finally, we prove the feasibility of this approach applying it to a click-stream analysis use case.

XTRA (XFSM for Transport) aims at providing a first attempt towards a “ code-once-port-everywhere ” platform-agnostic programming abstraction tailored to the deployment of transport layer functions. XTRA’s programming abstraction not only fits SW platforms, but is specifically designed to harness, with no re-coding effort, the offloading opportunities offered by CPU-less HW boards or smart NICs. We demonstrate the viability of XTRA with three completely different implementations of the underlying execution engine (HW proof-of-concept on a NetFPGA board, User-space SW over Linux’ Open Data Plane, and NS3 emulator). Flexibility is shown via a number of example applications, ranging from a variety of congestion control algorithms, to a middlebox-type TCP proxy functionality, up to a customized “Timer-Based” (TB) TCP which leverages the native reliance of XTRA on timers, so as to produce a loss recovery operation which, despite being formalized only via a handful of code lines, performs almost comparable with the highly optimized Linux and FreeBSD implementations.

In stateful Software Defined Network (SDN) data planes, network switches hold some local flow-related states thanks to which they are able to perform decisions by locally executing simple algorithms. While stateful data planes provide better reactiveness in respect to vanilla SDN, states are still bounded to single switches which represents a significant restraint for network-wide applications. To deal with the current limitations of stateful data planes we introduce and provide design guidelines for LODGE, a model according to which distributed network applications are able to make local decisions at each switche based on some global variables shared across other switches. We describe the implementation of LODGE with a basic application providing support for the detection of Distributed Denial of Service (DDoS) attack in a scenario of stateful data planes involving P4 and Open Packet Processor (OPP) enabled switches. We validate the two implementations in a small emulated testbed and we show the beneficial effects on the reduction of the total network traffic.

Stateful programmable dataplanes are emerging as a disruptive technology and an enabler factor for network function virtualization in SDN environments. In this demo paper we show three real world use cases with stateful forwarding requirements to validate both the hardware and software implementations of the Open Packet Processor data plane.