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In a bid to further reduce the cost of the front Ag contact metallization in Si solar cells, Cu is the potential alternative to replace the Ag in the Ag paste. However, this requires an understanding of the contact mechanism of screen-printable Ag/Cu paste in Si solar cell through rapid thermal process. The pastes with different weight percent of Cu (0 wt%, 25 wt% and 50 wt%) were used and the Voc of the cells was reduced with the increasing weight percent of Cu. This is because the presence of Cu in the paste changed the microstructure of the Ag/Cu/Si contact through Cu doping of the glass frits and hence increasing the Tg of the glass. The increased Tg of the glass impeded the uniform spreading of the molten glass and resulted in poor wetting and etching of the SiNx, which impacted the contact as evident in ideality factor of less than unity. This also led to the formation of agglomerated Ag crystallites with features of 700 nm in length and 200 nm in depth, which is close to the p-n junction, of which depth is ~300 nm. However, the interface glass layer acted as an effective diffusion barrier layer to prevent Cu atoms from diffusing into the Si emitter, which is quite remarkable for Cu not to diffuse into silicon at high temperature. Further investigation of the Ag/Cu contacts with the conductive AFM in conjunction with the SEM and STEM analyses revealed that the growth of Ag crystallites in the Si emitter is responsible for carrier conduction the gridlines as with the pure Ag paste.

The reliability of any electron device depends on the functionality of the metal contact to the semiconductor. Thus, the transport mechanism at the semiconductor/metal interface is dictated by the barrier height posed by the difference in the work function of these materials. A low barrier height is desirable to avoid the power loss in the form of heat at the interface, which often lead to delamination of the metal contacts and failure. However, it is highly improbable for the two work functions to ever match, therefore, the doping on the semiconductor is modified to reduce the barrier height. For lithography process which uses evaporated/plated metal contact, the barrier height is often reduced by heavily doping the semiconductor underneath the metal contact and treated in a reducing ambient to remove the Schottky barrier after metal contact process step. However, for the commercial silicon solar cell which relies on fire-through-dielectric-metal contacts with Ag, Ag coated Cu or Cu thick film metal pastes, there is glass at the semiconductor/metal interface, which is part of the thick film metal paste, that adds to the contact resistance. Since solar cell requires the emitter to be transparent in order to avoid the loss of photons, the metal paste must therefore be modified to reduce the barrier height to enable the field emission carrier transport at the interface. This paper will therefore focus on the efforts to understand the characteristics of thick film metal pastes that would lead to a highly reliable fire-through-dielectric-metal contacts. The thick film metal pastes for solar cell metal contacts consists three main components: (i) organics, (ii) glass frits and (iii) the metal powder. The morphology and particle size of the metal powders and glass frits are critical to the contact and gridline resistances. The viscosity and rheology of the paste among other parameters ensure the printability of continuous grid lines. The sintering of the gridline is impacted by the particle size and morphology of the metal powders and glass frits. The percentage of the glass frits determines how fast the underlying dielectric is etched during the sintering step. After the sintering, the proximity of the metal particle to the pn junction of the device dictates the quality of the formulated metal thick film paste. To understand the relationship between the thick film metal paste and the device parameters, the semiconductor/metal interface is often characterized through SEM/EDS to assess the (i) glass thickness, (ii) metal crystallites (iii) effectiveness of glass frit in etching the underlying dielectric, and (iv) the compounds formed and their distribution in the contact. All these characteristics are pertinent to the barrier height that determines the carrier transports at the metal/semiconductor interface. Thus, for a thick film metal paste to be compatible with the fire-through-dielectric contact (i) the glass frits should be able to uniformly etch the underlying dielectric, (ii) must produce a thin glass layer at the semiconductor/metal interface for low barrier height, (iii) must result in an ideality factor of close to unity for the device and (iv) high shunt resistance value. However, because of the high cost of Ag, there is an intensified effort to investigate the alternatives such as Cu and Ag coated Cu to achieve the above characteristics for cost effective metallization of solar cells. This paper will compare and contrast the emerging alternatives with the state-of-the-art Ag paste contacts.

The continued reduction in the amount of silver used to decrease the cost of solar energy is applied to a novel grid finger screen printed metallization design. Improved solar cell and solar module performance metrics are increased while reducing the amount of metal needed per solar cell. Just as the current design of busbars has changed to incorporate segmented busbars, floating busbars or no busbars where a multi-wire module is used, the design of grid fingers needs to also evolve to eliminate redundant or unnecessary function within the solar cell device. Using a technology like the Configurable Current Cell that includes a modified "H-Bar" metallization pattern shown in this paper will provide additional methods to reduce the amount of metal needed on the front and rear of a solar cell to optimize the performance of a solar module.

The metallization of solar cells remains a dominating factor for the total cost of solar cell manufacturing and must be reduced. A prime candidate to replace the traditional Ag is Cu since it is close in conductivity but about 100 times lower cost. However, the oxidation of Cu in atmosphere and its diffusion into Si have been troublesome factors preventing its implementation. These two challenges were considered to formulate the thick film Cu paste and the 19.4% efficiency, fill factor of 76.02%, short-circuit current density of 39.0 mA/cm2 and open-circuit voltage of 654.4 mV, show these challenges have been overcome.

This paper reports on the investigation of the rapid thermal annealing of screen-printable Cu paste for cost-effective metallization of PERC cells. The preliminary results of screen-printable contacted solar cells show that the challenges of Cu including rapid diffusion into Si at high temperature and oxidation in the atmospheric ambient are overcome. The open circuit voltage (VOC) of 662 mV, shunt resistance of 25000 Ω-cm2, the reverse saturation current density (JO2) of 4.4E-9 A/m2 attest to this fact. The VOC was found to increase as the belt speed was varied from 300-350 inches per minute (IPM). The peak temperature varied somewhat for the belt speed with highest peak temperature of 590°C at 300 IPM and 584°C for the 350 IPM. The efficiency peaked at the 300IPM belt speed, which showed the lowest series resistance and highest fill factor (FF). However, the electroluminescence micrographs show similar brightness between the cells sintered with belt speeds of 300 IPM and 350 IPM. The result supports the observation that Cu pastes favors fast belt speeds, which enables uniform formation of local back surface field (BSF). Finally, this result shows a viable future for atmospheric Cu paste to replace the expensive Ag metal.

Rapid thermal processing (RTP) is a key technology in the screen-printed silver (Ag) and Aluminum (Al) metallization to form excellent contacts to silicon (Si) solar cell. The unique firing profiles of RTPs solve different tasks during contact co-firing, especially the ramp up and ramp down rates are very critical in achieving the precise contacts independent of the source of metallic pastes. The ramp up/down rates are controlled by the belt speed of the furnace which also determines the dwell time of the contact at elevated temperatures, which ranges from 750-800 °C. Although high belt speeds and hence high ramp up/downs, for contact co-firing are beneficial, due to the difficulties involved in reaching the peak firing temperature at high belt speeds, the commercial infrared (IR) belt furnaces are operated at belt speeds of between 180-200 inches per minute (ipm). Therefore, this paper reports on the development of high belt speeds for screen printed passivated emitter rear contacts (PERC) Si solar cell with no additional equipment. By achieving desired peak temperatures at high belt speeds (up to 375 ipm), the open circuit voltage (Voc) can be increased by ~5 mV along with 1-2 % increase in fill factor (FF) without adding any cost to production line.

The front side metallization of silicon solar cells is almost exclusively silver that is deposited using a screen-printed process followed by a sintering step at high temperatures. Over the past decade the industry has severely reduced the amount of silver required, but the material still accounts for about 8 percent of the cost of a solar panel. Copper is a fraction of the cost, but requires multiple layers to protect the underlying silicon wafer and thus is not readily integrated into existing manufacturing plants. In this paper, a copper-based paste is screen printed onto a SiN coated silicon wafer and passed through a high temperature furnace in air. The performance of the device is measured using typical characterization tools. Accelerated testing of the device at elevated temperatures demonstrates an operational device with very little degradation after 1,000 hours at elevated temperature.

Thin film solar cells are favorable because of their minimum material usage and rising efficiencies. The three major thin film solar cell technologies include amorphous silicon (α-Si), copper indium gallium selenide (CIGS), and cadmium telluride (CdTe). In this paper, the evolution of each technology is discussed in both laboratory and commercial settings, and market share and reliability are equally explored. The module efficiencies of CIGS and CdTe technologies almost rival that of crystalline solar cells, which currently possess greater than 55% of the market share. α-Si is plagued with low efficiency and light-induced degradation, so it is almost extinct in terrestrial applications. CIGS and CdTe hold the greatest promise for the future of thin film. Longevity, reliability, consumer confidence and greater investments must be established before thin film solar cells are explored on building integrated photovoltaic systems.

Cost-effective production of the solar cell, a semiconductor device which converts sunlight directly to electricity without any polluting by-products, will lead to widespread affordability of solar electricity. The solar cell uses silver (Ag) for its front contact, which is the second most expensive layer of the device. In order to decrease the cost, less Ag should be used, which can be achieved through inkjet printing as opposed to screen-printing technology, currently most common in the solar cell industry. Inkjet printing technology is appealing since it can produce finer gridlines, use less Ag, produce uniform gridlines (from cell to cell and on the same cell), and lower contact resistance on lowly doped emitters. In this work, the inkjet gridlines were fabricated in two ways: (i) inkjet seed/plate (IJSP) and (ii) inkjet seed/full-grid (IJSF). The IJSF contact is fabricated similarly to the screen-printed (SP) counterpart, while the IJSP contact requires the use of Ag plating solution to plate after high temperature contact firing. Through the electroluminescence (EL) measuring technique and the Suns-V OC measurements, similar performance metrics for the IJSF and SP contacts were obtained, while the IJSP contact had the weakest performance. With a total of 1.31% less overall metal coverage than the SP contact, the IJSF contact used less Ag while achieving the same performance.

The current paths in the screen-printed contact of a solar cell have been proposed to be (i) through Ag crystallites embedded in Si, (ii) tunneling through the thin interface glass layer between silicon and gridline and (iii) through Ag nanoparticle assisted tunneling. The fourth path through the micro-colloids is hereby proposed based on the characterization and mathematical model of a screen-printed contact to a 95 Ω/sq emitter. According to Raman spectroscopy and conductive AFM, it has been established that the glass with micro-colloids after contact formation is highly conductive due to colloids containing low bandgap semi-metals. Thus, such glass serves as a path with low contact resistance for current transport from Si to the Ag gridline. This model is particularly applicable to lowly doped emitter, which would not be contacted ordinarily with low contact resistance based on the barrier height of the interface dielectric.

This letter reports on an innovative front grid design that is capable of: 1) decreasing the metal shading; 2) increasing the short-circuit current ( $J_{\mathrm {SC}}$ ); 3) increasing the open-circuit voltage ( $V_{\mathrm {OC}}$ ); 4) maintaining the fill factor; and 5) increasing the efficiency of an industrial Al back surface field (Al-BSF) solar cell. Because the design incorporates four-streets and five-busbars (4S-5BB), it uses less front silver metal ( $\sim 73$ mg) than the conventional 3BB ( $\sim 129$ mg), hence the cost reduction from 6.07 to 3.426 ¢ per cell in metallization with no additional processing step. The 4S-5BB design has shown great potential for achieving >20% efficiency for the industrial size Al-BSF silicon solar cell. In this letter, the preliminary result for the 4S-5BB industrial Al-BSF cell having average efficiency of 19.66% compared with 19.3% 3BB counterpart is presented.

This paper reports on modeled and experimental results of industrial aluminum back surface field (Al-BSF) silicon solar cells with 3-, 4- and 5-busbar (3-, 4- and 5-BB). It was found that by keeping the same metal grid coverage, solar cells with 4- and 5-BB gave higher fill factor (FF) and energy conversion efficiency than the state-of-the-art 3-BB. This is attributed to decreased gridline resistance as the number of busbars increases from three to four, and four to five. The experimental I – V data showed an average increase in cell efficiency by 0.41% absolute and 0.66% absolute with 4-BB and 5-BB cells, respectively, compared to the 3-BB counterparts. By using the production emitter and commercial size of 239 cm 2 , best efficiency of ~19.94% was achieved for a 5-BB Al-BSF cell.

This paper reports on the ohmic contact formed by the conductive glass layer found at the interface of Ag/Si contacts on lowly doped emitter silicon solar cells due to the presence of semimetal nanoparticles. The scanning electron microscopy and scanning transmission electron microscope analyses revealed an interface glass layer (IGL) thickness of greater than 380 nm, which was enriched with micro-sized alloys composed of semimetal nanoparticles. This IGL was conductive as confirmed by conductive atomic force microscopy (C-AFM). The presence of these semimetal nanoparticles, identified as Ag 2Te and PbTe, was both endowed with low bandgap energies as confirmed by Raman spectroscopy and energy dispersive x-ray spectroscopy. These semimetal nanoparticles were found only in the IGL and formed a “bridge” to connect the Ag gridline and Si emitter for carrier transport. Based on the modified Fowler–Nordheim tunneling process, the modeled C-AFM I–V characteristic curve showed a barrier height of 0.1 eV corresponding to an IGL thickness of only 18 nm. Thus, the carrier transport mechanism “through the conductive bridge” was formed by the semimetal nanoparticles embedded in the IGL. Therefore, the high conductivity of the interface glass led to the specific contact resistance to be independent of the emitter peak doping concentration.

In this paper, the influence of Te-glass frit on silver screen-printed contact formation in crystalline Si solar cell is reported. During fire through dielectric (FTD) contact process, the Te-glass frit enhances the formation of Ag 2 Te and PbTe in the reformed glass underlying the front Ag gridline. The presence of Ag 2 Te, which is a semi-metal, heightens the electron tunneling probability and in turn reduces the contact resistivity. The formation of the Ag 2 Te and PbTe is supported by Raman spectra peaks at 79 cm−1, 119 cm−1, 145 cm−1, 183 cm−1, 195 cm−1 and 660 cm1 for the Ag pastes after HNO 3 treatment. SEM also reveals that most metal crystallites are embedded in the glass layer rather than silicon. This means that, these glass layers play important role in the electron tunneling from Si into the Ag gridline.

This paper reports the importance of PbO/TeO2 ratio in the formation of Ag2Te, which is responsible for increasing the reformed glass conductivity after sintering. The presence of Ag2Te, a degenerate semiconductor, seen in the Raman Spectra, after HNO3 etching of the gridline and its absence in the HF etched counterpart, supports this assertion. Thus, the increase glass conductivity after sintering has the potential of enabling formation of high quality contacts to emitter with high sheet resistance.

We report a single heterojunction solar cell model based on crystalline p-silicon and n-zinc oxide. The ZnO can act as front n-layer as well as antireflection coating saving processing cost and complexity. Experiments are performed to find optimized growth window using MOCVD to achieve maximum transmission in ZnO as front layer of the solar cell. Gallium-rich ZnO:Ga films are also grown to improve optical properties of the front layer. Optical characterizations of pristine ZnO and gallium-rich ZnO:Ga are presented. The modified PC1D software is used to find the optimized parameters for the solar cell. Absorption spectrum of ~0.5 µm thick ZnO film grown in our lab was used in the simulations to get realistic results. Simulations anticipated conversion efficiency of 19% and fill factor of 81%.

SiC power devices exhibit low on-resistance and are capable of processing high switching frequencies at elevated temperatures. When SiC MOSFETs are employed as switch, minimizing switching power losses is crucial. A proper design of gate driving circuit for SiC MOSFET can ensure minimum losses, safe operation of the device and reliable performance. A comparative study of gate drivers for SiC MOSFETs in current literature is presented in this paper.

This paper reports the PC2D simulation of an industrial size FSF solar cell with screen-printed Al alloyed back p-n junction. Best cell efficiency of 18.4% was modeled by PC2D confirming fill factor (FF) of 79.3%. Contour maps were generated to confirm the impact of FSF sheet resistance on the lateral voltage distribution. The maximum collection efficiency of ~97% was obtained at 1010 nm, which is close to the p-n junction and ~96% at 350 nm. The short circuit current was somewhat low because of lower emitter to the total cell area. Thus, this simple and cost-effective structure has great potential to reduce the cost of solar electricity.

Existing methods of utility-scale PV plant monitoring and measurement are invasive, and often require disconnection of the solar module in order to connect the module to measuring tools. This paper describes a method to validate a novel approach to non-invasive monitoring. Specifications for the technique include the ability to understand and diagnose plant health while also being cost-efficient and time-efficient compared to existing methods. After a series of research and on-site solar farm visits, it was concluded that a way to measure performance without the need for module disconnection would be to use plant health metrics that a typical solar farm accesses daily, and compare those metrics to an ideal metrics.

Metallization is crucial to silicon solar cell performance. It is the second most expensive process step in the fabrication of a solar cell. In order to reduce the cost of solar cell, the metallization cost has to be cut down by using less metal without compromising the efficiency. Screen-printing has been used in metallizing the commercial solar cell because of the high throughput and low cost at the expense of performance. However, because of the variability in the screen-printed gridlines, the amount of Ag metal used cannot be controlled. More so, the dependence of the contact resistance on doping necessitates the use of low sheet resistance emitters, which exacerbates losses in the blue response and hence the efficiency. To balance the contact resistance and improve blue response, several approaches have been undertaken including, use of Ag pastes incorporating nanoparticle glass frits that will not diffuse excessively into a lightly doped emitter, Ni plating on lightly doped emitter through SiNx dielectric plus NiSi formation followed by Cu and/or Ag plating, light induced plating (LIP) of Ag or Cu on fired through dielectric metal seed layers formed by aerosol or inkjet or screen-printing. All these approaches require excellent adhesion and gridline conductivity to minimize the total series resistance, which impedes the collection of electrons. This paper presents the issues and the pathway to achieving high efficiency using low cost metallization technology involving inkjet-printed Ag fine gridline having 38 μm width and 3 μm height fired through the SiNx followed by Ni and Cu plating. A comprehensive analysis of silicon/metal interface, using high precision microscopy, has shown that the investigated metallization technology is appropriate for the longevity of the device.

This paper reports ink-jetted gridline, production ready, solar cells with ion implanted homogeneous high sheet resistance emitters having efficiency of >19%. The average efficiency of ∼18.96% on 80 ohm/square ion implanted emitter with highest efficiency of 19.2% demonstrates the potential of combining the two high precision technologies, inkjet printing and ion implantation. The key attributes of the cells include average open circuit voltage (VOC) of 640 mV, fill factor (FF) of 79.14% and short circuit current density (JSC) of 37.8 mA/cm2. Worthy of note is that, the front gridlines width and height of 47.6 μm and 43.9 μm resulting in aspect ratio of 0.92 using only 83 mg total Ag, which is, at least 20% Ag less than today's screen printed cells. However, the reference screen-printed cells showed similar average efficiency with the best gridline widths of ∼70 μm and height of ∼28 μm used >100 mg of Ag. Statistical analysis illustrates that the highest efficiency with the screen-printed contacts is an outlier as the minimum efficiency for the ink-jetted group. This efficiency is very significant because all cells were fabricated on a pilot production line at Shanghai Shengzhou New Energy Co. Ltd, in China.

The formation of a continuous contact in a silicon solar cell with high percentage area of Ag crystallite ensures low contact resistance. This work utilizes ImageJ open source software to measure and analyze the percentage area of Ag crystallite and other impurities in a contact of a silicon solar cell. It measures the percentage area of Ag crystallite in the contact of Si solar cells with three different Ag pastes: A, B, and C. The A-paste repeatedly shows high percentage area of Ag crystallite, fill factor (FF) and the lowest contact resistance, followed by the B-paste, and finally the C-paste. With the data collected and analyzed, an inverse correlation was shown between the percentage area of Ag crystallite and the contact resistance.

We report structural and electrical characterizations of zinc oxide films grown on sapphire and silicon substrates. The zinc oxide works as an active n-layer of a heterojunction solar cell as well as antireflection coating. The deposition parameters of zinc oxide have been optimized using RF sputtering. The x-ray diffraction and scanning electron microscopy confirm that optimized deposition temperature and RF power are >300 °C and 180 W respectively. The films grown on textured silicon substrates have lower crystallinity as compared to those grown on sapphire. The pn junction formation between zinc oxide and silicon has been confirmed by current-voltage and suns-VOC measurements. The initial solar cell device has been fabricated using silver as front and aluminum as back contact.

This paper reviews the three main thin film solar cell technologies: amorphous silicon (α-Si), copper indium gallium selenide (CIGS), and cadmium telluride (CdTe). The evolution of these three technologies is discussed in comparison to commercial applications, reliability, and market share. While the α-Si cell is almost extinct in terrestrial applications, CIGS and CdTe are comparable to multicrystalline solar cells, which have greater than 55% market share. Therefore, CIGS and CdTe thin film technologies are expected to compete with the crystalline solar cell technology. However, the longevity of thin film solar cells remains a problem that begs an answer before it can be explored on building integrated photovoltaic systems.

For silicon solar cell, the contact resistance and other series resistance component must be low so that the fill factor (FF) will be high for maximum power extraction. This work measures the contact resistance of mono crystalline silicon cell with respect to micro and nano particle Ag in the metal paste. Nano paste Ag possess lower contact resistance than the micro counterpart. Also in the metal co-firing, the belt speed can impact the contact resistance so that as the belt speed increases, the contact resistance decreases. This stems from shorter dwell time at high temperature as the belt speed increases, and limit the time for oxide to grow at the silicon/metal interface to raise the potential and thereby increase the contact resistance.

In this paper, a theoretical simulation model of bifacial Si solar cell using personal computer one dimensional (PC1D) program is reported. The impact of electrical and optical parameters on the device performance is thoroughly investigated. Emitter doping, bulk resistivity, back surface field (BSF) and antireflection coating (ARC) layers on front and rear of the cell were fine tuned to obtain efficiency closed to the theoretical limit of Si material. A front efficiency of 23.6% compared to 22.3% from the rear was achieved. Thus, an excellent bifaciality factor of 94.5% was obtained. However, given the transparency of the rear of a bifacial cell a 20-30% more power due to albedo is possible. In this work, a 6.0 Watt was demonstrated with 0.3 suns from the rear in addition to the 1 sun from front side.

Screen-printed metal contact formation through a carbon containing antireflection coating was investigated for silicon solar cells by fabricating conventional carbon-free SiNx and carbon-rich SiCxNy film. An appreciable difference was found in the average shunt resistance (Rsh), which was about an order of magnitude higher for SiCxNy-coated solar cells relative to the counterpart SiNx-coated solar cells. Series resistance (Rs) and fill factor (FF) were comparable for both antireflection coatings but the starting efficiency of SiCxNy-coated cell was ~0·2% lower because of slightly inferior surface passivation. However, SiCxNy-coated solar cells showed less degradation under lower illumination (

Concentrator cells have the potential to reduce the usage of semiconductor material while producing high efficiency and more power density in a cell. Silicon solar cells now provide a unique opportunity for low-cost concentrator systems that are suitable for low to medium (2-20X) concentration because cell technology and screen-printed contacts have improved considerably. In this paper, we report on the understanding and development of low-cost manufacturable screen-printed concentrator solar cells. Computer modeling was performed first to show that, under 10% metal coverage, it is possible for screen-printed cells to have series resistance that is low enough (

In this paper, we investigate the conditions that are necessary to produce high-quality screen-printed metal contacts to large-area cast multicrystalline Si solar cells using a high-throughput infrared conveyer belt furnace. We show that high sinter ramp rates produce a back-surface recombination velocity of ~400 cm/s and the most homogeneous Al back-surface field. We also show that the short sinter dwell time produces a thin Ag/Si interfacial glass layer; optimal bulk defect hydrogenation, as indicated by final bulk lifetime improvements; and low Ag specific contact resistance. The fundamental research and understanding applied here produces high fill factors, low series resistance, and high efficiency.

We present industrialized bifacial solar cells on large area (149 cm2) 2 cm CZ monocrystalline silicon wafers processed with industrially relevant techniques such as liquid source BBr3 and POCl3 open-tube furnace diffusions, plasma enhanced chemical vapor deposition (PECVD) SiNx deposition, and screen printed contacts. The fundamental analysis of the paste using at boron-diffused surface and the bifacial solar cell firing cycle has been investigated. The resulting solar cells have front and rear efficiencies of 16.6 and 12.8%, respectively. The ratio of the rear JSC to front JSC is 76.8%. It increases the bifacial power by 15.4% over a conventional solar cell at 20% of 1-sun rear illumination, which equals to the power of a conventional solar cell with 19.2% efficiency. We also present a bifacial glass–glass photovoltaic (PV) module with 30 bifacial cells with the electrical characteristics. Copyright © 2010 John Wiley & Sons, Ltd.

In this paper the impact of rapid thermal processing (RTP) on AL-BSF crystalline silicon solar cell performance is reported. The efficiency of both mono and multi crystalline cells are observed to depend on the belt speed. The fast ramp rates of ∼100°C/s and over with the IR belt furnace has enabled the realization of the benefits of a uniform Al-BSF, which led to open circuit voltage (VOC) of ∼643 mV for all the belt speeds. This indicates that, although the ramp up rate depends on belt speed, the absolute value is not critical to yielding good VOC provided it is ∼100°C/s. However, the ramp down rate made a difference in the fill factor (FF) and led to the dependence of efficiency on the belt speed. The multi crystalline cells benefited from the short dwell time for optimum bulk hydrogenation and fast ramp down for good front contacts and therefore, the dependence of the minority carrier lifetime on belt speed. Also, LID is observed to depend on belt speed and contact firing. The higher the belt speed the lower the degradation due to LID and the higher the ideality factor, the more severe the degradation. Thus, cells fired at 250 IPM with n-factor of 1.06 showed lower LID after 30 minutes and 24 hours than the commercial cell that had 1.10 n-factor after contact firing.

We propose a ZnO/Si single heterojunction solar cell model based on PC1D simulations and preliminary experimental support. The front ZnO film is intended to perform as antireflection coating as well as electrically active layer in pn junction formation. Considering importance of optical properties of ZnO as front n-layer, experiments are performed to find optimized growth window for ZnO using MOCVD. Absorption spectrum of ∼100 nm thick ZnO film grown in our lab was used in the PC1D simulations in order to get more realistic results. Simulations projected conversion efficiency around 19% and fill factor more than 80% which are very promising.

This paper reports on the modeled and experimental results of industrial aluminum back surface field (Al-BSF) silicon solar cells with different number of busbars (three-, four- and five) for cost-effective metallization. It is found that by keeping the same metal grid coverage, solar cells with four- and five-busbar designs give higher fill factor (FF) and conversion efficiency than the-state-of-the-art three-busbar. This is attributed to decreased gridline resistance as the number of busbars increases from three to four, and four to five. The experimental I–V data shows an increase in cell efficiency by 0.18%absolute and 0.34%absolute with four- and five-busbar cells, respectively, compared to the three-busbar counterpart. This suggests that four- and five-busbar designs having finer gridlines will lead to >20% Al-BSF cell.

Solar photovoltaic (PV) systems provide an environmentally friendly method to harvest energy. Incorporating a PV system onto a campus building would help offset energy costs. UNC Charlotte identified the Colvard building roof as a promising candidate for solar panels. In this paper, the feasibility of placing a PV array on the roof is investigated. Six system configurations were identified as: (i) micro-inverter and grid tie (ii) micro-inverter with grid tie and battery backup (iii) micro-inverter and battery (stand-alone), (iv) central/string inverter with grid-tie, (v) central/string inverter with grid tie and battery backup, (vi) central/string inverter and battery (stand-alone). The designs were systematically eliminated based on the benefits of (a) micro-inverters, (b) battery bank, (c) AC coupling and (d) grid interconnections. Micro-inverters were ruled beneficial based on literature review and also the expansion opportunities they afforded. The battery bank was ruled unnecessary based on power reliability data obtained from Facilities Management. AC coupling was also deemed an inefficient way to couple a battery bank based on both cost and losses in efficiency. A grid tie was chosen over a stand-alone setup due to the power reliability of on-campus power and the unjustified cost a battery bank posed. Thus, the study found that a grid-tie system with micro-inverters is the most suitable configuration for the Colvard roof space at UNC Charlotte. The study also found that laying the PV panels flat maximized yearly power output for the roof. A novel way to mount the panels by point-loading was devised, allowing additional weight to be added without compromising the roof's structural integrity.

High-efficiency 4cm 2 screen-printed (SP) textured cells were fabricated on 100Ω/sq emitters using a rapid single-step belt furnace firing process. The high contact quality resulted in a low series resistance of 0.79 Ωcm 2 , high shunt resistance of48 836 Ωcm 2 , a low junction leakage current of 18·5 nA/cm 2 (n 2 = 2) yielding a high fill factor (FF) of 0·784 on 100 Ω/sq emitter. A low resistivity (0·6 Ωcm) FZ Si was used for the base to enhance the contribution of the high sheet-resistance emitter without appreciably sacrificing the bulk lifetime. This resulted in a 19% efficient (confirmed at NREL) SP 4cm 2 cell on textured FZ silicon with SP contacts and single-layer antireflection coating. This is apparently higher in performance than any other previously reported cell using standard screen-printing approaches (i.e., single-step firing and grid metallization). Detailed cell characterization and device modeling were performed to extract all the important device parameters of this 19% SP Si cell and provide guidelines for achieving 20% SP Si cells.

This paper reports on the empirical model for series resistance (R s ) of a screen-printed silicon solar cell with segmented metal grids. Due to the quasi-Gaussian shape of gridline cross section, a mathematical expression of the practical cross section of gridline was implemented instead of the simple rectangular shape. And segmentations of gridlines and busbars were introduced to assess the impact on series resistance and solar cell performance. The advantage of this evaluation can be taken to determine the optimal metal grid design in terms of grid geometries and distributions of metal electrodes. It was found that for an industrial size monocrystalline silicon solar cell with 3 busbars having a width of 1.5 mm, and 92 gridlines of ∼50 °m width, the optimal segmentation for gridlines should be ∼0.67 mm, and for busbars should be the line spacing. A further study reveals that the segmentations in busbars has much larger impact on efficiency than gridlines.

In this letter, we report on the ink-jet full gridline cells with three different Ag dosages (70, 90, and 130 mg) on 75-Ω/sq emitters. We observed that the open-circuit voltage (VOC), short-circuit current density (JSC), and fill factor (FF ) were highest for the 130-mg dose and decrease thereafter as the Ag dosage decreases. Because of the decreased FF with decreasing Ag dosage, the efficiency followed the same trend. However, we demonstrated, for the first time, fully ink-jetted front Ag gridlines with an FF of 0.765 and efficiency of 18.4% on 239-cm2 commercial CZ wafers with a sheet resistance of 75 Ω/sq . Noteworthy is the achievement of 17.8% efficiency with only 70 mg of Ag, which is ~ 68% less Ag than that used on cells with screen-printed gridlines. This represents a Ag cost saving of ~ $0.245 per 6-inch wafer compared to the screen-printed counterpart with 220 mg of Ag.

The mechanisms of carrier injection and recombination in a GaN/InGaN single quantum well light-emitting diodes have been studied. Strong defect-assisted tunneling behavior has been observed in both forward and reverse current–voltage characteristics. In addition to band-edge emission at 400 nm, the electroluminescence has also been attributed to radiative tunneling from band-to-deep level states and band-to-band tail states. The approximately current-squared dependence of light intensity at 400 nm even at high currents indicates dominant nonradiative recombination through deep-lying states within the space-charge region. Inhomogeneous avalanche breakdown luminescence, which is primarily caused by deep-level recombination, suggests a nonuniform spatial distribution of reverse leakage in these diodes.

This paper shows that rapidly formed emitters in less than 6 min in the hot zone of a conveyor belt furnace or in 3 min in an rapid thermal processing (RTP) system, in conjunction with a screen-printed (SP) RTP Al-BSF and passivating oxide formed simultaneously in 2 min can produce very simple high-efficiency n + -p-p + cells with no surface texturing, point contacts, or selective emitter. It is shown for the first time that an 80Ω/□ emitter and SP Al-back surface field (BSF) formed in a high throughput belt furnace produced 19% FZ cells and greater than 17% CZ cells with photolithography (PL) contacts. Using PL contacts, we also achieved 19% efficient cells on FZ, > 18% on MCZ, and ∼ 17% boron-doped CZ by emitter and SP Al-BSF formation in < 10 min in a single wafer RTP system. Finally, manufacturable cells with 45 Ω/□ emitter and SP Al-BSF and Ag contacts formed in the conveyor belt furnace gave 17% efficient cells on FZ silicon. Compared to the PL cells, the SP cell gave ∼2% lower efficiency along with a decrease in J sc and fill factor. This loss in performance is attributed to a combination of the poor blue response, higher series resistance and higher contact shading in the SP devices.

Presented at the 12th International Photovoltaic Science and Engineering Conference; Jeju Island, Korea; June 11-15, 2001.

Traditional boron-doped Czochralski-grown Si solar cells are known to suffer from light-induced degradation (LID). By replacing B with Ga as the dopant in the Cz melt or by reducing the oxygen content by implementing the magnetic-Cz (MCz) growth technique, not only can LID be eliminated, but also higher efficiency manufacturable screen-printed cells can be achieved. The use of thinner wafers for cell fabrication can significantly reduce the impact of LID on conventional boron-doped Cz cells. Knowledge of the degraded cell parameters can be used to determine the optimal thickness for the highest stabilized efficiency. A methodology is developed to maximize the stabilized efficiency after LID by using thinner wafers. A combination of device modeling and experimental data is used to demonstrate that, for traditional B-doped Cz Si, which degraded from 75 to 20 μs, the optimum cell thickness is in the range of 150–190 μm for a back-surface recombination velocity of ∼104 cm/s. This cell design reduces the material cost and the absolute efficiency degradation from 0.75% (375 μm device) to 0.24% (157 μm device) and gives the highest stabilized Cz cell efficiency. Copyright © 2002 John Wiley & Sons, Ltd.

This paper investigates TeO2, one of the front Ag paste additives, to understand its role in low contact and gridline resistances for screen-printed Si solar cell. It is concluded that TeO2 aids the reduction of molten glass frit viscosity during contact co-firing. This in turn, leads to uniform flow of molten glass frit, both in the gridline bulk and interface of gridline and SiN x . Therefore, the uniform wetting and etching of SiN x and consequently larger contact area of metal to Si compared to its counterpart without TeO2. Hence, the current transport mechanism from Si to gridline can be said to be both direct and tunneling. The Raman spectra showed a blue shift in the phase of the TeO2 after contact co-firing in the gridline bulk confirming a crystalline γ-TeO2.