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Purpose: This study aims to investigate the influence of different solder alloy materials on passive devices during laser soldering process. Solder alloy material has been found to significantly influence the solder joint's quality, such as void formation that can lead to cracks, filling time that affects productivity and fillet shape that determines the solder joint's reliability. Design/methodology/approach: Finite volume method (FVM)-based simulation that was validated using real laser soldering experiment is used to evaluate the effect of various solder alloy materials, including SAC305, SAC387, SAC396 and SAC405 in laser soldering. These solders are commonly used to assemble the pin-through hole (PTH) capacitor onto the printed circuit board. Findings: The simulation results show how the void ratio, filling time and flow characteristics of different solder alloy materials affect the quality of the solder joint. The optimal solder alloy is SAC396 due to its low void ratio of 1.95%, fastest filling time (1.3 s) to fill a 98% PTH barrel and excellent flow characteristics. The results give the ideal setting for the parameters that can increase the effectiveness of the laser soldering process, which include reducing filling time from 2.2 s to less than 1.5 s while maintaining a high-quality solder joint with a void ratio of less than 2%. Industries that emphasize reliable soldering and effective joint formation gain the advantage of minimal occurrence of void formation, quick filling time and exceptional flowability offered by this solution. Practical implications: This research is expected not only to improve solder joint reliability but also to drive advancements in laser soldering technology, supporting the development of efficient and reliable microelectronics assembly processes for future electronic devices. The optimized laser soldering material will enable the production of superior passive devices, meeting the growing demands of the electronics market for smaller, high-performance electronic products. Originality/value: The comparison of different solder alloy materials for PTH capacitor assembly during the laser soldering process has not been reported to date. Additionally, volume of fluid numerical analysis of the quality and reliability of different solder alloy joints has never been conducted on real PTH capacitor assemblies. [ABSTRACT FROM AUTHOR]

The three-dimensional liquid–sediment system of a coastline was investigated using experimental and numerical approaches. A scaled-down model of the coastline was numerically studied using smooth particle hydrodynamics (SPH). The flow dynamics and the impacts of the wave frequency and the seaward slope angle on the breaking wave characteristics of the two-phase liquid–sediment interaction were parametrically studied. A particle image velocimetry (PIV) experiment was conducted to validate the SPH predictions. It was found that the flow profiles obtained by the PIV and SPH are in good agreement both qualitatively and quantitatively. The maximum velocity of the fluid flow was recorded as 0.5623 m/s in the SPH simulation, but as 0.5860 m/s in the PIV experimental, with a percentage difference of 4.21%. Subsequently, it was found that the breaking wave characteristic is surging at the wave frequency range of f < 0.15 Hz, plunging at 0.15 < f < 0.55 Hz, and spilling at 0.55 < f ≤ 1.0 Hz. It was also established that at a particular Froude number, it is observed that spilling, plunging, and surging wave breakers are produced at low, mid, and high seaward slope angles, respectively. Meanwhile, increasing the Froude number increases the tendency to produce spilling or plugging breaking waves, irrespective of the slope angle. Ultimately, this study has demonstrated the presented methodology's usefulness in investigating coastlines' liquid–sediment interaction properties. [ABSTRACT FROM AUTHOR]

Purpose: This paper aims to study the interfacial delamination found in the boundary of the copper/copper-epoxy layers of a multi-layer ceramic capacitor. Design/methodology/approach: The thermal reflow process of the capacitor assembly and the crack propagation from the initial micro voids presented in the boundary, and later manifested into delamination, were numerically simulated. Besides, the cross section of the capacitor assembly was inspected for delamination cracks and voids using a scanning electronic microscope. Findings: Interfacial delamination in the boundary of copper/copper-epoxy layers was caused by the thermal mismatch and growth of micro voids during the thermal reflow process. The maximum deformation on the capacitor during reflow was 2.370 µm. It was found that a larger void would induce higher vicinity stress, mode I stress intensity factor, and crack elongation rate. Moreover, the crack extension increased with the exerted deformation until 0.3 µm, before saturating at the peak crack extension of around 0.078 µm. Practical implications: The root cause of interfacial delamination issues in capacitors due to thermal reflow has been identified, and viable solutions proposed. These can eliminate the additional manufacturing cost and lead time incurred in identifying and tackling the issues; as well as benefit end-users, by promoting the electronic device reliability and performance. Originality/value: To the best of the authors' knowledge, the mechanism of delamination occurrence in a capacitor during has not been reported to date. The parametric variation analysis of the void size and deformation on the crack growth has never been conducted. [ABSTRACT FROM AUTHOR]