3,876 results on '"Wilson, Ron"'
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402. With relief, NEC chairman assesses electronics realm -- Sasaki believes core goods will be locally customized to serve fragmented markets
403. Agilent teams BIST, tester for 3- to 6-GHz I/Os -- Channel cards that plug into test head can slash SoC testing costs, company says
404. Neutron storm swirls around FPGA reliability
405. Cypress plans bigger, faster, cheaper PSoC chips -- Three new subfamilies of programmable cores poised for debut by year's end
406. Changes force radical rethink of ASIC SRAM
407. Fujitsu boosts structured-ASIC lineup -- ARM9 version launched, along with family that offers mix of PHY blocks
408. Sharp MCU makes use of Ethernet MAC -- Like ASSPs, chip has specific apps: connected desktop appliances, mobile devices
409. IMEC rethinks configurability
410. Gold rush days for global design?
411. Infineon processor bridges ATM, Ethernet traffic
412. Via strengthens media platform for home video -- PC chip maker's north bridge forms set with south bridge, Vinyl Audio, DriveStation ICs
413. New knob for designing-in yield
414. Open Silicon takes ASICs off the beaten path -- Startup holds methodology constant to raise the bar on price, delivery, quality specs
415. Process design kits draw fire, standards scrutiny
416. Scanner front end performs 40-Msample/s conversion -- Wolfson adds features, speed to its latest AFE
417. Broadcom preps Gbit Ethernet for small business -- As costs drop, can a push for home markets be far behind?
418. Choice of ASIC gate width can be boon to design -- Kawasaki expands designers' options by placing grid size, threshold voltage in play
419. Lithography may proceed one atom at a time -- New techniques, including dip-pen, based on atomic microscopy, make progress
420. Low-pin-count USB transceiver spec is released -- Consortium argues in favor of external physical-layer IC
421. Libraries, memory IP raised from the dead
422. Bruiser MCU looks toward telematics -- Renesas device expected to find bigger demand for its horsepower overseas
423. Passing packets under ever more scrutiny -- New comms architectures peer deeply into the content, not just the header, to ferret out spam, viruses, worms and other 'invasive critters'
424. Two schemes steal lithography show -- 193-nm immersion is No. 1 but nanoimprint impresses
425. Weighing design effort vs. results
426. Arteris spins packet-based on-chip net IP
427. NEC: Nanobridge could build programmable ICs -- Novel structure may lead to dense reconfigurable arrays
428. Xignal tips 'virtual IC' business model -- Customers to pay royalties instead of IP license fees
429. SoC makes grab at tapeless camcorder market -- MediaWorks vows DVD-like video with SoC in 'ASIC slot'
430. Memory-rich MCUs from Philips CAN do -- ARM-based microcontroller family adds flash, support for CAN automotive bus
431. MOSFET workhorse due for overhaul -- The latest wrinkle in 90-nm design involves the transistor: Current is a problem, chip experts say, and so is the FET's ever-shrinking size
432. What process is this, anyway? -- There's more to the definition of nodes than the naming convention might imply
433. Moore's Law hits a wall -- End of IC scaling puts future systems at risk
434. Rover retread: How earlier fix broke Spirit
435. ARC bills latest CPU core as central processor -- Built at 130 nm, the compact 400-MHz ARC 700 boasts a number of design tweaks
436. Synopsys to market TSMC's cell and I/O libraries -- SRAM macros also in accord; is more consolidation ahead?
437. IP core taps varied storage interfaces -- Palmchip provides IDE/ATA, CF, CF+, PCMCIA protocols from a single controller
438. Faraday offers benchmarks for structured ASICs -- Draws on IP library for DSP, DMA controller, RISC CPU
439. The real cost problem with SoCs
440. First Silicon tackles multiprocessor debug on SoCs -- Embedded circuitry rolls for entire on-chip system
441. Sharp module yields sharper phone photos -- 2-megapixel unit packs lens, motor, CCD and electronics
442. FPGA vendors revise logic for sub-100-nm era -- Altera scrubs four-input lookup table; Xilinx starts at 90 nm with low-cost devices
443. Software becomes manager of power -- LDO regulators on a chip from Austriamicrosystems control flow of voltages
444. Leopard leaps into structured ASICs -- Scheme combines via- and SRAM-configured logic with embedded MACs
445. Swing era fades to history -- Analyst: IC boom/bust cycles soften their edge
446. 2 IP vendors pave the road to low power -- Virtual Silicon, MoSys aim at bringing high-end tricks to mainstream design teams
447. 14-bit A/D samples pair of fast signals together -- Converter from Linear Tech runs dual, on-die S/H units
448. ST tames soft errors in SRAM by adding capacitors -- Research team increases capacitance in memories under alpha-particle assault
449. Transmeta, Via take embedded tack
450. Cam phones batter digital standalones
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