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This tutorial introduces and compares current reference circuits. To give meaningful insights to readers, we categorize current reference circuits into five types: a) $\Delta {V}_{\mathrm{ BE}}$ -based current references; b) beta-multiplier-based current references; c) smart-bias-based current references; d) division-based current references; e) calibration-based current references. For each type of current reference, limitations and research progress are summarized. Finally, this tutorial compares the five types of current references and concludes which types are more suitable depending on the need of applications.

This article presents a periodically time-varying (PTV) noise cancellation technique for filtering-by-aliasing (FA) receivers. The key to the proposed technique is the use of a time-varying transconductance ( $G_{\mathrm {m}}$ ) cell to sense the noise generated by the PTV resistor in an FA receiver while maintaining the sharp filtering offered by FA. A prototype IC fabricated in a 28-nm CMOS process improves the noise figure (NF) by about 3 dB while achieving over 67-dB stopband rejection with a transition bandwidth (BW) of only four times the RF BW. A minimum in-band NF of 3.2 dB and an average in-band NF of 4.2 dB are demonstrated. With an upfront $N$ -path filter to further enhance the linearity, the measured out-of-band IIP3 is +18 dBm and the blocker 1-dB compression point is +9 dBm. The whole chip, including digital control circuitry, operates under a 0.9-V supply, while consuming 61-mW power at 500-MHz LO.

A normally- off SiC-JFET/GaN-HEMT cascode device is recently proposed, featuring a cascode configuration that incorporates a high-voltage (i.e., 1200 V) SiC junction field effect transistor (JFET) and a low-voltage GaN high electron mobility transistor (HEMT). This cascode device exhibits superior thermal stability and switching performance compared to the SiC MOSFETs, but also inevitably presents challenge in dv/dt -control as the input gate does not directly control the high-voltage JFET. Since dv/dt -control is of great importance to the management and suppression of electromagnetic interference in power electronics systems, methods of controlling the dv/dt rates of SiC/GaN cascode devices need to be developed. In this article, we conduct systematic investigation on different dv/dt control schemes with theoretical analysis and experimental evaluation. A dv/dt -control method based on diode-clamped external JFET gate resistor is proposed and evaluated by comparing it with other more conventional methods. The proposed dv/dt -control method is verified to provide a balanced dv/dt -control on the device turn- on and turn- off .

Sudden increases in the dc-link voltage, caused by ac grid side voltage drops, can lead to potential damage in the equipment. Therefore, dc choppers are widely used in offshore wind power links to absorb the excess energy and keep the voltage within safe margins. This article investigates the existing chopper topologies and summarizes their advantages and disadvantages. On this basis, a novel dc chopper topology with both centralized and distributed resistances is proposed. It is a combination of two mainstream chopper topologies and gives the flexibility to tradeoff among the pros and cons of them. In this way, the proposed topology achieves great electromagnetic interference performance, precise power control, and very small system disturbance. In addition, the maximum power dissipation of the distributed resistance is reduced by 75%. The switching frequency and the loss of insulated gate bipolar transistors (IGBTs) are also decreased. Finally, the claimed attributes of the proposed topology are verified by test and simulation.

This article first reviews the position control of piezoelectric actuators, particularly charge-based sensorless control systems, which often include a charge estimator as a key component. The rest of the paper is about charge estimators for piezoelectric actuators. Two of the most recent/effective types of these estimators utilise either a sensing capacitor (type I in this paper) or a sensing resistor (type II); the latter (and the newer) type is broadly known as a digital charge estimator. Some experimental results in the literature show that, with the same loss in excitation voltage, a considerably higher amount of charge can be estimated with a type II estimator in comparison with a type I estimator; therefore, the superiority of type II estimators was acknowledged. In order to re-assess this conclusion, this paper equitably compares type I and II estimators through analytical modelling and experimentation. The results indicate that type II estimators have only a slight advantage in estimating higher amounts of charge, if both type I and II estimators are designed appropriately. At the same time, type II estimators have disadvantages; e.g., the resistance of type II estimators has to be tuned to suit different excitation frequencies. This research concludes that capacitor-based (type I) charge estimators for piezoelectric actuators, with pertinent design and implementation, can be still the prime solution for many charge estimation problems despite claims in the literature in the last decade.

The theoretical model and experimental characteristics of ultra-high sensitivity MEMS pressure sensor chip for 1 kPa utilizing a novel electrical circuit are presented. The electrical circuit uses piezosensitive differential amplifier with negative feedback loop (PDA-NFL) based on two bipolar-junction transistors (BJT). The BJT has a vertical structure of n-p-n type (V-NPN) formed on a non-deformable chip area. The circuit contains eight piezoresistors located on a profiled membrane in the areas of maximum mechanical stresses. The circuit design provides a balance between high pressure sensitivity (S =44.9 mV/V/kPa) and fairly low temperature coefficient of zero signal (TCZ =0.094% FS/°C). Additionally, high membrane burst pressure of P =550 kPa was reached.

In this article, the design, fabrication and measurements are presented for an indirectly-heated RF MEMS thermoelectric power sensor with different terminal resistor dimensions. In this design, thermal isolation is achieved through a $20~\mu \text{m}$ -thick MEMS substrate membrane using back etching technology. In order to maintain the stability of impedance matching, two low temperature coefficient of resistance (TCR) tantalum nitride (TaN) resistors of $50~\Omega $ are adopted to serve as heating sources. Considering the effect of the terminal resistor dimension on RF power sensing performance, six configuration sensors have been explored experimentally. Experimental results show that the output response of these devices has excellent RF-DC linearity with the power from 1 mW to 200 mW. And as the dimension of the terminal resistor gradually increases, their sensitivities are $77.3~\mu \text{V}$ /mW, $63.4~\mu \text{V}$ /mW, $56.3~\mu \text{V}$ /mW, $54.4~\mu \text{V}$ /mW, $49.5~\mu \text{V}$ /mW and $47.9~\mu \text{V}$ /mW at 10GHz, respectively. Meanwhile, the measured response time is 3.2 ms, 2.9 ms, 2.7 ms, 2.5 ms, 2.2 ms and 2.0 ms, respectively. This indicates that as the size of the terminal resistor increases, the corresponding sensitivity and response time are decreasing. Therefore, there is a trade-off consideration between high sensitivity and fast response time. Further, an electromagnetic-thermal-electric model of the indirectly-heated RF MEMS power sensor is proposed based on the Seebeck effect and heat transfer theory. Experiments and finite element method (FEM) simulation are performed to verify the validity of the proposed model. The results would be useful to improve future sensor designs and specific applications.

Transistors are typically based on inorganic or organic semiconductors. Metals have generally been considered unsuitable for such use because bulk metals screen electric fields and thus achieving electrically tunable conductivity is difficult. Alternatively, gradients of counterions in films of metal nanoparticles functionalized with charged organic ligands can be used to construct electronic devices, including resistors, diodes and sensors, but modulating the conductivity in these systems has also proven to be challenging. Here we show that transistors and logic circuits can be created from thin films of functionalized gold nanoparticles using dynamic ionic gradients established via an unconventional five-electrode configuration. The transistors are capable of a 400-fold modulation of electrical conductivity, and by combining with metal nanoparticle diodes and resistors, can be used to construct NOT, NAND and NOR logic gates, as well as a half-adder circuit. We also show that transistors deposited on flexible substrates continue to work when deformed and can withstand electrostatic discharges. Dynamic ionic gradients of counterions in films of metal nanoparticles functionalized with charged organic ligands can be used to create transistors that are capable of a 400-fold modulation of the electrical conductivity and can be used to construct logic gates and half-adder circuits.

The effectiveness of the electric braking system largely depends on how the braking is carried out, whether the braking characteristics that it forms are acceptable for a given vehicle, how simple and reliable the technical solutions embedded in the system are, and where the braking energy is used. With electric braking, it is possible not only to extinguish the electrical energy on the braking resistor, but also to send it back to the storage device and again use it in traction mode. This paper analyzes the most common methods of electric braking used in electric braking systems for traction electric drives that are in operation on vehicles. As the main criterion for evaluating the method of electric braking, its energy indicators are selected. The results of scientific research of the proposed new method of electric braking, which provides better energy performance and new technical solutions for its implementation, are considered. When implementing this method, DC motors are operated by sequential excitation generators. The current in the field windings is regulated by a DC-DC-converter. Energy in the power circuit is accumulated in storage devices and used in traction mode. When the storage devices are filled, the energy in the power circuit is extinguished by the braking resistor, and the energy from the output of the DC-DC-converter is used for own needs. In this case, braking characteristics are formed as in generators of independent excitation. To increase the braking efficiency at low speeds, it is necessary to smoothly regulate the resistance of the braking resistors by shunting them with transistor switches.

Neural networks are achieving state-of-the-art performance in many applications, from speech recognition to computer vision. A neuron in a multi-layer network needs to multiply each input by its weight, sum the results and perform an activation function. This paper is an extended version of the article in which we present an implementation of an amplifier-based MOS analog neuron and the optimization of the synaptic weights using in-loop circuit simulations. In addition to the base topology, we present two variations of the original conference paper topology to reduce area and power. MOS transistors operating in the triode region are used as variable resistors to convert the input and weight voltage to proportional input current. To test the analog neuron in full networks, an automatic generator is developed to produce a netlist based on the number of neurons on each layer, inputs, and weights. Simulation results using a CMOS 180 nm technology for all topologies demonstrate the neuron proper transfer function and its functionality while trained in test datasets.

In this paper, new Gm-C all-pass and amplitude-equalizer biquads are shown to be realized from a generalized Gm-C biquad filter structure by using Gm-simulated negative resistor in series with inte...

An ultrawideband absorptive common-mode filter (A-CMF) with a newly developed defected ground structure (DGS) is proposed in this article. The DGS miniaturized to a subwavelength size is able to totally suppress the common-mode noise while maintaining the signal integrity of the differential mode. In addition, the reflection and radiation of the common-mode noise are negligible in the stopband. For quick design, a simplified equivalent circuit model is also proposed. This model can be employed to estimate the resistances of the lumped resistors embedded in the DGS to obtain a very wide absorption band. In the demonstrated example, the fractional bandwidth determined by a 90% absorption efficiency can achieve as large as 104% around 3.55 GHz for an A-CMF realized on a simple two-layer printed circuit board. Such a widely absorptive bandwidth is never achieved before to our knowledge. The design methodology is validated by full-wave simulation. Finally, real measurement of the design is also carried out to confirm the design and analysis.

Clamp mode resistor capacitor diode (CMRCD) snubbers have a simple and easy implementing structure. They have been widely adopted in the pulsed power supplies to provide a safe operating condition for the series insulated gate bipolar transistors (IGBTs). The main problem of the CMRCD snubbers is their poor performance in the voltage balancing of the series IGBTs. They are essentially overvoltage protectors and clamp the voltage of the IGBTs in a probable potentially dangerous condition. This issue diminishes the expected lifetime of the series IGBTs, where a number of them face a higher level of the voltage than that of the others. The unbalanced voltage of the series IGBTs will result in a lower value of the expected lifetime of the series IGBTs. For improving the expected lifetime of the series IGBTs a CMRCD snubber with balanced voltage sharing for the series IGBTs is proposed. Adopting this proposal will lead to the balanced voltage sharing of the series IGBTs, even in the blocking voltage below the nominal designed value. Consequently, the highest value of the lifetime is estimated for the series IGBTs in the stack. The simulation and experimental results truly demonstrate the effectiveness of the proposed structure.

This article demonstrates the design of microstrip line symmetrical all-band absorptive bandpass filters (BPFs) with arbitrarily prescribed wideband flat group delay (GD) characteristics. The proposed BPFs consist of coupled line sections with series resistor connected stubs (short-circuited quarter-wavelength or open-circuited half-wavelength stubs). Analytical design equations are derived to obtain circuit parameters for arbitrarily prescribed flat GD characteristics. A detailed analysis shows that the absorptive sections (series resistor connected stubs) not only eliminate out-of-band reflections, but also determine the passband GD flatness characteristics. The proposed absorptive BPFs with arbitrarily prescribed flat GD can be easily extended to a higher order by cascading the first-order symmetrical quasi-absorptive BPF. For experimental validation, first- and second-order quasi-absorptive BPFs were designed with arbitrarily prescribed GD of 1.75 and 3.40 ns, respectively, and measurements were taken at a center frequency of 3.5 GHz. The results of the measurement are in good agreement with the predictions obtained through theoretical methods and simulation.

An equivalent method has been presented to analyze an $N$ -port network composed of transmission lines or coupled lines. Based on this method, a three-port coupled line with one-port short-circuited can be seemed equal to another three-port network without port coupling at the central frequency. A new Gysel out-of-phase power divider with output port spacing approaching 0 wavelength at the central frequency, arbitrary power dividing ratio, and arbitrary terminal real impedance has been proposed to reduce the size and output port spacing. A power divider with power dividing ratio $k^{2} = 3^{2}$ and a power divider with power dividing ratio $k^{2} = 1000$ have been implemented on printed circuit board (PCB). It can be observed that there is good agreement between the simulated and measured results.

Because of the different working principles between conventional flyback and active-clamped flyback (ACF), the existing primary-side regulation (PSR) technology cannot be applied to ACF. And in order to achieve PSR of ACF, a low-cost digital sampling method based on the auxiliary winding of the transformer is proposed. In the conventional peak current mode (PCM) controlled ACF, the sampling resistor of primary current may introduce additional power loss, and high-frequency oscillations during sampling may reduce system’s stability. Therefore, a digital feedback-feedforward control (FFC) method is proposed to eliminate the sampling resistor. The stability of the proposed control method and its influence on the dynamic response are studied. In addition, since GaN device has higher power loss during reverse conduction than its Si counterpart, design considerations of reverse conduction time of power switches are also discussed in this paper. All control methods and design considerations are verified on a GaN-based 12V-3A ACF, and the proposed control strategy is implemented by FPGA.

A primary-side regulation (PSR) scheme for LLC resonant converter with improved resonant current sampling circuit is presented in this letter. An RC branch together with the auxiliary winding of the transformer is added in parallel with the current sampling resistor. The transformer magnetizing current component in the sampled primary current waveform on the sampling resistor can be offset by the generated voltage waveform on the added capacitor of the RC branch. In this way, PSR control for LLC resonant converter can be realized. Detailed operation principle and deviation analysis on the proposed PSR scheme are presented. Furthermore, a deadtime compensation is introduced to improve the output current accuracy caused by the component tolerance. Finally, a 48–78 V/1.3 A half-bridge LLC prototype has been built up to verify the theoretical analysis.

Time-domain simulation of full-wave partial element equivalent circuit (PEEC) often encounters stability problems. In the past, various approaches have been proposed to determine the stability of a given model. Most of these methods, however, have low efficiency and scalability. In this article, we propose a highly efficient method to obtain a particular group of the poles of the model; such information then serves as a necessary-condition test for stability. Furthermore, the method is extended to include the effects of damping resistors. From the root locus plots of the poles, we clearly see the unstable poles moving left as damping is added in, and by the time they move into the left-half-plane, we can quantitatively determine the minimum damping level required to achieve a stable model. Simulation results are provided to verify the proposed method.

A polarization-insensitive broadband absorber with a notch band characteristic has been presented for radar cross section (RCS) reduction applications. The proposed design is a three-layered structure, consisting of metal-printed substrate layers separated by air spacers. The top layer is a resistor-loaded convoluted cross-dipole geometry that results in a wideband absorption. The band-notch response is achieved by careful design of a square loop in the middle layer, and the bottom layer is a complete metal ground. The overall structure exhibits two discrete absorption bands (having absorptivity above 90%) over the frequency ranges of 2.12 to 4.15 GHz and 6.08 to 9.58 GHz, whereas a reflective behavior is obtained from 4.3 to 5.65 GHz. The proposed geometry has several novel features, such as compact topology (with unit cell size of 0.137 λL, λL being the lowest operating wavelength), low profile, polarization-insensitivity, and wide operating bandwidth of 127.52%, unlike the existing band-notched absorbers. By deriving an equivalent circuit model and several parametric variations, the performance of the proposed absorber has been qualitatively analyzed. A sample prototype has also been fabricated and reasonable agreement among the circuit analysis, simulation response, and measured result is obtained under normal incidence.

A variable gain distributed amplifier (VGDA) for the Rx path of ultrawideband phased-array system is implemented in 90-nm CMOS process and presented in this letter. In order to achieve high gain and wideband with relative low dc power dissipation ( $P_{\mathrm {dc}}$ ), the combination of the conventional distributed amplifier (CDA) and the cascaded single-stage distributed amplifier (CSSDA) is utilized to the circuit. Moreover, the active variable termination resistor (AVTR) is adopted to adjust the flatness of gain. According to the experimental results, the proposed VGDA achieves a 21-dB peak gain with a 40-GHz 3-dB bandwidth (3.7–43.7 GHz), 18-dB gain control range (GCR), and 16° maximum phase variation.

A coupled-line based dual-band power divider using substrate integrated suspended line (SISL) for WLAN application is proposed in this brief. Two-section cascaded coupled line in each output path is used for dual-band response. One coupled line loaded at the input port is to improve the frequency selectivity. Two lumped resistors placed between two pairs of the two-section coupled line are used for isolation enhancement. Multi-layer SISL structure is introduced to realize tight broadside coupling, as well as for low loss, miniaturization and self-packaging. To further reduce the dielectric loss, the suspended substrate is cut out in specific pattern. The proposed dual-band power divider (DBPD) is analyzed using the even- /odd- mode method, the S-parameters are derived, and the design procedure is exhibited. For verification, a DBPD prototype working at 2.45 / 5.13 GHz is implemented. The measured results agree well with the simulated ones. The two passbands are from 1.7 GHz to 3.1 GHz and from 4.6 GHz to 5.5 GHz, with fractional bandwidth (FBW) of 58.3% and 17.8%, respectively. The measured return loss and isolation are both better than 15 dB in both passbands.

In this article, a simple and effective method based on the metamaterial concept is proposed to achieve very high isolation between the output ports of a millimeter-wave power divider (MWPD). The proposed MWPD is designed for use in 5G applications (28–32 GHz). In order to increase the isolation, three metamaterial rows are used, each row containing eight proposed unit cells. These metamaterial unit cells are loaded between two dielectric layers. By using this method and without isolating resistors, isolation is improved by more than 36 dB, as compared with a prototype power divider in which no metamaterial element was used. The maximum measured isolation is 43 dB at 30 GHz. The final dimensions of the proposed MWPD are $8 \times 8\,\,\times0.582$ mm3 or $0.9\,\,\lambda _{\mathbf {g}} \times 0.9\,\,\lambda _{\mathbf {g}} \times 0.08\,\,\lambda _{\mathbf {g}}$ where $\lambda _{\mathbf {g}}$ is the guided wavelength at 30 GHz. The simplicity of design, its compactness, and most importantly, high isolation between output ports without any lumped resistor are the key advantages of the proposed MWPD.

This article describes a modification and an experiment conducted on a solid-state pulsed power modulator (SSPPM) for medical linear particle accelerator (LINAC) applications. Depending on the operating condition of the magnetron, an existing design of an insulated-gate bipolar transistor (IGBT)-based modulator is modified, from a positive pulse generator to a negative pulse generator. The design of the gate driver circuit of the pulse discharging IGBTs is also slightly changed to secure reliability against the arc condition. The developed modulator has the following maximum output—pulse voltage of −40 kV, pulse current of −100 A, pulsewidth of 5 μ s, and pulse repetition rate of 250 Hz. By adapting the proposed design to the pulsed power modulator for driving the magnetron, high peak and average power densities of 43 kW/L and 48.9 W/L, respectively, can be achieved. The experimental results from various tests conducted using a resistor load, including a rated operation and an arc protection, verify the robustness and utility of the developed SSPPM for medical LINAC applications. An experiment using a 9.3-GHz 1.7-MW X-band magnetron is also conducted. The developed modulator achieved a successful arc protection operation for the arc generated in the waveguide during the magnetron drive test.

An automatic ice thickness measurement system was designed based on the temperature and thermal conductivity of air, ice and water. By studying the resistance temperature relationship of different types of platinum resistors, the platinum resistor (HM222) was selected with better performance, and a sensor was designed suitable for the temperature detection of the ice sheet profile. After calibration of platinum resistors, the accuracy of temperature measurement at 0.1°C was ensured within the range of −50°C to +20°C. The ice sheet was heated briefly by periodic self-heating units, and the interface was accurately judged according to the temperature rise difference caused by heating. Ultrasonic sensors were used to identify the ice sheet surface. In order to evaluate the performance of the system, an in-situ observation experiment was conducted in early January 2020 at the station of Yellow River’s Toudaoguai hydrological.

The hybrid ac–dc microgrid, consisting of ac subgrid and dc subgrid, is a promising structure to interconnect ac and dc systems to provide high quality and reliable electric energy. However, in single-phase microgrid or unbalanced three-phase microgrid, second-order ripples of the dc subgrid can lead to significant power quality issues. The ripple mitigation function can be added to existing bidirectional dc–dc converters (BDCs) or dc active power filters. Considering these ripple sources can be distributed in the dc subgrid, it is essential to develop ripple mitigation control schemes for distributed BDCs. In this article, a virtual resistor based ripple mitigation strategy is proposed. Autonomous accurate ripple current sharing can be achieved for BDCs installed closely, enabling flexible parallel of ripple mitigation converters. A comprehensive parameter design method is developed to ensure the accurate sharing for closely installed BDCs. For dc subgrid with significant line impedance, the control scheme provides the opportunity for supervisory control to further enhance ripple current sharing and mitigation performance. Both simulation and experimental results validate that the control method and the parameter design method are effective.

Analog integer order notch filters (IONF) are practically realised by using two or more capacitors. If the dissipation factor of capacitors (used in the IONF) increases then the overall order of the circuit reduces. Reduction in the order causes attenuation-loss at the notch frequency. Once the order reduces, the loss can only be compensated by reducing the quality factor of the IONF circuit, which is not desirable. This problem can be overcome by using a fractional order notch filter (FONF). The FONF circuit uses fractional order capacitors ( $Z=\frac {1}{Cs^\beta }$ ), which provides an extra degree of design freedom to control the order of the circuit, thereby helping in compensating the attenuation-loss. In this work, a new fractional order notch filter (FONF) has been proposed in which the attenuation-loss, due to change in the order of the system, can be compensated by tuning resistor/s of the proposed circuit.

In some conditions, the flux in the core of current transformers (CT) increases. If this increase in flux leads to saturation of the protective core, it can create a lot of problems in power system protection. One of the hardware solutions to prevent the occurrence of core saturation in CT is the fixed switched resistor demagnetization method. Due to disadvantages such as dependence on CT parameters and inefficiencies in severe core saturation, the use of this method has not been expanded. This paper proposes a new method to improve the fixed switched resistor demagnetization method. In the proposed method, instead of using a fixed resistor in the circuit topology, an adjustable resistor with an auxiliary transformer is used. In the previous method, the control process is based on flux estimation from the secondary terminal voltage. The control process in the proposed method is based on the second derivative of CT secondary current. To verify the effectiveness of the suggested method, first simulation is done using COMSOL and MATLAB softwares and then all necessary electronic and control circuitry are designed and built. Experimental test is carried out on a 20 kV- 500/5 A CT. The simulation and experimental results show that this method prevents the CT from saturation in case of short circuit faults. The main advantages of this method are independent to CT parameters and efficient in severe core saturation.

This letter proposes a frequency selective rasorber (FSR) with an anisotropic transmission band. At first, the analysis for realizing FSR with anisotropic transmission band based on an equivalent circuit model is demonstrated. Next, the FSR composed of a two-layered metallic structure with an air gap in the middle is proposed on account of the former analysis. At the top layer, a split circle resonator combined with a metallic strip loaded with resistors is adopted to realize the resistive sheet. At the bottom layer, a slot-type frequency selective surface with two kinds of slots is designed to match the passband of the resistive sheet. The full-wave simulation results show that the anisotropic transmission band with a low insertion loss under transverse electric (TE) and transverse magnetic (TM) polarization is realized. To verify the correctness of the analysis and simulation results, the proposed FSR is processed and measured. Good agreement between the simulation and measurement results is obtained.

This brief presents a low power low noise amplifier (LNA) in TSMC $0.18~{\mu }\text{m}$ CMOS technology for ultrasound imaging probes. The proposed LNA is based on a trans-impedance amplifier (TIA). Single-ended to differential conversion is realized using a common-gate and a common-source (CG-CS) based structure. Resistive feedback is exploited to provide a noise canceling scheme for the CS transistor. Unlike the conventional CG-CS structure that can only eliminate the noise of the CG transistor, the proposed structure eliminates the noise of both CG and CS transistors as well as the CG stage load resistor. Furthermore, by using negative feedback in the CG stage and current reuse technique in both stages, power consumption is reduced. Post-layout simulation results show a trans-impedance gain of 82 dB ${\Omega }$ with a −3 dB bandwidth of 77 MHz, while input impedance is $731~{\Omega }$ . The second harmonic distortion (HD2) is lower than −48.5 dB and the equivalent input referred noise is $1.95~{pA/\sqrt {Hz}}$ at 5 MHz. The circuit occupies an active area of $312~{\mu m^{2}}$ and consumes 47 $\boldsymbol {\mu }\text{W}$ from a 1.2 V supply.

In this work, we report a novel fully balanced drive and sense thermal-piezoresistive resonator (TPR) in 2P-4M $0.35~\mu \text{m}$ CMOS technology with maskless post-release process. Through the use of the Wheatstone bridge arrangement for both the thermal drive heater resistors and sense piezoresistors, the proposed design greatly simplifies the overall system by removing the need for bias-tee or noisy and power consuming current sink/source. This ensures that the differential terminals of drive and sense ports are at the same DC potential, thus allowing the use of standard differential amplifiers as interface circuits. In addition, this design utilizes bimorph like actuation which enables in-plane motion. An in-plane clamped-clamped beam (CCB) TPR was fabricated, demonstrating a quality factor ( ${Q}{)}$ of 1,600 at 2 MHz with transconductance ( ${g}_{m}{)}$ of $46.8~\mu \text{S}$ for a dc-power of 1.7 mW in a vacuum (1 mTorr). To go one step further, a double-ended tuning fork (DETF) TPR was designed, featuring a transconductance of 62.7 $\mu \text{S}$ with ${Q}$ of 4,400 at 1.9 MHz under the same conditions as CCB. The CCB thermal-piezoresistive oscillator (TPO) implemented using a discrete interface circuit had phase noise of −89 dBc/Hz and −100 dBc/Hz at 1 kHz and 1 MHz respectively while that for DETF TPO was −100 dBc/Hz at 1 kHz and −100 dBc/Hz at 1 MHz in air. Frequency stability was found to be 180 ppb and 125 ppb for CCB and DETF TPOs respectively in air.

A frequency-selective rasorber (FSR) with a high selectivity transmission passband and two absorption bands is proposed in this letter. The design method is introduced based on the equivalent circuit model (ECM). This structure consists of a lossy layer and a lossless layer. The lossy layer is composed of Jerusalem elements with a parallel resonance unit in center, and load with resistors on the metal branch. The lossless layer is integrated by a multilayer frequency selective surface to realize the high selectivity and wide transmission band. The surface current distributions and surface loss density were illustrated to explain the working principle. The simulated results show that the 1 dB transmission window is obtained from 7.9 to 9.0 GHz. The −10 dB absorption bands are over 3.3–7.1 GHz and 9.4–12.0 GHz. A prototype of the proposed FSR was fabricated and measured to verify our design; the measured results show a good agreement with simulated results.

The state of charge(SOC) of battery should be accurately estimated because it is used as basic data for various functions of the battery management(BMS) as well as the remaining battery capacity. Extended Kalman Filter(EKF) based on a battery model is widely used as a real-time SOC estimation technique. However, the parameters of battery model are slightly different for each SOC section and changed by C-rate. As a result, if the battery parameters are used a fixed value, the accuracy of SOC estimation using EKF is decreased. In this paper, to improve the accuracy of the SOC estimation using EKF, the changes in battery parameters according to C-rate were analyzed for five SOC sections. Also, the accuracy of the SOC estimation according to the number of SOC sections was calculated by simulation. Experimental results show that the battery parameters reduce as C-rate increases. In addition, as the SOC decreased, the internal resistor Ri and loss resistor Rd increased, but the double layer capacitor Cd decreased. Therefore, in order to increase the accuracy of SOC estimation using EKF, it is necessary to reflect the changes in battery parameters in each SOC section according to the C-rage. This was verified by simulation.

A broadband-slotted ring/lumped resistor-based metamaterial absorber (MA) is presented in this study for K-u-band microwave applications. Numerical results of the MA indicate that it can achieve a broadband absorption ratio of more than 85% in the frequency range of 12.4-17.6 GHz and has active polarization insensitivity and wide incidence-angle response over the entire operation band between 12.4-17.6 GHz. The designed MA is ultrathin around lambda/14.7 in terms of wavelength at its lowest operation frequency, corresponding to 1.7 mm. The proposed unit-cell structure of the MA is novel, consisting of a slotted ring with eight symmetrically-located lumped resistors, FR-4 material, and a metallic ground, which is compatible with low-cost PCB fabrication; therefore, the MA is suitable for practical microwave applications in the K-u-band.

Spread spectrum time domain reflectometry (SSTDR) has been traditionally used to detect hard faults (open and short circuit faults) in transmission lines. Prior work has focused on loads at the end of the line with little research on impedances from circuit elements located in the middle of the line (i.e., not at the load) or on only one wire of the line. In this work we consider cases of transmission lines with different impedances on each wire. We refer to lines with the same impedance on both wires (positive and negative) as symmetric. Lines with different impedances on each wire are asymmetric. For highly localized impedances (approximately infinitesimal in length, i.e. with a length significantly smaller than the wavelength of the incident signal), the reflections and their effects on the propagating wave become difficult to describe with traditional transmission line theory. We provide analytical expressions for reflection coefficients for symmetric and asymmetric transmission lines and show that these formulae describe experimental measurements of capacitors and resistors to about 99% accuracy for the magnitudes and 75% for the phases.

In this study, we developed an odor sensor system using chemosensitive resistors, which outputted multichannel data. Mixtures of gas chromatography stationary materials (GC materials) and carbon black were used as the chemosensitive resistors. The interaction between the chemosensitive resistors and gas species shifted the electrical resistance of the resistors. Sixteen different chemosensitive resistors were fabricated on an odor sensor chip. In addition, a compact measurement instrument was fabricated. Sixteen channel data were obtained from the measurements of gas species using the instrument. The data were analyzed using machine learning algorithms available on Weka software. As a result, the sensor system successfully identified alcoholic beverages. Finally, we demonstrated the classification of restroom odor in a field test. The classification was successful with an accuracy of 97.9%.

In this paper presents comparative metrological analysis of two options for connecting Pt100 resistive temperature sensors to high-precision analog-to-digital converters is carried out: a proportional circuit in which the reference resistor serves to form the reference voltage, and a canonical 4-wire circuit where the resistance of the reference resistor is measured in the same way as the resistance of the temperature sensor are presented. It is shown that the error of the one-stroke proportional circuit is determined by the long-term instability of the gain, while the resulting error of the push-pull canonical circuit is determined by the short-term instability of several elements. The insignificant advantage of the canonical circuit with the accuracy of conversion and in the absence of additional requirements for the input of the reference voltage is affirmed, which gives recommendations for the practical application of the circuits considered in meters of temperature. References 10, figures 2, table 1.

The paper deals with the study of the resistance of incandescent light bulbs. It has been established that the temperature dependence of resistance for these types of lamps always manifests itself in school experiments. Therefore, students in specialized school should be taught a systematic comparison of resistance in resistors and lamps in circuits in term of didactic principles and be given a detailed explanation of the different factors that occurred in lamp circuits and were mistakenly understood as equipment errors.

A microcontroller-based prototype of an automatic solar tracking system is proposed in this paper. Light-dependent resistors are used in this solar tracker. By using this system we can automatically rotate the solar panel according to the movement of the sun. The objective of this work is to always get the maximum intensity of sunlight. In this paper, A small prototype of the solar tracking system is described to implement the design. It has a low cost and great efficiency.

This paper presents an ultra-wideband (UWB) low-noise amplifier (LNA) with extremely flat-high-gain and low-noise figure (NF). In traditional resistive feedback topology, input matching, gain, and NF cannot be balanced. For better performance trade-offs in UWB design, a novel emitter-follower resistive feedback (EFRFB) is introduced, which utilizes a common-collector amplifier followed by a feedback resistor to flatten the gain (the ripple reduced by 2.3 dB) while alleviating the constraints between the gain and input matching. The enhanced gain without restraint by S11 is exactly required for noise reduction technology. Moreover, a peaking inductor and two resistors are adopted to improve bandwidth and output matching, respectively. The proposed LNA is implemented in a 0.18-μm SiGe BiCMOS technology and occupies 0.15 mm2 without pads. Measurements demonstrate that the LNA has a gain of 19.5 dB with ripple

Four new circuits of fully uncoupled quadrature sinusoidal oscillators, using two current differencing buffered amplifiers (CDBAs), four/five resistors and two capacitors have been presented. In contrast to all previously published CDBA-based, fully decoupled, quadrature sinusoidal oscillators in which one of the input terminals is left unutilized, the presented circuits are realized by utilizing the intrinsic current differencing property of CDBAs, thus utilizing all the four terminals of the CDBA. All these quadrature oscillator (QO) circuits have an inherent feature of amplitude control of output voltages without using external control circuitry. Out of the four proposed QO circuits, two circuits have the additional feature of generating low-frequency oscillations, thus making them capable of generating wide range of frequency waveforms. The proposed oscillator circuits also possess additional functionalities not available in other CDBA-based quadrature sinusoidal oscillator circuits presented previously. The workability of the proposed circuits has been confirmed through experimental results where CDBAs are implemented using commercially available current feedback operational amplifiers (AD844).

Traditional acoustic liners used in nacelles and fan ducts include a perforated face sheet bonded to a honeycomb core. A tunable acoustic liner with a piezoelectric substrate is developed to overcome the shortages of current liner such as unchangeable structure and uncontrollable bandwidth. After the piezoelectric panel deformed under the driving voltage, the resonant chamber changed, and the resonant frequency shifts. The finite element method is used to calculate the acoustic system’s resonant frequency and sound pressure distribution. The transmission loss measurement was carried out in an impedance tube to demonstrate the broadband noise control effect of the liner. The experiment result indicates that the TL peak frequency keeps linear with the driving voltage, and the sensitivity is measured to be 0.1 Hz/V. A DC amplified circuit using photo resistor is designed based on constructing the function of driving voltage and noise frequency. Benefit from the adaptive algorithm, when the noise frequency offsets from 756 to 788 Hz, the driving voltage can be automatically regulated from 110 to 420 V, and the liner always keeps resonating. Meanwhile, the sound level was reduced. The adaptive noise control is realized for broadband noise reduction.

This article is devoted to a new circuit proposal for precision rectification, which is designed using current feedback operational amplifiers. The new proposed circuit operation is clearly discuss...

Cell balancing is a vital function of battery management system (BMS), which is implemented to extend the battery run time and service life. Various cell balancing techniques are being focused due to the growing requirements of larger and superior performance battery packs. The passive balancing approach is the most popular because of its low cost and easy implementation. As the balancing energy is dissipated as heat by the balancing resistors, an appropriate thermal scheme of the balancing system is necessary, to keep the BMS board temperature under a tolerable limit. In this paper, optimum selection of balancing resistor with respect to degree of cell imbalance, balancing time, C- rate, and temperature rise using machine learning (ML) based balancing control algorithm is proposed to improve the balancing time and optimal power loss management. Variable resistors are utilised in the passive balancing system, in order to optimize the power loss and to obtain optimal thermal characterization. The performance of the proposed system is evaluated using back propagation neural network (BPNN), radial basis neural network (RBNN), and long short term memory (LSTM). Error analysis of the balancing system is done to optimize balancing parameters and the proposed algorithms are compared using performance indices such as mean square error (MSE), root mean square error (RMSE), and mean absolute error (MAE) to validate the balancing model performance. The possible optimization scope for implementing passive balancing using machine learning algorithms are experimented in the Matlab-Simscape environment.

When armature passes through the central plane of a driving coil in the process of reluctance coil launching, the magnetic force will reverse and slow down the armature speed. To overcome this problem, the principle of reluctance coil launcher is analyzed. Meanwhile, this paper establishes a finite element analysis model to calculate the electromagnetic force, velocity, displacement and other parameters of the armature while the reluctance coil launcher works. Based on the simulation results, dynamic characteristics of the reluctance coil launcher are summarized and two methods for reverse force suppression are discussed. Furthermore, an experiment system is established and some experiments are carried out. This research concludes that resistor consumption method can effectively restrain the generation of reverse force, with no obvious bad impact on other performance, which provides a practical approach to achieving higher speed and efficiency for reluctance electromagnetic launcher.

Fast switching characteristic of wide bandgap devices enables high switching frequency of power devices and thereby, can facilitate high fundamental frequency operation of electrical machines. However, with the switching transition times in orders of tens of nanoseconds, the high dv/dt is observed across the switching device. The high dv/dt experienced by the switches, and consequently by the machine, can degrade winding insulations or bearings over a period of time. Therefore, it is imperative to maintain the dv/dt below recommended values depending on the machine insulation. The dv/dt across the devices can be adjusted by varying the gate resistance. A high value of gate resistance, however, introduces additional switching losses on the device. Using different dv/dt filtering techniques can also help to control the dv/dt on the machine terminals. These techniques do not increase the switching losses on the device. However, it introduces additional losses in the filter resistors and also increases the cost of the system. In this paper, an analysis based on the impact of gate resistance on the dv/dt across the machine, and the corresponding losses is carried out. An analytical dv/dt filter design strategy is proposed to limit the dv/dt to a particular value. With the proposed design scheme, the value of each filter component can be easily obtained, and filter losses can be estimated accurately. Lastly, a comparison is performed on the basis of efficiency between these two techniques.

In combination with an analogous circuit pattern, the electrochemical impedance (EIS) spectra aids in examining the physical origin of the different electrical components involved in the device. In this research, to illustrate the various physical processes taking place in energy-storing electrodes, the EIS spectra in the entire frequency area is divided into specific electrical elements such as resistors and capacitors with the help of Z view software and determined origin of their charge storage properties. The EIS spectra of activated carbon (AC) – TiO2 or MnO2 composites containing TiO2 in the range 5 – 20 wt% and nominal composition of MnO2 (5 wt% MnO2) are analyzed using the equivalent circuit fitting technique and the corresponding electrode parameters and performances are correlated.