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Optimized Field Programmable Gate Array (FPGA) implementation of Cellular Automata (CA) for high speed design requires knowledge of the platform specific logic cell architecture. In this paper, we have proposed architectures and design automation of a particular class of CA, essentially a Finite State Machine (FSM), which obey rules governed by principles of Margolus neighborhood. Under this proposition, the inputs to the next state function of the FSM for every CA cell alternates between two sets of data in every successive clock cycle. Careful choice of logic elements and their compact placement was ensured for speed-area efficient implementation. Variants of scan insertion were carried out for fault localization by properly utilizing the logic cells realizing the original Margolus CA, so that area-delay overhead is minimized. We outperform behavioral or register transfer level (RTL) based descriptions for CA implementations, expressed through conventional higher levels of abstraction, with respect to delay and occupancy count of logic slices. • Speed-area efficient architectures for 2D Margolus neighborhood based CA are proposed. • Placement directives are issued to ensure physical adjacency among neighboring cells. • Scan architectures for seeding and testability were integrated without overhead. • The synthesizable hardware descriptions were generated through design automation. • Proposed CA architectures outperform behavioral implementations in speed and area. [ABSTRACT FROM AUTHOR]

We present a simulation method of pursuit‐evasion behaviors between different herds with runtime situational awareness. We model the collective movement of predators and prey in the hunting process based on an improved Boid model and the finite state machine involving multiple perception factors about the situations. Taking wolves hunting caribous as an example, our method not only simulates the collective behavior, but also realizes individual intelligent behaviors consistent with the observations. We conducted intensive experiments, and the results show that our method can simulate more realistic pursuit‐evasion behavior under different testing scenarios with a variety of parameters. Our method can be easily transferred to the theoretical study of collective behaviors of other herds. [ABSTRACT FROM AUTHOR]

Hardware Trojans refer to additional logic maliciously implanted by attackers in integrated circuits (ICs). Because of the potential security threat of hardware Trojans, they have attracted extensive attention to security issues. As a formal verification method, property checking has been proved to be a powerful solution for hardware Trojan detection. However, existing property-checking methods are limited by the unity of security properties and the model explosion problem of formal models. The limitations above hinder the practical applications of these methods. To alleviate these challenges, we propose an effective property-checking method for hardware Trojan detection. Specifically, we establish the formal model based on the principle of finite state machine (FSM), and the method can alleviate the model explosion problem. For property writing, we extract the core behavior characteristics of hardware Trojans and then generate properties for the verification of certain types of hardware Trojans. Experimental results demonstrate that our approach is applicable to detect information leakage and denial of service (DoS) hardware Trojans by verifying security properties. [ABSTRACT FROM AUTHOR]

Abstract Distinguishing sequences are widely used in finite state machine-based conformance testing to solve the state identification problem. In this paper, we address the scalability issue encountered while deriving distinguishing sequences from complete observable nondeterministic finite state machines by introducing a massively parallel MapReduce version of the well-known Exact Algorithm. To the best of our knowledge, this is the first study to tackle this task using the MapReduce approach. First, we give a concise overview of the well-known Exact Algorithm for deriving distinguishing sequences from nondeterministic finite state machines. Second, we propose a parallel algorithm for this problem using the MapReduce approach and analyze its communication cost using Afrati et al. model. Furthermore, we conduct a variety of intensive and comparative experiments on a wide range of finite state machine classes to demonstrate that our proposed solution is efficient and scalable.

Abstract In most of the real time video processing applications, cameras are used to capture live video with embedded systems/Field Programmable Gate Arrays (FPGAs) to process and convert it into the suitable format supported by display devices. In such cases, the interface between the camera and display device plays a vital role with respect to the quality of the captured and displayed video, respectively. In this paper, we propose an efficient FPGA‐based low cost Complementary Metal Oxide Semiconductor (CMOS) camera interfacing architecture for live video streaming and processing applications. The novelty of our work is the design of optimised architectures for Controllers, Converters, and several interfacing blocks to extract and process the video frames in real time efficiently. The flexibility of parallelism has been exploited in the design for Image Capture and Video Graphics Array (VGA) Generator blocks. The Display Data Channel Conversion block required for VGA to High Definition Multimedia Interface Conversion has been modified to suit our objective by using optimised Finite State Machine and Transition Minimiszed Differential Signalling Encoder through the use of simple logic architectures, respectively. The hardware utilization of the entire architecture is compared with the existing one which shows that the proposed architecture requires nearly 44% less hardware resources than the existing one.

Abstract Recently, the finite state machine (FSM)‐based digital controllers are susceptible to fault‐injection and side‐channel attacks, which makes FSM security a more prominent factor. FSM optimality is another crucial element when designed. A state encoding approach is applied for FSM security and optimization. This article proposes the security‐dominated FSM state assignment technique (SD‐SHO), which obtains a satisfactory level of FSM optimization as well. It is a deterministic algorithm and consists of two key techniques, such as state assignment using an improved quadratic sum code, and state assignment using a gradient‐based interior point method. A fuzzy bi‐level programming logic is introduced in the proposed approach for regulating the constituting algorithms optimally. Experiments are conducted to evaluate the FSM security and optimality using the MCNC FSM benchmarks. Results indicate a substantial reduction in the error masking probability using SD‐SHO. It also demonstrates that SD‐SHO achieves a satisfactory level of area and power reduction compared with other existing works.

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Approximate bisimulations for fuzzy automata have recently drawn attention of researches, since they allow to correlate different fuzzy automata which behave equivalently only to the chosen degree. This is of a particular interest in the state reduction of fuzzy automata, since it allows us to find a fuzzy automaton with a much smaller number of states and a slightly different behaviour from the original fuzzy automaton. The contribution of this paper is twofold. First, we study special types of approximate bisimulations which allow us to correlate all elements from both sets of states of two fuzzy automata. We show their properties, and particularly that they induce the so-called approximate isomorphism between the corresponding factor fuzzy automata. We pay a special attention to similarities and differences between homotypic and heterotypic approximate bisimulations. Second, we provide an efficient algorithm with the complexity O ((m + n) n) for computing the greatest λ -approximate bisimulation between two finite fuzzy automata over the Gödel structure (if it exists), where λ is the threshold for approximation, n is the number of states and m is the number of non-zero transitions of the automata. This algorithm gives a great reduction of complexity when compared to the previously developed one, which has the complexity O (m n 5). We also design an algorithm with the complexity O ((m + n) n) for computing the greatest λ ∈ [ 0 , 1 ] such that there exists a λ -approximate bisimulation between two given finite fuzzy automata over the Gödel structure. [ABSTRACT FROM AUTHOR]

A two dimensional string is called a picture and is defined as a rectangular array of symbols taken from a finite alphabet. A two dimensional language or a picture language is a set of pictures. In this paper, a theoretical study is reported for two dimensional fuzzy regular languages generated by two dimensional fuzzy regular grammars and the two dimensional fuzzy finite state automata for the two dimensional fuzzy regular languages. We can construct the two dimensional fuzzy finite state automaton from the given two dimensional fuzzy regular grammar and vice versa. Further, we discuss some of the closure properties of two dimensional fuzzy regular languages with examples. We discuss the applications of two dimensional fuzzy regular language with respect to kolam patterns. [ABSTRACT FROM AUTHOR]

The preservation of the efficient functionality of a pressurized reactor unit in the presence of faults is the aim of the present paper. To satisfy this aim, a distributed supervisory control scheme, considering the possibility of system faults, was designed. Towards this aim, the models of the subsystems of the total pressurized reactor unit in the presence of sensor and actuator faults are developed, using finite deterministic automata. This is the first contribution of the paper. The desired performance of the unit was formulated in the form of rules guaranteeing the desired behavior of a pressurize–depressurize cycle and safety specifications. The rules were translated to six desired regular languages. The realization of these languages, in the form of supervisor automata, was accomplished. This is the second contribution of the paper. A modular supervisory design scheme, towards safety and tolerance in the presence of faults, was proposed and realized, and the properties of the proposed supervisors and the controlled automaton were proven. This is the third contribution of the paper. The complexity of each supervisor was computed. The efficiency of the supervisory design scheme was illustrated through simulations. A PLC implementation of the derived supervisors was proposed. The derived supervisors are suitable for implementation as function blocks. [ABSTRACT FROM AUTHOR]

Different strategies for the combination of merging and splitting transformation procedures for incompletely specified finite state machines implemented on field-programmable logic devices are offered. In these methods, such optimization criteria as the speed of operation, power consumption and implementation cost are considered already in the early phase of finite state machine synthesis. The methods also take into account the technological features of programmable logic devices and the state assignment method. The transformation quality ratio is calculated on the base of estimations of consumed power, critical path delay and number of utilized logic cells. The user is also able to choose the order of merging and splitting procedures and the direction of the optimization by setting weights for each criterion. The methods of the estimation of optimization criteria values are described, and the experimental results are also discussed. [ABSTRACT FROM AUTHOR]

Traditionally, finite automata theory has been used as a framework for the representation of possibly infinite sets of strings. In this work, we introduce the notion of second-order finite automata, a formalism that combines finite automata with ordered decision diagrams, with the aim of representing possibly infinite sets of sets of strings. Our main result states that second-order finite automata can be canonized with respect to the second-order languages they represent. Using this canonization result, we show that sets of sets of strings represented by second-order finite automata are closed under the usual Boolean operations, such as union, intersection, difference and even under a suitable notion of complementation. Additionally, emptiness of intersection and inclusion are decidable. We provide two algorithmic applications for second-order automata. First, we show that several width/size minimization problems for deterministic and nondeterministic ODDs are solvable in fixed-parameter tractable time when parameterized by the width of the input ODD. In particular, our results imply FPT algorithms for corresponding width/size minimization problems for ordered binary decision diagrams (OBDDs) with a fixed variable ordering. Previously, only algorithms that take exponential time in the size of the input OBDD were known for width minimization, even for OBDDs of constant width. Second, we show that for each k and w one can count the number of distinct functions computable by ODDs of width at most w and length k in time h(|Σ|,w) ⋅ kO(1), for a suitable h : ℕ × ℕ → ℕ . This improves exponentially on the time necessary to explicitly enumerate all such functions, which is exponential in both the width parameter w and in the length k of the ODDs. [ABSTRACT FROM AUTHOR]

This article addresses the concurrency issues affecting behavior trees (BTs), a popular tool to model the behaviors of autonomous agents in the video game and the robotics industry. BT designers can easily build complex behaviors composing simpler ones, which represents a key advantage of BTs. The parallel composition of BTs expresses a way to combine concurrent behaviors that has high potential, since composing pre-existing BTs in parallel results easier than composing in parallel classical control architectures, as finite state machines or teleo-reactive programs. However, BT designers rarely use such composition due to the underlying concurrency problems similar to the ones faced in concurrent programming. As a result, the parallel composition, despite its potential, finds application only in the composition of simple behaviors or where the designer can guarantee the absence of conflicts by design. In this article, we define two new BT nodes to tackle the concurrency problems in BTs and we show how to exploit them to create predictable behaviors. In addition, we introduce measures to assess execution performance and show how different design choices affect them. We validate our approach in both simulations and the real world. Simulated experiments provide statistically significant data, whereas real-world experiments show the applicability of our method on real robots. We provided an open-source implementation of the novel BT formulation and published all the source code to reproduce the numerical examples and experiments. [ABSTRACT FROM AUTHOR]

We consider the computability and complexity of decision questions for Probabilistic Finite Automata (PFA) with sub-exponential ambiguity. We show that the emptiness problem for strict and non-strict cut-points of polynomially ambiguous commutative PFA remains undecidable, implying that the problem is undecidable when inputs are from a letter monotonic language. We show that the problem remains undecidable over a binary input alphabet when the input word is over a bounded language, in the noncommutative case. In doing so, we introduce a new technique based upon the Turakainen construction of a PFA from a Weighted Finite Automaton which can be used to generate PFA of lower dimensions and of sub-exponential ambiguity. We also study freeness/injectivity problems for polynomially ambiguous PFA and study the border of decidability and tractability for various cases. [ABSTRACT FROM AUTHOR]

Summary: The Internet of Vehicle (IoV) is known as a kind of highly dynamic network, in which the vehicle needs to exchange information with the fixed Roadside Unit (RSU) or other moving vehicles frequently. In order to improve the performance of existing RSU access schemes, in this paper, we proposed a BUS‐aided RSU connection scheme based on the software‐defined networking (SDN) and evolutionary game theory, in which the costs during multiple‐user access and following RSU handoff are considered. At first, we constructed a SDN‐IoV architecture and showed the benefits by introducing SDN into IoV. After that, we modified the original OpenFlow protocol stack in order to apply it to the wireless vehicular networks. Next, to explore more accessing opportunities in moving cases, the BUS was further introduced as a mobile RSU. With these fixed and mobile RSUs, an evolutionary game is then envisioned to model the multiple‐user access process with the aim to maximize the rewards of all participants. To make our proposed protocol practical, we also illustrated the implementation procedure of our protocol on the OPNET platform and gave out the finite state machine (FSM) of major routines. Numerical results showed that our proposed scheme could outperform the schemes without BUS, SDN, and game theory enabled, in terms of RSU load ratio, throughput, and handoff times. [ABSTRACT FROM AUTHOR]

We approach the task of computing a carefully synchronizing word of minimum length for a given partial deterministic automaton, encoding the problem as an instance of SAT and invoking a SAT solver. Our experiments demonstrate that this approach gives satisfactory results for automata with up to 100 states even if very modest computational resources are used. We compare our results with the ones obtained by the first author for exact synchronization, which is another version of synchronization studied in the literature, and draw some theoretical conclusions. [ABSTRACT FROM AUTHOR]

To better recycle the regenerative braking energy (RBE) and improve the power quality (PQ) in asymmetric AC-fed railways, a novel multiplex back-to-back energy storage system (MB2ESS) with fault-tolerance ability is proposed, where individual subsystems not only independently operate as self-controlled entities, but also collaborate with adjacent subsystems to resist system disturbances and local faults. On this basis, a hierarchical optimization control method with three-layer structure is designed for the flexible and effective operation of MB2ESS, including the global optimization layer based on finite state machine, the regional decision-making layer with event-driven distributed coordination controller, and the local execution layer via multi-converter autonomous control. It can be used to seamlessly switch different operation modes, coordinately manage the multidirectional transmission of RBE, dynamically control PQ optimization compensation, and rapidly perform fault response behaviors. Subsequently, through typical scenarios, comparative study, and field case of a traction substation in Beijing-Shanghai Railway, the feasibility and effectiveness of proposed scheme are verified. The engineering capability assessment results also show that this scheme can effectively make up for the structure and function deficiencies of conventional railway energy storage systems, which has well adaptability and application potential. [ABSTRACT FROM AUTHOR]

Many links and complex cooperative operations have posed a great challenge to the autonomous harvesting between rice harvester and transfer vehicle. In this study, a cooperative operation strategy was designed for the autonomous rice harvester and transfer vehicle using Finite State Machine (FSM). The cooperative mode was then divided into four links: independent harvesting, waiting for calls, cooperative truck unloading grain, and transportation. An FSM model was also established to construct the basic components of a collaborative harvesting state machine. After that, the state information matrix was defined to design the specific flow of basic action execution, including the harvester starts harvesting, stops harvesting, starts unloading grain and stops unloading grain. The transfer vehicle was then driven at the waiting point to cooperate with the alignment, then to start or stop grain unloading. As such, the state transition chain of collaborative work was constructed to clarify the transition relationship and trigger conditions between the states in the process of collaboration. The cooperative control logic framework involved the harvester and transfer vehicle, according to the state transition chain architecture. Stateflow tool was selected to simulate and verify the compiled logic framework in the MATLAB platform. The sequential execution was also simplified to introduce the timing and signal transmission delay of internal execution. The simulation results show that the states of the harvester and transfer vehicles were transferred orderly, particularly with the correct conversion of the trigger signal. The test results also show that the control logic strategy performed better for cooperative harvesting. A crawler-type rice collaborative harvesting system was constructed to verify the actual operating performance of the logic strategy, including the crawler rice harvester (Weichai Lovol Heavy Industry RG70V4G-014) and crawler rice transfer vehicle (Weichai Lovol Heavy Industry RG70V4G-015). Among them, the two intelligent agricultural machines adopted the fully electronically controlled chassis with the wire-controlled clutch, header, grain cylinder, and crawler driving system. The dual antenna BDS positioning system (Sina K726) was also equipped, where the data transfer unit (USR-G781) was used in the communication between two computers in the fixed-point cooperative experiment of rice harvesting. The 4/5 G Data Transfer Unit (DTU) with human cloud was adopted at the same time. The autonomous control module was communicated with the control terminal through RS-232. A Self-control terminal (eAgri-800-RS) was installed in the two computers for the harvesting self-control, which communicated with the chassis Electronic Control Unit of the two computers through CAN bus. The software system was developed by Keil uVision 5. The linear path tracking was adopted to follow the model control in the navigation system. The two-computer alignment control was adopted to deal with the position error PID. The collaborative system test was carried out in the Zengcheng Experimental Base of South China Agricultural University. The harvester and transfer vehicle were designed to independently work in the field from the hangar of the base. Specifically, the harvesting speed and width were set at 0.8 m/s, and 1.9 m, respectively. The continuous cooperative working time was not less than 120 min. About 0.7 hm² of rice were automatically harvested by the ferrule path. Six operations of the automatic cooperative transfer system were carried out to transfer the grain to the truck during this period. The transfer truck waited on the tractor road, and then transferred the harvested grain to the roadside truck, according to the designed fixed-point cooperative operation strategy. The harvester and transfer vehicle returned to the hangar in sequence after harvesting the whole farmland. The harvest and transportation path were also designed in the test plan. Among them, the specific harvesting path was designed to cover the field, where the outer ring was harvested first and then parallel rings, according to the size of the field. The cooperative path was selected on the short-side tractor road. A balance was obtained on the short-side straight-line paths of the harvesting operation. The transfer vehicles only needed to plan a reusable path. The grain alignment transfer work was completed to advance or reverse this path in the whole field. The specific transfer points were calculated from the coordinates issued by the harvester, all of which were located on this path. Consequently, the fixed-point cooperative operation was also realized using the autonomous harvester and the transfer vehicle, according to the predetermined path. The logic signals were successively recorded to normally trigger during network communication under the predetermined logic framework in the test. The whole cooperative process was aligned accurately to successfully complete the fixed-point cooperative harvesting operation and return to the hangar. Therefore, the cooperative operation strategy of double machines for rice harvesting was effective and reliable under the configuration, and the harvesting efficiency was 0.35 hm² /h. The finding can also provide strong support for the cooperative operation of autonomous full coverage harvesting in rectangular rice regions. [ABSTRACT FROM AUTHOR]

Human activity intention is indispensable for wearable powered lower extremity exoskeleton such that ensuring the compliant control of the robot. Lots of researches have been done on gait phase detection, which served as a sub-module of locomotion mode recognition to support the follow-on task. Therefore, it is self-evident that locomotion mode recognition is of great importance. Many model-based recognition methods are usually applied in manual extraction of cumbersome features, such as the traditional neural network (NN), support vector machine (SVM), etc. In contrast, the feature mapping layer coming with the convolutional neural network (CNN) can effectively solve the above time-consuming problem. Given that the training of NN is prone to overfitting, SVM with optimal characteristics is considered. A hybrid CNN–SVM model is proposed to identify human locomotion modes by collecting multi-channel inertial measurement unit (IMU) signals and is integrated with the error correction function of the finite state machine (FSM). Therefore, the CNN–SVM model has great influence on the generalization performance and recognition accuracy. The recognition rates of five single locomotion modes and eight mixed locomotion modes reach 97.91% and 98.93%, respectively. The system meets the demand of real-time performance, and the recognition time exceeds 370 ms on heel strike. [ABSTRACT FROM AUTHOR]

Tsetlin machines (TMs) are a pattern recognition approach that uses finite state machines for learning and propositional logic to represent patterns. In addition to being natively interpretable, they have provided competitive accuracy for various tasks. In this paper, we increase the computing power of TMs by proposing a first-order logic-based framework with Herbrand semantics. The resulting TM is relational and can take advantage of logical structures appearing in natural language, to learn rules that represent how actions and consequences are related in the real world. The outcome is a logic program of Horn clauses, bringing in a structured view of unstructured data. In closed-domain question-answering, the first-order representation produces 10 × more compact KBs, along with an increase in answering accuracy from 94.83% to 99.48%. The approach is further robust towards erroneous, missing, and superfluous information, distilling the aspects of a text that are important for real-world understanding [ABSTRACT FROM AUTHOR]

Copyright of Frontiers of Information Technology & Electronic Engineering is the property of Springer Nature and its content may not be copied or emailed to multiple sites or posted to a listserv without the copyright holder's express written permission. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)

Modern enterprise applications integrate multiple interdependent software components, whose management must be suitably coordinated. This must be done by taking into account all inter-component dependencies, the faults potentially affecting them, and the fact that each component can be horizontally scaled, i.e., that multiple instances of each component can be spawned or destroyed, depending on application needs. In this article, we introduce a novel solution for suitably modelling and analysing the replica- and fault-aware management of multi-component applications, based on topology graphs and management protocols. More precisely, we first introduce a compositional model of the management behaviour of the (possibly multiple) instances of the components forming an application, faults included. We then show how this model enables automating various useful analyses, from checking the validity of management plans to automatically determining management plans allowing the instance of an application to reach and maintain a desired target configuration. [ABSTRACT FROM AUTHOR]

Finite State Machine is a popular modeling notation for various systems, especially software and electronic. Test paths (TPs) can be automatically generated from the system model to test such systems using a suitable algorithm. This paper presents a strategy that generates TPs and allows to start and end TPs only in defined states of the finite state machine. The strategy also simultaneously supports generating TPs only of length in a given range. For this purpose, alternative system models, test coverage criteria, and a set of algorithms are developed. The strategy is compared with the best alternative based on the reduction of the test set generated by the established N-switch coverage approach on a mix of 171 industrial and artificially generated problem instances. The proposed strategy outperforms the compared variant in a smaller number of TP steps. The extent varies with the used test coverage criterion and preferred TP length range from none to two and half fold difference. Moreover, the proposed technique detected up to 30% more simple artificial defects inserted into experimental SUT models per one test step than the compared alternative technique. The proposed strategy is well applicable in situations where a possible TP starts and ends in a state machine needs to be reflected and, concurrently, the length of the TPs has to be in a defined range. [ABSTRACT FROM AUTHOR]

Multi-energy systems are under exploration for a variety of benefits that can provide multi-energy demands with combined electricity, heat and gas, the most widespread energy demands, to end-users. To satisfy such requirements, this paper integrates a multi-carrier energy system (MCES), including electricity, heat and hydrogen with the cyber-physical system (CPS) model to establish a novel energy CPS. Firstly, the finite state machine (FSM) and the time series method are used to establish a unified CPS architecture of energy nodes. Simultaneously, the embedded architecture of the dual digital signal processor (DSP) system at the energy node level is proposed to implement external control and internal self-control for the energy CPS. Secondly, the CPS modeling method in MCES is conducted by analyzing multi-class energy nodes including energy source nodes, energy conversion nodes, energy storage nodes and energy end-user nodes. Subsequently, the physical system, information system and control system of a reversible solid oxide fuel cell (RSOFC) node and the dynamic operation of MCES are analyzed and simulated by introducing the CPS model, where the controllability and interactivity of the designed energy CPS model are further demonstrated. • An embedded architecture of a dual DSP system at the energy node is proposed. • The finite state machine and time series method are established. • An energy node of an RSOFC and an MCES based on the CPS model is investigated. [ABSTRACT FROM AUTHOR]

The Nottingham group at 2 is the group of (formal) power series t + a 2 t 2 + a 3 t 3 + ⋯ in the variable t with coefficients a i from the field with two elements, where the group operation is given by composition of power series. The depth of such a series is the largest d ⩾ 1 for which a 2 = ... = a d = 0. Only a handful of power series of finite order (forcedly a power of 2) are explicitly known through a formula for their coefficients. We argue in this paper that it is advantageous to describe such series in closed computational form through automata, based on effective versions of proofs of Christol's theorem identifying algebraic and automatic series. Up to conjugation, there are only finitely many series σ of order 2 n with fixed break sequence (i.e. the sequence of depths of σ ∘ 2 i ). Starting from Witt vector or Carlitz module constructions, we give an explicit automaton-theoretic description of: (a) representatives up to conjugation for all series of order 4 with break sequence (1 , m) for m < 10 ; (b) representatives up to conjugation for all series of order 8 with minimal break sequence (1 , 3 , 11) ; and (c) an embedding of the Klein four-group into the Nottingham group at 2. We study the complexity of the new examples from the algebro-geometric properties of the equations they satisfy. For this, we generalise the theory of sparseness of power series to a four-step hierarchy of complexity, for which we give both Galois-theoretic and combinatorial descriptions. We identify where our different series fit into this hierarchy. We construct sparse representatives for the conjugacy class of elements of order two and depth 2 μ ± 1 (μ ⩾ 1). Series with small state complexity can end up high in the hierarchy. This is true, for example, for a new automaton we found, representing a series of order 4 with 5 states (the minimal possible number for such a series). [ABSTRACT FROM AUTHOR]

The computational power of discrete-time recurrent neural networks (NNs) with the saturated-linear activation function depends on the descriptive complexity of their weight parameters encoding the NN program. In order to study the power of increasing analogicity in NNs between integer (finite automata) and arbitrary rational weights (Turing machines), we have established the analog neuron hierarchy 0ANNs ⊂ 1ANNs ⊂ 2ANNs ⊆ 3ANNs where α ANN is a binary-state NN that is extended with α ⩾ 0 extra analog-state neurons with rational weights. In our previous work, we have compared it to the traditional Chomsky hierarchy and separated its first two levels. The separation 1ANNs ⫋ 2ANNs has been witnessed by the non-regular deterministic context-free language (DCFL) L # = { 0 n 1 n | n ⩾ 1 } which cannot be recognized by any 1ANN even with real weights, while any DCFL is accepted by a 2ANN with rational weights. In this paper, we strengthen this separation by showing that any non-regular DCFL (DFCL') cannot be recognized by 1ANNs with real weights, which means DCFL's ⊂ (2ANNs \ 1ANNs), implying 1ANNs ∩ DCFLs = 0ANNs. For this purpose, we show that any 1ANN that would recognize a DFCL' can be augmented to a larger 1ANN that would recognize L # , which does not exists. [ABSTRACT FROM AUTHOR]

Soil Tillage serious game designed as a training media has been researched based on the plowing forces using polynomial functions. However, the learning process is rare; hence the players in Serious Games (SG) are less engaged and tend to be more static in their games. The effects of vertical cutting angle, plowshare depth, and motor speed affect the soil plowing force in soil tillage. Therefore it is expected that a plow force model with a learning function will generate more actual conditions, engage the player and eventually affect the player's behavior. The serious game design uses a Hierarchical Finite State Machine (HFSM) in this study. HFSM state is motor speed, vertical cutting angle, and plowing depth. The learning function is based on Neural Network (NN), with a multilayer feed-forward neural network (FFNN) is chosen to estimate plowing forces. The Levenberg-Marquardt algorithm is used by NN to approach second-order training speed without computing the Hessian matrix and is the fastest backpropagation algorithm. The result of the research is a plowing force model values closer to the actual by giving players feedback as they learn. In the transition, HFSM has a feedback value to the initial state, which is helpful as part of measuring one game cycle that is run, thus providing a learning experience in a serious game. [ABSTRACT FROM AUTHOR]

Algebraic operations on fuzzy sets and relations and their implementation by hardware in automata interpretation are considered. Two ways of representing the values of membership functions of fuzzy sets and methods of transformation of such images are described. Appropriate estimates of the complexity of operations with such images are given and correctness of the algorithms is proved. [ABSTRACT FROM AUTHOR]

The cyclic alternating pattern is a microstructure phasic event, present in the non-rapid eye movement sleep, which has been associated with multiple pathologies, and is a marker of sleep instability that is detected using the electroencephalogram. However, this technique produces a large quantity of information during a full night test, making the task of manually scoring all the cyclic alternating pattern cycles unpractical, with a high probability of miss classification. Therefore, the aim of this work is to develop and test multiple algorithms capable of automatically detecting the cyclic alternating pattern. The employed method first analyses the electroencephalogram signal to extract features that are used as inputs to a classifier that detects the activation (A phase) and quiescent (B phase) phases of this pattern. The output of the classifier was then applied to a finite state machine implementing the cyclic alternating pattern classification. A systematic review was performed to determine the features and classifiers that could be more relevant. Nine classifiers were tested using features selected by a sequential feature selection algorithm and features produced by principal component analysis. The best performance was achieved using a feed-forward neural network, producing, respectively, an average accuracy, sensitivity, specificity and area under the curve of 79, 76, 80% and 0.77 in the A and B phases classification. The cyclic alternating pattern detection accuracy, using the finite state machine, was of 79%. [ABSTRACT FROM AUTHOR]

This paper presents an analysis of a sequential Hardware Trojan(HT) triggered by the rare input events transitions. Hardware Trojans represents a malicious entity who could hijack, leak confidential informations, disable the system etc. Since the Hardware Trojan insertion modifies the functionality of the of the original circuit, it should be treated with maximum importance. The novelty of this paper represents the analysis of the sequential Hardware Trojan (HT) which can be triggered by the rare input events transitions. [ABSTRACT FROM AUTHOR]

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The testing of Ajax (Asynchronous JavaScript and XML) web applications poses novel challenges for testers because Ajax constructs dynamic web applications by using Asynchronous communication and run time Document Object Model (DOM) manipulation. Ajax involves extreme dynamism, which induces novel kind of issues like state explosion, triggering state changes and unreachable states etc. that require more demanding web-testing methods. Model based testing is amongst the effective approaches to detect faults in web applications. However, the state model generated for an Ajax application can be enormous and may be hit by state explosion problem for large number of user action based changes and for immense dynamism. Recent research has not addressed this issue comprehensively because existing techniques either apply partial reduction or compromise the effectiveness of testing. This research uses soft computing based Fuzzy C Means (FCM) clustering algorithm to generate state machine model of an Ajax web application. The focus is on devising a framework to avoid the state explosion problem. The framework prioritizes the requirements and use cases based on requirements weightage, stakeholder weightage and user session based use case frequency. FCM uses this data to reduce the state space by identifying the most pivotal usage areas. The resultant DOM mutations for only these usage areas are considered to induce the finite state machine thus avoiding the state explosion. Experimental results show that the framework controls the size of generated state machine without compromising the effectiveness of testing. [ABSTRACT FROM AUTHOR]

A method is proposed which aims to reduce the hardware in FPGA-based circuits of Mealy finite state machines (FSMs). The proposed method is a type of structural decomposition method. Its main goal is the reducing the number of look-up table (LUT) elements in FSM circuits compared to the three-block FSM circuit. The main idea of the proposed method is the using codes of collections of FSM outputs for replacing the FSM inputs and state variables. The interstate transitions are defined using collections of outputs generated in two adjacent cycles of synchronization. One, of output collection codes, is kept into a register. To optimize block-generating FSM outputs, a new type of state codes is proposed. A state is encoded as an element of some class of states. This approach allows both the number of logic levels and inter-level interconnections in LUT-based FSM circuit to be diminished. An example of an LUT-based Mealy FSM circuit with the proposed method applied is shown. Moreover, the results of our research are represented. The research was conducted using the CAD tool Vivado by Xilinx. The experiments prove that the proposed approach allows the reduction of hardware compared with such known methods as Auto and One-hot of Vivado, and JEDI. Moreover, the proposed approach gives better results than a method based on the simultaneous replacement of inputs and encoding collections of outputs. Compared to circuits of the three-block FSMs, the LUT counts are reduced by an average of 10.07% without significant reduction in the value of operating frequency. The gain in LUT counts increases with the increasing the numbers of FSM states and inputs. [ABSTRACT FROM AUTHOR]

Functional electrical stimulation (FES) can be used to initiate lower limb muscle contractions and has been widely applied in gait rehabilitation. Establishing the correct timing of FES activation during each phase of the gait (walking) cycle remains challenging as most FES systems rely on open-loop control, whereby the controller receives no feedback about joint kinematics and instead relies on predetermined/timed muscle stimulation. The objective of this study was to develop and validate a closed-loop FES-based control solution for gait rehabilitation using a finite state machine (FSM) model. A two-phased study approach was taken: (1) Experimentally-Informed Study: A neuromuscular-derived FSM model was developed to drive closed-loop FES-based control for gait rehabilitation. The finite states were determined using electromyography and joint kinematics data of 12 non-disabled adults, collected during treadmill walking. The gait cycles were divided into four states, namely: swing-to-stance, push off, pre-swing, and toe up. (2) Simulation Study: A closed-loop FES-based control solution that employed the resulting FSM model, was validated through comparisons of neuro-musculo-skeletal computer simulations of impaired versus healthy gait. This closed-loop controller yielded steadier simulated impaired gait, in comparison to an open-loop alternative. The simulation results confirmed that accurate timing of FES activation during the gait cycle, as informed by kinematics data, is important to natural gait retraining. The closed-loop FES-based solution, introduced in this study, contributes to the repository of gait rehabilitation control options and offers the advantage of being simplistic to implement. Furthermore, this control solution is expected to integrate well with powered exoskeleton technologies. [ABSTRACT FROM AUTHOR]

Algebraic operations over fuzzy sets and relations and their implementation by hardware in automata interpretation are considered. Two ways of representing the values of membership functions of fuzzy sets and methods of transformation of such images are described. Appropriate estimates of the complexity of operations with such images are given and correctness of the algorithms is substantiated. [ABSTRACT FROM AUTHOR]

A method is proposed which aims at reducing the number of LUTs in the circuits of FPGA-based Mealy finite state machines (FSMs) with transformation of collections of outputs into state codes. The reduction is achieved due to the use of two-component state codes. Such an approach allows reducing the number of state variables compared with FSMs based on extended codes. There are exactly three levels of LUTs in the resulting FSM circuit. Each partial function is represented by a single-LUT circuit. The proposed method is illustrated with an example of synthesis. The experiments were conducted using standard benchmarks. They show that the proposed method produces FSM circuits with significantly smaller LUT counts compared with those produced by other investigated methods (Auto and One-hot of Vivado, JEDI, and transformation of output collection codes into extended state codes). The LUT count is decreased by, on average, from 9.86% to 59.64%. The improvement of the LUT count is accompanied by a slightly improved performance. The maximum operating frequency is increased, on average, from 2.74% to 12.93%. The advantages of the proposed method become more pronounced with increasing values of FSM inputs and state variables. [ABSTRACT FROM AUTHOR]

We present two fundamental results about the computational power of affine finite automata (AfAs). First, we show that changing the cutpoints does not change the class of languages defined by AfAs. Second, we show that AfAs define more languages than probabilistic and quantum finite automata with exclusive cutpoints. [ABSTRACT FROM AUTHOR]

This paper proposes a Finite State Machine (FSM) testing technique based on deep neural network (DNN). This technique verifies the correctness of an implementation FSM-B of a specification FSM-A. Using the back-propagation algorithm, a deep neural network is trained with the input–output patterns for a given set of transition functions that specify an FSM. Initially, for FSM-A, the input patterns and the corresponding output patterns (I/O pairs) are generated. Then most of the patterns are used to train the DNN. Once the training is over, the DNN is validated with the remaining I/O pairs (around 20%). The model can be used for verifying the correctness of FSM-B after training and validation of the DNN. Some inputs are applied to FSM-B and the generated output patterns are compared with the predicted values of the proposed DNN. The difference of accuracy percentages between FSM-A and FSM-B is recorded and zero difference between them indicates the fault-free condition of the implementation FSM-B. To check the effectiveness of the scheme, the output- and state-type faults are injected to derive mutant FSMs. Experimental results performed on the MCNC FSM benchmarks prove the efficacy of the proposed method. Only a few numbers of tests are needed to detect the presence of anomaly, if any. Hence, the test time reduces significantly — resulting in an average test time reduction of 85.67% compared to the conventional techniques. To the best of our knowledge, for the first time a DNN-driven testing scheme is being proposed. [ABSTRACT FROM AUTHOR]

Deep State Sequence-based (DSS) equivalence checking and path-based equivalence checking have been successfully applied for verification of digital designs between System Level Model (SLM) and Register Transfer Level (RTL). The DSS-based equivalence checking method can validate designs without mapping information, but the query size for each DSS is large compared with path-based verification. The query size for path-based methods is small, but the number of comparisons is large. In this work, we combine the advantages of DSS-based methods and path-based methods. We use DSS-based methods to find the corresponding paths and use cut-points like in path-based methods to split the DSS to reduce the query size. Finite State Machine with Datapath (FSMD) is used to represent the SLM and RTL models. Experimental results demonstrate that our method can effectively validate the designs and reduce the query size for DSS-based equivalence checking method. [ABSTRACT FROM AUTHOR]

Since network systems have become increasingly large and complex, the limitations of traditional abnormal packet detection have gradually emerged. The existing detection methods mainly rely on the recognition of packet features, which lack the association of specific applications and result in hysteresis and inaccurate judgement. In this paper, a task-oriented abnormal packet behavior detection method is proposed, which creatively collects action identifications during the execution of network tasks and inserts security labels into communication packets. Specifically, this paper defines the network tasks as a collection of state and action sequences to achieve the fine-grained division of the execution of network tasks, performs Hash value matching based on random communication string and action identification sequence for packet authentication, and proposes a mechanism of action identification sequence matching and abnormal behavior decision-making based on a finite state machine, according to the fine-grained monitoring of task execution action sequence. Furthermore, to verify the validity of the anomaly detection method proposed in this paper, a prototype based on the FTP communication platform is constructed, on which the simulation experiments, including the DDOS attack and backdoor attack, are conducted. The experimental results show that the proposed task-oriented abnormal behavior detection method can effectively intercept network malicious data packets and realize the active security defense for network systems. [ABSTRACT FROM AUTHOR]