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This paper presents a dual-band quadrature voltage-controlled oscillator (QVCO) using a transformer-based high-order LC-ring resonator, which inherently provides quadrature signals without requiring noisy coupling transistors as in traditional approaches, thereby achieving low phase-noise performance. Moreover, the proposed resonator shows two possible oscillation frequencies, which are exploited to realize a wide-tuning range QVCO employing a mode-switching transistor network. Due to the use of transformers, the oscillator has a minimal area penalty compared to the conventional designs. The implemented prototype in a 65-nm CMOS process achieves a continuous tuning range of 77.8% from 2.75 to 6.25 GHz while consuming from 9.7 to 15.6 mA current from a 0.6-V supply. The measured phase-noise figure-of-merit at 1-MHz offset ranges from 184 to 188.2 dB throughout the entire tuning range. The QVCO also exhibits good quadrature accuracy with 1.5^\circ maximum phase error and occupies a relatively small silicon area of 0.35 \mm^2. [ABSTRACT FROM AUTHOR]

This paper presents an integrated sensing system for complex dielectric spectroscopy in the 0.62–10 GHz frequency range. A capacitive sensor exposed to the material under test (MUT) shows variations in its admittance according to the complex permittivity of MUT. The sensing capacitor along with a fixed capacitor forms a voltage divider circuit and is excited by an RF signal at the sensing frequency. The magnitude and phase of the voltages across the two capacitors which depend on the sensor admittance are measured using a quadrature downconversion architecture to find the real and imaginary parts of the MUT's permittivity. At the lower frequency end, the system is configured as a direct-conversion architecture with third and fifth harmonic-rejection to alleviate the problem of harmonic mixing and improve the sensitivity. On the other hand, at the higher frequency end, the system works as a dual-downconversion topology and employs a sub-harmonic mixing technique to reduce the required input clock frequency span. As a proof of concept, the spectroscopy system is used for complex permittivity detection of pure organic chemicals and shows an rms permittivity error of less than 1% over the frequency range of 0.62–10 GHz. The fabricated chip in 0.18\mathchar"702D\mu\ m CMOS occupies an active area of 2.3 ~\ mm^2 and consumes 65–72 mW from a 1.8 V supply. [ABSTRACT FROM AUTHOR]

Demand for system-on-chip solutions has increased the interest in low drop-out (LDO) voltage regulators which do not require a bulky off-chip capacitor to achieve stability, also called capacitor-less LDO (CL-LDO) regulators. Several architectures have been proposed; however comparing these reported architectures proves difficult, as each has a distinct process technology and specifications. This paper compares CL-LDOs in a unified matter. We designed, fabricated, and tested five illustrative CL-LDO regulator topologies under common design conditions using 0.6?m CMOS technology. We compare the architectures in terms of (1) line/load regulation, (2) power supply rejection, (3) line/load transient, (4) total on-chip compensation capacitance, (5) noise, and (6) quiescent power consumption. Insights on what optimal topology to choose to meet particular LDO specifications are provided. [ABSTRACT FROM PUBLISHER]

A highly sensitive CMOS-based sensing system is proposed for permittivity detection and mixture characterization of organic chemicals at microwave frequencies. The system determines permittivity by measuring the frequency difference between two voltage-controlled oscillators (VCOs); a sensor oscillator with an operating frequency that shifts with the change in tank capacitance due to exposure to the material under test (MUT) and a reference oscillator insensitive to the MUT. This relative measurement approach improves sensor accuracy by tracking frequency drifts due to environmental variations. Embedding the sensor and reference VCOs in a fractional-N phase-locked loop (PLL) frequency synthesizer enables material characterization at a precise frequency and provides an efficient material-induced frequency shift read-out mechanism with a low-complexity bang–bang control loop that adjusts a fractional frequency divider. The majority of the PLL-based sensor system, except for an external fractional frequency divider, is implemented with a 90-nm CMOS prototype that consumes 22 mW when characterizing material near 10 GHz. Material-induced frequency shifts are detected at an accuracy level of 15 \ppmrms and binary mixture characterization of organic chemicals yield maximum errors in permittivity of <1.5%. [ABSTRACT FROM PUBLISHER]

A dual-band switchable harmonic receiver for downconverting the industrial-scientific-medical and local-multipoint-distribution-service bands at 24 and 31 GHz is proposed in this paper. The front end utilizes a new technique for band selection. Mathematical formulation, including the effect of mismatches, for the new switchable harmonic receiver is provided in this paper. In addition, new circuit techniques for the low-noise amplifier and millimeter-wave mixer implementations are presented. The receiver is implemented using 0.18-\mum BiCMOS technology with a total power consumption of 60 mW. Measurements show a band rejection higher than 43 dB, gain of 21 and 18 dB, NF lower than 8 and 9.5 dB, and third-order intercept point of -18 and -17 dBm for the 24- and 31-GHz frequency bands, respectively. [ABSTRACT FROM PUBLISHER]

This paper presents a 20–32-GHz wideband BiCMOS mixer with an IF bandwidth of 12 GHz. The mixer utilizes an inductive peaking technique to extend the bandwidth of the downconverted IF signal. To our knowledge, the proposed mixer achieves the widest IF bandwidth using silicon-based technologies in K-band. Analytical expressions for the conversion gain and output noise of the proposed mixer are presented. The wideband mixer is implemented using 0.18-\mu\ m BiCMOS technology and occupies an area of 0.19 \ mm^2. It achieves a conversion gain of 3 dB, a noise figure between 10.5 and 13.0 dB, and an IIP3 higher than 0.5 dBm with a power consumption of 18 mW from a 1.8-V supply. [ABSTRACT FROM PUBLISHER]

This paper presents a 23-32 GHz wideband BiCMOS low-noise amplifier (LNA). The LNA utilizes coupled-resonators to provide a wideband load. To our knowledge, the proposed LNA achieves the widest bandwidth with minimum power consumption using 0.18 μm BiCMOS technology in K-band. Analytical expressions for the wideband input matching, gain, noise figure and linearity are presented. The LNA is implemented using 0.18 μm BiCMOS technology and occupies an area of 0.25 mm2. It achieves a voltage gain of 12 dB, 3-dB bandwidth of 9 GHz, noise figure between 4.5-6.3 dB, linearity higher than -6.4 dBm with a power consumption of 13 mW from a 1.5 V supply. [ABSTRACT FROM AUTHOR]

The effect of filter parameters on the phase noise of RF MEMS tunable filters employing shunt capacitive switches is investigated in this article. It is shown that the phase noise of a tunable filter is dependent on the input power, fractional bandwidth, filter order, resonator quality factor, and tuning state. Phase noise is higher for filters with smaller fractional bandwidth. In filters with high fractional bandwidth (>3%), phase noise increases as the input power approaches the power-handling capability of the filter. In filters with smaller bandwidths, phase noise increases with input power upto a threshold level of input power, but begins to decrease thereafter. The unloaded quality factor of the filter has a noticeable effect on the phase noise of filters with narrow bandwidths. The phase noise changes with the filter tuning state and is maximum when all the switches are in the up-state position. It is also shown that the phase noise increases with the filter order, due to increase in the number of noisy elements in the filter structure. This article provides a methodology to evaluate the phase noise of a tunable filter and proves that RF MEMS filters are suitable for high performance applications without considerable phase-noise penalty. © 2009 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2010. [ABSTRACT FROM AUTHOR]

This paper presents a state-of-the-art distributed amplifier with coupled inductors in the gate line. The proposed coupled inductors, in conjunction with series-peaking inductors in cascode gain stages, provide bandwidth extension with flat gain response for the amplifier without any additional power consumption. On the other hand, gate-inductor coupling improves the input matching of the amplifier considerably. The detailed analysis and design methodology for the proposed distributed amplifier are presented. The new four-stage distributed amplifier, fabricated using an IBM O.18-μm complementary-metal-oxide-semiconductor process, achieves a power gain of around 10 dB, input and output return losses better than 16 and 18 dB, respectively, a noise figure of 3.6-4.9 dB, and a power consumption of 21 mW over a 16-GHz flat 1-dB bandwidth. The measured IIP3 of the amplifier is between 0.1 and 3.75 dBm across the entire band. [ABSTRACT FROM AUTHOR]

This article presents the response of RF microelectromechanical systems (RF MEMS), barium strontium titanate (BST), and gallium arsenide (GaAs)-based tunable filters and reconfigurable matching networks to a wideband code-division-multiple-access signal centered at 1.95 GHz. The RF MEMS tunable filter and impedance tuner result in very low intermodulation distortion and spectral regrowth compared to their BST and GaAs counterparts. The linearity of the BST and GaAs tunable networks improves considerably by using a series combination of BST and GaAs varactors, but the RF MEMS-based networks still show the best linearity of all three technologies. Also, it is shown that the reconfigurable networks, tuned with capacitive RF MEMS can handle up to 1 W of RF power with no self-actuation. © 2007 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2008. [ABSTRACT FROM AUTHOR]

This article presents what we believe to be a novel chip-scale 25-45-GHz re-configurable mm-wave remote antenna unit (RAU) for radio over fiber (RoF) distributed antenna systems. The proposed RAU architecture optimizes energy efficiency by operating directly at mm-wave frequencies, and spectral efficiency by selecting re-configurable RF photonic filters topology. Additionally, it achieves frequency agility by rejecting interferes and a small form factor by utilizing the SOI photonics process. Two photonic integrated circuits (PICs) that act as downlink and uplink units are presented while occupying a total area of 12.33 mm 2 . The downlink selects a single channel within the desired frequency range, while the uplink rejects up to four interferes. The building blocks of the proposed architecture are discussed and their design consideration and parameters are shown. Then, a comprehensive system analysis of the proposed RAU architecture including key performance indicators is presented. A scalable 5-channel system is demonstrated each with a 3-dB Bandwidth of 5-GHz. Moreover, this architecture can be continuously tuned and re-configured within a wide frequency range to cover all 5-channels. To the best of the authors' knowledge, this is the first wideband modular and re-configurable mm-wave RAU that covers the entire mm-wave sub-45-GHz band implemented in silicon photonics.